247 lines
6.9 KiB
C++
247 lines
6.9 KiB
C++
#include "Interrupt.h"
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// GD32全系列无法把向量表映射到RAM，F103只能映射到Flash别的地方
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#if defined(GD32)
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#define VEC_TABLE_ON_RAM 0
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#else
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#define VEC_TABLE_ON_RAM 1
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#endif
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/*
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完全接管中断，在RAM中开辟中断向量表，做到随时可换。
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由于中断向量表要求128对齐，这里多分配128字节，找到对齐点后给向量表使用
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为了增强中断函数处理，我们使用_Vectors作为真正的中断向量表，全部使用OnHandler作为中断处理函数。
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然后在OnHandler内部获取中断号，再调用Vectors中保存的用户委托，并向它传递中断号和参数。
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*/
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TInterrupt Interrupt;
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// 真正的向量表 64k=0x10000
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#if VEC_TABLE_ON_RAM
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#ifdef STM32F0
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__IO Func _Vectors[VectorySize] __attribute__((at(0x20000000)));
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#else
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// 84个中断向量，向上取整到2整数倍也就是128，128*4=512=0x200。CM3权威手册
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__IO Func _Vectors[VectorySize] __attribute__((__aligned__(0x200)));
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#endif
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#endif
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#define IS_IRQ(irq) (irq >= -16 && irq <= VectorySize - 16)
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void TInterrupt::Init()
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{
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// 禁用所有中断
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NVIC->ICER[0] = 0xFFFFFFFF;
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#if defined(STM32F1) || defined(STM32F4)
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NVIC->ICER[1] = 0xFFFFFFFF;
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NVIC->ICER[2] = 0xFFFFFFFF;
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#endif
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// 清除所有中断位
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NVIC->ICPR[0] = 0xFFFFFFFF;
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#if defined(STM32F1) || defined(STM32F4)
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NVIC->ICPR[1] = 0xFFFFFFFF;
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NVIC->ICPR[2] = 0xFFFFFFFF;
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#endif
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#if VEC_TABLE_ON_RAM
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memset((void*)_Vectors, 0, VectorySize << 2);
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_Vectors[2] = (Func)&FaultHandler; // NMI
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_Vectors[3] = (Func)&FaultHandler; // Hard Fault
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_Vectors[4] = (Func)&FaultHandler; // MMU Fault
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_Vectors[5] = (Func)&FaultHandler; // Bus Fault
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_Vectors[6] = (Func)&FaultHandler; // Usage Fault
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_Vectors[11] = (Func)&FaultHandler; // SVC
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_Vectors[12] = (Func)&FaultHandler; // Debug
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_Vectors[14] = (Func)&FaultHandler; // PendSV
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_Vectors[15] = (Func)&FaultHandler; // Systick
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#if defined(STM32F1) || defined(STM32F4)
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__DMB(); // 确保中断表已经被写入
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SCB->AIRCR = (0x5FA << SCB_AIRCR_VECTKEY_Pos) // 解锁
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| (7 << SCB_AIRCR_PRIGROUP_Pos); // 没有优先组位
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//SCB->VTOR = (uint)_Vectors; // 向量表基地址
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NVIC_SetVectorTable(NVIC_VectTab_RAM, (uint)((byte*)_Vectors - 0x20000000));
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#ifdef STM32F4
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SCB->SHCSR |= SCB_SHCSR_USGFAULTACT_Msk // 打开异常
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| SCB_SHCSR_BUSFAULTACT_Msk
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| SCB_SHCSR_MEMFAULTACT_Msk;
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#else
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SCB->SHCSR |= SCB_SHCSR_USGFAULTENA // 打开异常
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| SCB_SHCSR_BUSFAULTENA
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| SCB_SHCSR_MEMFAULTENA;
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#endif
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#else
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// Enable the SYSCFG peripheral clock
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
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// Remap SRAM at 0x00000000
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SYSCFG_MemoryRemapConfig(SYSCFG_MemoryRemap_SRAM);
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#endif
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#else
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#ifdef STM32F1
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SCB->AIRCR = (0x5FA << SCB_AIRCR_VECTKEY_Pos) // 解锁
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| (7 << SCB_AIRCR_PRIGROUP_Pos); // 没有优先组位
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SCB->SHCSR |= SCB_SHCSR_USGFAULTENA // 打开异常
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| SCB_SHCSR_BUSFAULTENA
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| SCB_SHCSR_MEMFAULTENA;
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#endif
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#endif
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}
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TInterrupt::~TInterrupt()
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{
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// 恢复中断向量表
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#if defined(STM32F1) || defined(STM32F4)
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NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0);
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#else
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SYSCFG_MemoryRemapConfig(SYSCFG_MemoryRemap_Flash);
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#endif
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}
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bool TInterrupt::Activate(short irq, InterruptCallback isr, void* param)
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{
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assert_param(IS_IRQ(irq));
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short irq2 = irq + 16; // exception = irq + 16
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#if VEC_TABLE_ON_RAM
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_Vectors[irq2] = UserHandler;
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#endif
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Vectors[irq2] = isr;
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Params[irq2] = param;
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__DMB(); // asure table is written
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//NVIC->ICPR[irq >> 5] = 1 << (irq & 0x1F); // clear pending bit
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//NVIC->ISER[irq >> 5] = 1 << (irq & 0x1F); // set enable bit
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if(irq >= 0)
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{
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NVIC_ClearPendingIRQ((IRQn_Type)irq);
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NVIC_EnableIRQ((IRQn_Type)irq);
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}
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return true;
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}
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bool TInterrupt::Deactivate(short irq)
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{
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assert_param(IS_IRQ(irq));
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short irq2 = irq + 16; // exception = irq + 16
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Vectors[irq2] = 0;
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Params[irq2] = 0;
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//NVIC->ICER[irq >> 5] = 1 << (irq & 0x1F); // clear enable bit */
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if(irq >= 0) NVIC_DisableIRQ((IRQn_Type)irq);
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return true;
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}
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bool TInterrupt::Enable(short irq)
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{
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assert_param(IS_IRQ(irq));
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if(irq < 0) return false;
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uint ier = NVIC->ISER[irq >> 5]; // old state
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//NVIC->ISER[irq >> 5] = 1 << (irq & 0x1F); // set enable bit
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NVIC_EnableIRQ((IRQn_Type)irq);
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return (ier >> (irq & 0x1F)) & 1; // old enable bit
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}
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bool TInterrupt::Disable(short irq)
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{
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assert_param(IS_IRQ(irq));
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if(irq < 0) return false;
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uint ier = NVIC->ISER[irq >> 5]; // old state
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//NVIC->ICER[irq >> 5] = 1 << (irq & 0x1F); // clear enable bit
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NVIC_DisableIRQ((IRQn_Type)irq);
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return (ier >> (irq & 0x1F)) & 1; // old enable bit
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}
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bool TInterrupt::EnableState(short irq)
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{
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assert_param(IS_IRQ(irq));
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if(irq < 0) return false;
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// return enabled bit
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return (NVIC->ISER[(uint)irq >> 5] >> ((uint)irq & 0x1F)) & 1;
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}
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bool TInterrupt::PendingState(short irq)
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{
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assert_param(IS_IRQ(irq));
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if(irq < 0) return false;
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// return pending bit
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return (NVIC->ISPR[(uint)irq >> 5] >> ((uint)irq & 0x1F)) & 1;
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}
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void TInterrupt::SetPriority(short irq, uint priority)
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{
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assert_param(IS_IRQ(irq));
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NVIC_SetPriority((IRQn_Type)irq, priority);
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}
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void TInterrupt::GetPriority(short irq)
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{
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assert_param(IS_IRQ(irq));
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NVIC_GetPriority((IRQn_Type)irq);
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}
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void TInterrupt::GlobalEnable() { __enable_irq(); }
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void TInterrupt::GlobalDisable() { __disable_irq(); }
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bool TInterrupt::GlobalState() { return __get_PRIMASK(); }
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#ifdef STM32F10X
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uint TInterrupt::EncodePriority (uint priorityGroup, uint preemptPriority, uint subPriority)
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{
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return NVIC_EncodePriority(priorityGroup, preemptPriority, subPriority);
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}
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void TInterrupt::DecodePriority (uint priority, uint priorityGroup, uint* pPreemptPriority, uint* pSubPriority)
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{
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NVIC_DecodePriority(priority, priorityGroup, pPreemptPriority, pSubPriority);
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}
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#endif
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__asm uint GetIPSR()
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{
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mrs r0,IPSR // exception number
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bx lr
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}
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void UserHandler()
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{
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uint num = GetIPSR();
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//if(num >= VectorySize) return;
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//if(!Interrupt.Vectors[num]) return;
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assert_param(num < VectorySize);
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assert_param(Interrupt.Vectors[num]);
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// 找到应用层中断委托并调用
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InterruptCallback isr = (InterruptCallback)Interrupt.Vectors[num];
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void* param = (void*)Interrupt.Params[num];
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isr(num - 16, param);
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}
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void FaultHandler()
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{
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uint exception = GetIPSR();
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if (exception) {
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debug_printf("EXCEPTION 0x%02x:\r\n", exception);
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} else {
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debug_printf("ERROR:\r\n");
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}
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#if DEBUG
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ShowFault(exception);
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#endif
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while(true);
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}
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