Nigel
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

[X86][SSE] Added extra memory folding tests for cvtsd2ss intrinsic 

SSE only fold partial reg update instructions when optsize is enabled

llvm-svn: 276743
This commit is contained in:
Simon Pilgrim 2016-07-26 12:44:50 +00:00
parent cc83ad18f7
commit 0280959c0d
1 changed files with 36 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
View File

@ -293,6 +293,24 @@ define <4 x float> @test_x86_sse2_cvtsd2ss_load(<4 x float> %a0, <2 x double>* %
} }
define <4 x float> @test_x86_sse2_cvtsd2ss_load_optsize(<4 x float> %a0, <2 x double>* %p1) optsize {
; SSE-LABEL: test_x86_sse2_cvtsd2ss_load_optsize:
; SSE: ## BB#0:
; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE-NEXT: cvtsd2ss (%eax), %xmm0
; SSE-NEXT: retl
;
; KNL-LABEL: test_x86_sse2_cvtsd2ss_load_optsize:
; KNL: ## BB#0:
; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax
; KNL-NEXT: vcvtsd2ss (%eax), %xmm0, %xmm0
; KNL-NEXT: retl
%a1 = load <2 x double>, <2 x double>* %p1
%res = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> %a0, <2 x double> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0, i32 %a1) { define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0, i32 %a1) {
; SSE-LABEL: test_x86_sse2_cvtsi2sd: ; SSE-LABEL: test_x86_sse2_cvtsi2sd:
; SSE: ## BB#0: ; SSE: ## BB#0:
@ -344,6 +362,24 @@ define <2 x double> @test_x86_sse2_cvtss2sd_load(<2 x double> %a0, <4 x float>*
} }
define <2 x double> @test_x86_sse2_cvtss2sd_load_optsize(<2 x double> %a0, <4 x float>* %p1) optsize {
; SSE-LABEL: test_x86_sse2_cvtss2sd_load_optsize:
; SSE: ## BB#0:
; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE-NEXT: cvtss2sd (%eax), %xmm0
; SSE-NEXT: retl
;
; KNL-LABEL: test_x86_sse2_cvtss2sd_load_optsize:
; KNL: ## BB#0:
; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax
; KNL-NEXT: vcvtss2sd (%eax), %xmm0, %xmm0
; KNL-NEXT: retl
%a1 = load <4 x float>, <4 x float>* %p1
%res = call <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double> %a0, <4 x float> %a1) ; <<2 x double>> [#uses=1]
ret <2 x double> %res
}
define <4 x i32> @test_x86_sse2_cvttpd2dq(<2 x double> %a0) { define <4 x i32> @test_x86_sse2_cvttpd2dq(<2 x double> %a0) {
; SSE-LABEL: test_x86_sse2_cvttpd2dq: ; SSE-LABEL: test_x86_sse2_cvttpd2dq:
; SSE: ## BB#0: ; SSE: ## BB#0: