forked from OSchip/llvm-project
				
			fconsts / fconstd immediate should be proceeded with #.
llvm-svn: 85952
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			@ -980,7 +980,7 @@ void ARMAsmPrinter::printNoHashImmediate(const MachineInstr *MI, int OpNum) {
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void ARMAsmPrinter::printVFPf32ImmOperand(const MachineInstr *MI, int OpNum) {
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  const ConstantFP *FP = MI->getOperand(OpNum).getFPImm();
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  O << ARM::getVFPf32Imm(FP->getValueAPF());
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  O << '#' << ARM::getVFPf32Imm(FP->getValueAPF());
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  if (VerboseAsm) {
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    O.PadToColumn(MAI->getCommentColumn());
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    O << MAI->getCommentString() << ' ';
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			@ -990,7 +990,7 @@ void ARMAsmPrinter::printVFPf32ImmOperand(const MachineInstr *MI, int OpNum) {
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void ARMAsmPrinter::printVFPf64ImmOperand(const MachineInstr *MI, int OpNum) {
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  const ConstantFP *FP = MI->getOperand(OpNum).getFPImm();
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  O << ARM::getVFPf64Imm(FP->getValueAPF());
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  O << '#' << ARM::getVFPf64Imm(FP->getValueAPF());
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  if (VerboseAsm) {
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    O.PadToColumn(MAI->getCommentColumn());
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    O << MAI->getCommentString() << ' ';
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			@ -3,7 +3,7 @@
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define arm_apcscc float @t1(float %x) nounwind readnone optsize {
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entry:
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; CHECK: t1:
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; CHECK: fconsts s1, 16
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; CHECK: fconsts s1, #16
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  %0 = fadd float %x, 4.000000e+00
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  ret float %0
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}
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			@ -11,7 +11,7 @@ entry:
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define arm_apcscc double @t2(double %x) nounwind readnone optsize {
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entry:
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; CHECK: t2:
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; CHECK: fconstd d1, 8
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; CHECK: fconstd d1, #8
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  %0 = fadd double %x, 3.000000e+00
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  ret double %0
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}
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			@ -19,7 +19,7 @@ entry:
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define arm_apcscc double @t3(double %x) nounwind readnone optsize {
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entry:
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; CHECK: t3:
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; CHECK: fconstd d1, 170
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; CHECK: fconstd d1, #170
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  %0 = fmul double %x, -1.300000e+01
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  ret double %0
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}
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			@ -27,7 +27,7 @@ entry:
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define arm_apcscc float @t4(float %x) nounwind readnone optsize {
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entry:
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; CHECK: t4:
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; CHECK: fconsts s1, 184
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; CHECK: fconsts s1, #184
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  %0 = fmul float %x, -2.400000e+01
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  ret float %0
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}
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