forked from OSchip/llvm-project
				
			[Hexagon] Fixing compound register printing and reenabling more tests.
llvm-svn: 252574
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					@ -96,6 +96,12 @@ void HexagonMCCodeEmitter::EncodeSingleInstruction(
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  assert(!HexagonMCInstrInfo::isBundle(HMB));
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					  assert(!HexagonMCInstrInfo::isBundle(HMB));
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  uint64_t Binary;
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					  uint64_t Binary;
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					  // Compound instructions are limited to using registers 0-7 and 16-23
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					  // and here we make a map 16-23 to 8-15 so they can be correctly encoded.
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					  static unsigned RegMap[8] = {Hexagon::R8,  Hexagon::R9,  Hexagon::R10,
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					                               Hexagon::R11, Hexagon::R12, Hexagon::R13,
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					                               Hexagon::R14, Hexagon::R15};
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  // Pseudo instructions don't get encoded and shouldn't be here
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					  // Pseudo instructions don't get encoded and shouldn't be here
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  // in the first place!
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					  // in the first place!
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  assert(!HexagonMCInstrInfo::getDesc(MCII, HMB).isPseudo() &&
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					  assert(!HexagonMCInstrInfo::getDesc(MCII, HMB).isPseudo() &&
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					@ -104,6 +110,16 @@ void HexagonMCCodeEmitter::EncodeSingleInstruction(
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                  " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'"
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					                  " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'"
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                                                                    "\n");
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					                                                                    "\n");
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					  if (llvm::HexagonMCInstrInfo::getType(MCII, HMB) == HexagonII::TypeCOMPOUND) {
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					    for (unsigned i = 0; i < HMB.getNumOperands(); ++i)
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					      if (HMB.getOperand(i).isReg()) {
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					        unsigned Reg =
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					            MCT.getRegisterInfo()->getEncodingValue(HMB.getOperand(i).getReg());
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					        if ((Reg <= 23) && (Reg >= 16))
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					          HMB.getOperand(i).setReg(RegMap[Reg - 16]);
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					      }
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					  }
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  if (HexagonMCInstrInfo::isNewValue(MCII, HMB)) {
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					  if (HexagonMCInstrInfo::isNewValue(MCII, HMB)) {
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    // Calculate the new value distance to the associated producer
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					    // Calculate the new value distance to the associated producer
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    MCOperand &MCO =
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					    MCOperand &MCO =
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					@ -115,8 +115,8 @@ unsigned getCompoundCandidateGroup(MCInst const &MI, bool IsExtended) {
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    SrcReg = MI.getOperand(1).getReg();
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					    SrcReg = MI.getOperand(1).getReg();
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    if ((Hexagon::P0 == DstReg || Hexagon::P1 == DstReg) &&
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					    if ((Hexagon::P0 == DstReg || Hexagon::P1 == DstReg) &&
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        HexagonMCInstrInfo::isIntRegForSubInst(SrcReg) &&
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					        HexagonMCInstrInfo::isIntRegForSubInst(SrcReg) &&
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        MI.getOperand(2).isImm() && ((isUInt<5>(MI.getOperand(2).getImm())) ||
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					        (HexagonMCInstrInfo::inRange<5>(MI, 2) ||
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                                     (MI.getOperand(2).getImm() == -1)))
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					         HexagonMCInstrInfo::minConstant(MI, 2) == -1))
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      return HexagonII::HCG_A;
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					      return HexagonII::HCG_A;
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    break;
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					    break;
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  case Hexagon::A2_tfr:
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					  case Hexagon::A2_tfr:
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					@ -134,8 +134,8 @@ unsigned getCompoundCandidateGroup(MCInst const &MI, bool IsExtended) {
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      return false;
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					      return false;
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    // Rd = #u6
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					    // Rd = #u6
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    DstReg = MI.getOperand(0).getReg();
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					    DstReg = MI.getOperand(0).getReg();
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    if (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() <= 63 &&
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					    if (HexagonMCInstrInfo::minConstant(MI, 1) <= 63 &&
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        MI.getOperand(1).getImm() >= 0 &&
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					        HexagonMCInstrInfo::minConstant(MI, 1) >= 0 &&
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        HexagonMCInstrInfo::isIntRegForSubInst(DstReg))
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					        HexagonMCInstrInfo::isIntRegForSubInst(DstReg))
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      return HexagonII::HCG_A;
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					      return HexagonII::HCG_A;
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    break;
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					    break;
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					@ -145,9 +145,8 @@ unsigned getCompoundCandidateGroup(MCInst const &MI, bool IsExtended) {
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    DstReg = MI.getOperand(0).getReg();
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					    DstReg = MI.getOperand(0).getReg();
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    Src1Reg = MI.getOperand(1).getReg();
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					    Src1Reg = MI.getOperand(1).getReg();
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    if ((Hexagon::P0 == DstReg || Hexagon::P1 == DstReg) &&
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					    if ((Hexagon::P0 == DstReg || Hexagon::P1 == DstReg) &&
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        MI.getOperand(2).isImm() &&
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        HexagonMCInstrInfo::isIntRegForSubInst(Src1Reg) &&
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					        HexagonMCInstrInfo::isIntRegForSubInst(Src1Reg) &&
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        (MI.getOperand(2).getImm() == 0))
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					        HexagonMCInstrInfo::minConstant(MI, 2) == 0)
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      return HexagonII::HCG_A;
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					      return HexagonII::HCG_A;
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    break;
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					    break;
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  // The fact that .new form is used pretty much guarantees
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					  // The fact that .new form is used pretty much guarantees
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					@ -206,6 +205,8 @@ MCInst *getCompoundInsn(MCContext &Context, MCInst const &L, MCInst const &R) {
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  MCInst *CompoundInsn = 0;
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					  MCInst *CompoundInsn = 0;
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  unsigned compoundOpcode;
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					  unsigned compoundOpcode;
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  MCOperand Rs, Rt;
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					  MCOperand Rs, Rt;
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					  int64_t Value;
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					  bool Success;
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  switch (L.getOpcode()) {
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					  switch (L.getOpcode()) {
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  default:
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					  default:
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					@ -277,7 +278,10 @@ MCInst *getCompoundInsn(MCContext &Context, MCInst const &L, MCInst const &R) {
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  case Hexagon::C2_cmpeqi:
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					  case Hexagon::C2_cmpeqi:
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    DEBUG(dbgs() << "CX: C2_cmpeqi\n");
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					    DEBUG(dbgs() << "CX: C2_cmpeqi\n");
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    if (L.getOperand(2).getImm() == -1)
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					    Success = L.getOperand(2).getExpr()->evaluateAsAbsolute(Value);
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					    (void)Success;
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					    assert(Success);
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					    if (Value == -1)
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      compoundOpcode = cmpeqn1BitOpcode[getCompoundOp(R)];
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					      compoundOpcode = cmpeqn1BitOpcode[getCompoundOp(R)];
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    else
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					    else
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      compoundOpcode = cmpeqiBitOpcode[getCompoundOp(R)];
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					      compoundOpcode = cmpeqiBitOpcode[getCompoundOp(R)];
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					@ -286,14 +290,17 @@ MCInst *getCompoundInsn(MCContext &Context, MCInst const &L, MCInst const &R) {
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    CompoundInsn = new (Context) MCInst;
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					    CompoundInsn = new (Context) MCInst;
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    CompoundInsn->setOpcode(compoundOpcode);
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					    CompoundInsn->setOpcode(compoundOpcode);
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    CompoundInsn->addOperand(Rs);
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					    CompoundInsn->addOperand(Rs);
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    if (L.getOperand(2).getImm() != -1)
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					    if (Value != -1)
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      CompoundInsn->addOperand(L.getOperand(2));
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					      CompoundInsn->addOperand(L.getOperand(2));
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    CompoundInsn->addOperand(R.getOperand(1));
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					    CompoundInsn->addOperand(R.getOperand(1));
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    break;
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					    break;
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  case Hexagon::C2_cmpgti:
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					  case Hexagon::C2_cmpgti:
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    DEBUG(dbgs() << "CX: C2_cmpgti\n");
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					    DEBUG(dbgs() << "CX: C2_cmpgti\n");
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    if (L.getOperand(2).getImm() == -1)
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					    Success = L.getOperand(2).getExpr()->evaluateAsAbsolute(Value);
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					    (void)Success;
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					    assert(Success);
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					    if (Value == -1)
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      compoundOpcode = cmpgtn1BitOpcode[getCompoundOp(R)];
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					      compoundOpcode = cmpgtn1BitOpcode[getCompoundOp(R)];
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    else
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					    else
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      compoundOpcode = cmpgtiBitOpcode[getCompoundOp(R)];
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					      compoundOpcode = cmpgtiBitOpcode[getCompoundOp(R)];
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					@ -302,7 +309,7 @@ MCInst *getCompoundInsn(MCContext &Context, MCInst const &L, MCInst const &R) {
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    CompoundInsn = new (Context) MCInst;
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					    CompoundInsn = new (Context) MCInst;
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    CompoundInsn->setOpcode(compoundOpcode);
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					    CompoundInsn->setOpcode(compoundOpcode);
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    CompoundInsn->addOperand(Rs);
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					    CompoundInsn->addOperand(Rs);
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    if (L.getOperand(2).getImm() != -1)
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					    if (Value != -1)
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      CompoundInsn->addOperand(L.getOperand(2));
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					      CompoundInsn->addOperand(L.getOperand(2));
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    CompoundInsn->addOperand(R.getOperand(1));
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					    CompoundInsn->addOperand(R.getOperand(1));
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    break;
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					    break;
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					@ -1,5 +1,4 @@
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; RUN: llc -march=hexagon -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
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					; RUN: llc -march=hexagon -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
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; XFAIL: *
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; CHECK: p0 = cmp.gt(r0,#-1); if (!p0.new) jump:nt
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					; CHECK: p0 = cmp.gt(r0,#-1); if (!p0.new) jump:nt
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					@ -1,6 +1,5 @@
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# RUN: llvm-mc -triple hexagon -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
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					# RUN: llvm-mc -triple hexagon -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
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# Hexagon Programmer's Reference Manual 11.4 J
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					# Hexagon Programmer's Reference Manual 11.4 J
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# XFAIL: *
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# Call subroutine
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					# Call subroutine
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# CHECK: 00 c0 00 5a
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					# CHECK: 00 c0 00 5a
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