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Fix 80 col violations. 

llvm-svn: 138356
This commit is contained in:
Evan Cheng 2011-08-23 19:17:21 +00:00
parent 4c8ff77f1b
commit 6b477b985b
1 changed files with 4 additions and 2 deletions
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6
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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@ -5877,9 +5877,11 @@ void SelectionDAGBuilder::visitInlineAsm(ImmutableCallSite CS) {
if (OpInfo.ConstraintVT != Input.ConstraintVT) { if (OpInfo.ConstraintVT != Input.ConstraintVT) {
std::pair<unsigned, const TargetRegisterClass*> MatchRC = std::pair<unsigned, const TargetRegisterClass*> MatchRC =
TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode, OpInfo.ConstraintVT); TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
OpInfo.ConstraintVT);
std::pair<unsigned, const TargetRegisterClass*> InputRC = std::pair<unsigned, const TargetRegisterClass*> InputRC =
TLI.getRegForInlineAsmConstraint(Input.ConstraintCode, Input.ConstraintVT); TLI.getRegForInlineAsmConstraint(Input.ConstraintCode,
Input.ConstraintVT);
if ((OpInfo.ConstraintVT.isInteger() != if ((OpInfo.ConstraintVT.isInteger() !=
Input.ConstraintVT.isInteger()) || Input.ConstraintVT.isInteger()) ||
(MatchRC.second != InputRC.second)) { (MatchRC.second != InputRC.second)) {