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Adjust setjmp instruction sequence to not need 32-bit alignment padding 

llvm-svn: 94627
This commit is contained in:
Jim Grosbach 2010-01-27 00:07:20 +00:00
parent 67a69dd2ed
commit a3575ca846
2 changed files with 4 additions and 5 deletions
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2
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -470,7 +470,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
case ARM::Int_eh_sjlj_setjmp: case ARM::Int_eh_sjlj_setjmp:
return 24; return 24;
case ARM::tInt_eh_sjlj_setjmp: case ARM::tInt_eh_sjlj_setjmp:
return 22; return 20;
case ARM::t2Int_eh_sjlj_setjmp: case ARM::t2Int_eh_sjlj_setjmp:
return 22; return 22;
case ARM::BR_JTr: case ARM::BR_JTr:

7
llvm/lib/Target/ARM/ARMInstrThumb.td
View File

@ -820,14 +820,13 @@ let Defs =
"mov\tr12, r1\t@ begin eh.setjmp\n" "mov\tr12, r1\t@ begin eh.setjmp\n"
"\tmov\tr1, sp\n" "\tmov\tr1, sp\n"
"\tstr\tr1, [$src, #8]\n" "\tstr\tr1, [$src, #8]\n"
"\tadr\tr1, 0f\n" "\tmov\tr1, pc\n"
"\tadds\tr1, #1\n" "\tadds\tr1, #9\n"
"\tstr\tr1, [$src, #4]\n" "\tstr\tr1, [$src, #4]\n"
"\tmov\tr1, r12\n" "\tmov\tr1, r12\n"
"\tmovs\tr0, #0\n" "\tmovs\tr0, #0\n"
"\tb\t1f\n" "\tb\t1f\n"
".align 2\n" "\tmovs\tr0, #1\t@ end eh.setjmp\n"
"0:\tmovs\tr0, #1\t@ end eh.setjmp\n"
"1:", "", "1:", "",
[(set R0, (ARMeh_sjlj_setjmp GPR:$src))]>; [(set R0, (ARMeh_sjlj_setjmp GPR:$src))]>;
} }