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While spilling live registers at the end of block check whether they are used by DBG_VALUE machine instructions or not. If a spilled register is used by DBG_VALUE machine instruction then insert a new DBG_VALUE machine instruction to encode variable's new location on stack. 

llvm-svn: 110235
This commit is contained in:
Devang Patel 2010-08-04 18:42:02 +00:00
parent 0e60e67efb
commit d71bc1ae4e
1 changed files with 24 additions and 1 deletions
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25
llvm/lib/CodeGen/RegAllocFast.cpp
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@ -16,6 +16,7 @@
#include "llvm/BasicBlock.h" #include "llvm/BasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/Passes.h"
@ -80,6 +81,8 @@ namespace {
// that is currently available in a physical register. // that is currently available in a physical register.
LiveRegMap LiveVirtRegs; LiveRegMap LiveVirtRegs;
DenseMap<unsigned, MachineInstr *> LiveDbgValueMap;
// RegState - Track the state of a physical register. // RegState - Track the state of a physical register.
enum RegState { enum RegState {
// A disabled register is not available for allocation, but an alias may // A disabled register is not available for allocation, but an alias may
@ -265,6 +268,24 @@ void RAFast::spillVirtReg(MachineBasicBlock::iterator MI,
TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI); TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
++NumStores; // Update statistics ++NumStores; // Update statistics
// If this register is used by DBG_VALUE then insert new DBG_VALUE to
// identify spilled location as the place to find corresponding variable's
// value.
if (MachineInstr *DBG = LiveDbgValueMap.lookup(LRI->first)) {
const MDNode *MDPtr =
DBG->getOperand(DBG->getNumOperands()-1).getMetadata();
int64_t Offset = 0;
if (DBG->getOperand(1).isImm())
Offset = DBG->getOperand(1).getImm();
DebugLoc DL = MI->getDebugLoc();
if (MachineInstr *NewDV =
TII->emitFrameIndexDebugValue(*MF, FI, Offset, MDPtr, DL)) {
MachineBasicBlock *MBB = DBG->getParent();
MBB->insert(MI, NewDV);
DEBUG(dbgs() << "Inserting debug info due to spill:" << "\n" << *NewDV);
LiveDbgValueMap[LRI->first] = NewDV;
}
}
if (SpillKill) if (SpillKill)
LR.LastUse = 0; // Don't kill register again LR.LastUse = 0; // Don't kill register again
} }
@ -761,6 +782,7 @@ void RAFast::AllocateBasicBlock() {
if (!MO.isReg()) continue; if (!MO.isReg()) continue;
unsigned Reg = MO.getReg(); unsigned Reg = MO.getReg();
if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg)) continue; if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
LiveDbgValueMap[Reg] = MI;
LiveRegMap::iterator LRI = LiveVirtRegs.find(Reg); LiveRegMap::iterator LRI = LiveVirtRegs.find(Reg);
if (LRI != LiveVirtRegs.end()) if (LRI != LiveVirtRegs.end())
setPhysReg(MI, i, LRI->second.PhysReg); setPhysReg(MI, i, LRI->second.PhysReg);
@ -770,7 +792,7 @@ void RAFast::AllocateBasicBlock() {
MO.setReg(0); // We can't allocate a physreg for a DebugValue, sorry! MO.setReg(0); // We can't allocate a physreg for a DebugValue, sorry!
else { else {
// Modify DBG_VALUE now that the value is in a spill slot. // Modify DBG_VALUE now that the value is in a spill slot.
uint64_t Offset = MI->getOperand(1).getImm(); int64_t Offset = MI->getOperand(1).getImm();
const MDNode *MDPtr = const MDNode *MDPtr =
MI->getOperand(MI->getNumOperands()-1).getMetadata(); MI->getOperand(MI->getNumOperands()-1).getMetadata();
DebugLoc DL = MI->getDebugLoc(); DebugLoc DL = MI->getDebugLoc();
@ -1004,6 +1026,7 @@ bool RAFast::runOnMachineFunction(MachineFunction &Fn) {
SkippedInstrs.clear(); SkippedInstrs.clear();
StackSlotForVirtReg.clear(); StackSlotForVirtReg.clear();
LiveDbgValueMap.clear();
return true; return true;
} }