06bd6d304e
TypeLegalizer: Add support for passing of vector-promoted types in registers (copyFromParts/copyToParts).
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llvm-svn: 132649
2011-06-04 20:58:08 +00:00
fbff0e4f26
Add a TODO about memory operands.
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llvm-svn: 132559
2011-06-03 17:21:23 +00:00
de9399bf76
Have LowerOperandForConstraint handle multiple character constraints.
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Part of rdar://9119939
llvm-svn: 132510
2011-06-02 23:16:42 +00:00
690030c116
Allow bitcasts between valid types of the same size and vector
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types if the vector type is legal.
Fixes rdar://9306086
llvm-svn: 132420
2011-06-01 19:55:10 +00:00
7992883811
Preserve debug info during iSel by keeping DanglingDebugInfoMap live until end of function.
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Patch by Micah Villmow
llvm-svn: 131908
2011-05-23 17:44:13 +00:00
68254fcbca
Eliminate some temporary variables, and don't call getByValTypeAlignment
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when we're just going to throw the result away. No functionality change.
llvm-svn: 131880
2011-05-22 23:23:02 +00:00
8e60ff11db
Preserve debug info for unused zero extended boolean argument.
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Radar 9422775.
llvm-svn: 131422
2011-05-16 21:24:05 +00:00
e53b7d1a11
Make codegen able to handle values of empty types. This is one way
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to fix PR9900. I will keep it open until sable is able to comment on it.
llvm-svn: 131294
2011-05-13 15:18:06 +00:00
50117f8186
Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp
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intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>
llvm-svn: 131174
2011-05-11 01:11:55 +00:00
768de0a0f8
Disable my little CopyToReg argument hack with fast-isel. rdar://problem/9413587 .
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llvm-svn: 131156
2011-05-10 21:50:58 +00:00
4480428474
Look through struct wrapped types for inline asm statments.
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Patch by Evan Cheng.
llvm-svn: 131093
2011-05-09 20:04:43 +00:00
d26fc5e013
80 col violations.
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llvm-svn: 131015
2011-05-06 20:52:23 +00:00
441a01a2b8
Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 .
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llvm-svn: 130928
2011-05-05 16:53:34 +00:00
734f2218ac
A dbg.declare may not be in entry block, even if it is referring to an incoming argument. However, It is appropriate to emit DBG_VALUE referring to this incoming argument in entry block in MachineFunction.
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llvm-svn: 130129
2011-04-25 16:33:52 +00:00
0ab5e2cded
Fix a ton of comment typos found by codespell. Patch by
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Luis Felipe Strano Moraes!
llvm-svn: 129558
2011-04-15 05:18:47 +00:00
cfe5aa65d2
Avoid excess precision issues that lead to generating host-compiler-specific code.
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Switch lowering probably shouldn't be using FP for this. This resolves PR9581.
llvm-svn: 129199
2011-04-09 06:57:13 +00:00
74d92c1924
Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is lowered into a call to the specified trap function at sdisel time.
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llvm-svn: 129152
2011-04-08 21:37:21 +00:00
dd4dcd549b
Revamp the SjLj "dispatch setup" intrinsic.
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It needed to be moved closer to the setjmp statement, because the code directly
after the setjmp needs to know about values that are on the stack. Also, the
'bitcast' of the function context was causing a dead load. This wouldn't be too
horrible, except that at -O0 it wasn't optimized out, and because it wasn't
using the correct base pointer (if there is a VLA), it would try to access a
value from a garbage address.
<rdar://problem/9130540>
llvm-svn: 128873
2011-04-05 01:37:43 +00:00
8b1bca1998
Add comments.
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llvm-svn: 128730
2011-04-01 19:57:01 +00:00
8d68ebd42a
Assign node order numbers to results of call instruction lowering. This should improve src line debug info when sdisel is used. rdar://9199118
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llvm-svn: 128728
2011-04-01 19:42:22 +00:00
355ce07425
Turn SelectionDAGBuilder::GetRegistersForValue into a local function.
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It couldn't be used outside of the file because SDISelAsmOperandInfo
is local to SelectionDAGBuilder.cpp. Making it a static function avoids
a weird linkage dance.
llvm-svn: 128342
2011-03-26 16:35:10 +00:00
2ef0c69df1
Move more logic into getTypeForExtArgOrReturn.
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llvm-svn: 127809
2011-03-17 14:53:37 +00:00
34e7b3f77e
Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn().
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llvm-svn: 127807
2011-03-17 14:21:56 +00:00
ac106273d4
The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byte
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rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.
This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.
llvm-svn: 127766
2011-03-16 22:20:18 +00:00
d1ad9bc277
Don't recompute something that we already have in a local variable.
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llvm-svn: 127764
2011-03-16 22:20:07 +00:00
710d5da306
Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text.
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llvm-svn: 127468
2011-03-11 17:46:59 +00:00
b2c80da4ae
Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.
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llvm-svn: 126518
2011-02-25 21:41:48 +00:00
14a07365cb
Fix formatting of debug helper string.
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llvm-svn: 126471
2011-02-25 03:59:03 +00:00
6470647383
Refactor the LiveOutInfo interface into a few methods on FunctionLoweringInfo
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and make the actual map private.
llvm-svn: 126376
2011-02-24 10:00:08 +00:00
f8b22b3483
Roll out r126169 and r126170 in an attempt to fix the selfhost bot.
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llvm-svn: 126185
2011-02-22 03:24:52 +00:00
800f85baf9
Merge information about the number of zero, one, and sign bits of live-out registers
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at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.
llvm-svn: 126170
2011-02-22 00:46:27 +00:00
b7ae3ccb84
Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.
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This time with a fix that avoids using invalidated DenseMap iterator.
llvm-svn: 125984
2011-02-18 22:43:42 +00:00
0a1a36dc46
Roll out r125794 to help diagnose the llvm-gcc-i386-linux-selfhost failure.
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llvm-svn: 125830
2011-02-18 04:58:10 +00:00
f922a431ee
Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.
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llvm-svn: 125794
2011-02-17 23:33:27 +00:00
69229316aa
convert ConstantVector::get to use ArrayRef.
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llvm-svn: 125537
2011-02-15 00:14:00 +00:00
34442e6ebf
revert my ConstantVector patch, it seems to have made the llvm-gcc
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builders unhappy.
llvm-svn: 125504
2011-02-14 18:15:46 +00:00
d9f5b88548
Switch ConstantVector::get to use ArrayRef instead of a pointer+size
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idiom. Change various clients to simplify their code.
llvm-svn: 125487
2011-02-14 07:55:32 +00:00
e95d195014
Revisit my fix for PR9028: the issue is that DAGCombine was
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generating i8 shift amounts for things like i1024 types. Add
an assert in getNode to prevent this from occuring in the future,
fix the buggy transformation, revert my previous patch, and
document this gotcha in ISDOpcodes.h
llvm-svn: 125465
2011-02-13 19:09:16 +00:00
d5f0b1148a
when legalizing extremely wide shifts, make sure that
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the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.
This fixes PR9028.
llvm-svn: 125458
2011-02-13 09:10:56 +00:00
2a720d933a
fix visitShift to properly zero extend the shift amount if the provided operand
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is narrower than the shift register. Doing an anyext provides undefined bits in
the top part of the register.
llvm-svn: 125457
2011-02-13 09:02:52 +00:00
0af77fd45b
Fix build with stdcxx by using llvm::next. Patch by Joerg Sonnenberger!
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llvm-svn: 124472
2011-01-28 04:00:15 +00:00
70f8e5962a
Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
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llvm-svn: 124203
2011-01-25 18:09:58 +00:00
533479544b
Speculatively revert r124138.
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llvm-svn: 124142
2011-01-24 20:04:37 +00:00
8cc5355c90
Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
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llvm-svn: 124138
2011-01-24 19:24:37 +00:00
2f93128109
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
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llvm-svn: 123170
2011-01-10 12:39:04 +00:00
2fb5b31578
Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
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These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
llvm-svn: 123155
2011-01-10 02:58:51 +00:00
793d7b7626
Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister.
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llvm-svn: 123096
2011-01-08 23:10:50 +00:00
6eb516dbea
Do not model all INLINEASM instructions as having unmodelled side effects.
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Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.
This allows memory instructions to be moved around INLINEASM instructions.
llvm-svn: 123044
2011-01-07 23:50:32 +00:00
8265d56638
Add ARM patterns to match EXTRACT_SUBVECTOR nodes.
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Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle
vectors from being translated to EXTRACT_SUBVECTOR.
Patch by Tim Northover.
The test changes are needed to keep those spill-q tests from testing aligned
spills and restores. If the only aligned stack objects are spill slots, we
no longer realign the stack frame. Prior to this patch, an EXTRACT_SUBVECTOR
was legalized by loading from the stack, which created an aligned frame index.
Now, however, there is nothing except the spill slot in the stack frame, so
I added an aligned alloca.
llvm-svn: 122995
2011-01-07 04:59:04 +00:00
ac730dd2d1
Avoid zero extend bit test operands to pointer type if all the masks fit in
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the original type of the switch statement key.
rdar://8781238
llvm-svn: 122935
2011-01-06 01:02:44 +00:00
Nadav Rotem