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103 Commits

Author SHA1 Message Date
Jim Grosbach 03f56d9de6 ARM parsing and encoding of SBFX and UBFX. 
Encode the width operand as it encodes in the instruction, which simplifies
the disassembler and the encoder, by using the imm1_32 operand def. Add a
diagnostic for the context-sensitive constraint that the width must be in
the range [1,32-lsb].

llvm-svn: 136264
 2011-07-27 21:09:25 +00:00
Jim Grosbach d2659138da ARM cleanup of rot_imm encoding. 
Start of cleaning this up a bit. First step is to remove the encoder hook by
storing the operand as the bits it'll actually encode to so it can just be
directly used. Map it to the assembly source values 8/16/24 when we print it.

llvm-svn: 136152
 2011-07-26 21:28:43 +00:00
Evan Cheng ad5f485957 Sink ARM mc routines into MCTargetDesc. 
llvm-svn: 135825
 2011-07-23 00:00:19 +00:00