421133470f
[Hexagon] Add support for vector instructions
...
llvm-svn: 232728
2015-03-19 16:33:08 +00:00
c6f19333cf
[Hexagon] ENDLOOP is a non-reversible conditional branch
...
llvm-svn: 232725
2015-03-19 15:18:57 +00:00
36ccfa5779
[Hexagon] Use pseudo-instructions for true/false predicate values
...
llvm-svn: 232657
2015-03-18 19:07:53 +00:00
47ab1f2007
[Hexagon] Intrinsics for circular and bit-reversed loads and stores
...
llvm-svn: 232645
2015-03-18 16:23:44 +00:00
78cc36fed7
[Hexagon] Handle ENDLOOP0 in InsertBranch and RemoveBranch
...
llvm-svn: 232643
2015-03-18 15:56:43 +00:00
c4d3140524
Remove subtarget dependence from HexagonRegisterInfo.
...
llvm-svn: 231887
2015-03-10 23:45:55 +00:00
7b1799c7f8
[Hexagon] Use single tailcall pseudoinst and fix checking for label jumping versus tail calling.
...
llvm-svn: 231713
2015-03-09 22:05:21 +00:00
2efa2d01d7
[Hexagon] Reapply r231699. Remove assumption that second operand is an immediate when checking if A2_tfrsi is combinable.
...
llvm-svn: 231710
2015-03-09 21:48:13 +00:00
f1362f6196
ArrayRefize memory operand folding. NFC.
...
llvm-svn: 230846
2015-02-28 12:04:00 +00:00
36a036909c
Fix the clang -Werror build (-Wunused-variable)
...
llvm-svn: 228635
2015-02-10 00:16:36 +00:00
4fd203d3e1
[Hexagon] Removing more V4 predicates since V4 is the required minimum.
...
llvm-svn: 228614
2015-02-09 21:56:37 +00:00
f297dbed48
[Hexagon] Renaming A2_addi and formatting.
...
llvm-svn: 228318
2015-02-05 17:49:13 +00:00
c0434466e4
[Hexagon] Adding encoding information for absolute-reg mode stores. Xfailing a test until constant extenders are correctly put in the same packet.
...
llvm-svn: 228158
2015-02-04 17:52:06 +00:00
8ffce23cda
[Hexagon] Replacing old versions of stores and loads.
...
llvm-svn: 226065
2015-01-15 00:15:30 +00:00
c7522f31f1
[Hexagon] Replacing old version of convert and load f64.
...
llvm-svn: 226057
2015-01-14 23:07:36 +00:00
c91fabc233
[Hexagon] Removing old versions of cmph and updating references.
...
llvm-svn: 226013
2015-01-14 18:26:14 +00:00
ffacc6eac6
[Hexagon] Removing old versions of cmpb and updating references.
...
llvm-svn: 226006
2015-01-14 18:05:44 +00:00
fa947906bf
[Hexagon] Deleting versions of compare-not that don't have encoding information. Updating references.
...
llvm-svn: 226003
2015-01-14 16:49:12 +00:00
1445553474
[Hexagon] Adding dealloc_return encoding and absolute address stores.
...
llvm-svn: 225267
2015-01-06 16:15:15 +00:00
dacf057bdc
[Hexagon] Adding add/sub with carry, logical shift left by immediate and memop instructions. Removing old defs without bits and updating references.
...
llvm-svn: 225210
2015-01-05 21:36:38 +00:00
d3c02f177a
Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert.
...
llvm-svn: 225160
2015-01-05 10:15:49 +00:00
9014890819
[Hexagon] Removing old newvalue store variants. Adding postincrement immediate newvalue stores.
...
llvm-svn: 225009
2014-12-30 22:28:31 +00:00
820d5cb608
[Hexagon] Adding indexed store new-value variants.
...
llvm-svn: 225007
2014-12-30 22:00:26 +00:00
2bad4a7177
[Hexagon] Adding indexed store of immediates.
...
llvm-svn: 225006
2014-12-30 21:01:38 +00:00
94a498bf0e
[Hexagon] Adding indexed stores.
...
llvm-svn: 225005
2014-12-30 20:42:23 +00:00
9161d47476
[Hexagon] Adding reg-reg indexed load forms.
...
llvm-svn: 224997
2014-12-30 18:58:47 +00:00
bda31b42a0
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests.
...
llvm-svn: 224952
2014-12-29 20:44:51 +00:00
9a3cd3f58c
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits.
...
llvm-svn: 224951
2014-12-29 20:00:43 +00:00
3d34afb32d
[Hexagon] Renaming old multiclass for removal. Adding post-increment store classes and instruction defs.
...
llvm-svn: 224949
2014-12-29 19:42:14 +00:00
c83cbbf6a1
[Hexagon] Adding remaining post-increment instruction variants. Removing unused classes.
...
llvm-svn: 224868
2014-12-26 19:31:46 +00:00
fe9612e09d
[Hexagon] Adding post-increment unsigned byte loads.
...
llvm-svn: 224867
2014-12-26 19:12:11 +00:00
96976a10a3
[Hexagon] Adding post-increment signed byte loads with tests.
...
llvm-svn: 224866
2014-12-26 18:57:13 +00:00
947cd70413
[Hexagon] Adding doubleword load.
...
llvm-svn: 224787
2014-12-23 20:44:59 +00:00
026e88d317
[Hexagon] Reapplying 224775 load words.
...
llvm-svn: 224786
2014-12-23 20:02:16 +00:00
20be15718b
Reverting 224775 until mayLoad flag is addressed.
...
llvm-svn: 224783
2014-12-23 19:22:59 +00:00
122aeaafea
[Hexagon] Adding word loads.
...
llvm-svn: 224775
2014-12-23 18:06:56 +00:00
8e39cad934
[Hexagon] Adding signed halfword loads.
...
llvm-svn: 224774
2014-12-23 17:25:57 +00:00
a9386d28a5
[Hexagon] Adding unsigned halfword load.
...
llvm-svn: 224772
2014-12-23 16:42:57 +00:00
4b1eac4dda
[Hexagon] Adding memb instruction. Fixing whitespace in test from 224730.
...
llvm-svn: 224735
2014-12-22 21:40:43 +00:00
af1e5de141
[Hexagon] Adding classes and load unsigned byte instruction, updating usages.
...
llvm-svn: 224730
2014-12-22 21:20:03 +00:00
0f850bde0e
[Hexagon] Removing old variants of instructions and updating references.
...
llvm-svn: 224612
2014-12-19 20:29:29 +00:00
402f772b82
[Hexagon] Adding doubleregs for control registers. Renaming control register class.
...
llvm-svn: 224598
2014-12-19 18:56:10 +00:00
5ccbb1298b
[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
...
llvm-svn: 224556
2014-12-19 00:06:53 +00:00
174476ed96
Reverting 224550, was not ready for commit.
...
llvm-svn: 224552
2014-12-18 23:36:15 +00:00
9000481cda
[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
...
llvm-svn: 224550
2014-12-18 23:27:51 +00:00
db0b13cef0
[Hexagon] Adding encodings for JR class instructions. Updating complier usages.
...
llvm-svn: 223967
2014-12-10 21:24:10 +00:00
4af437fee5
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
...
llvm-svn: 223821
2014-12-09 20:23:30 +00:00
b580d7d8c8
[Hexagon] Adding word combine dot-new form and replacing old combine opcode.
...
llvm-svn: 223815
2014-12-09 19:23:45 +00:00
30dcb232b0
[Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings.
...
llvm-svn: 223800
2014-12-09 18:16:49 +00:00
5cf5632696
[Hexagon] Removing old def versions and replacing usages with versions that have encodings.
...
llvm-svn: 223720
2014-12-08 23:55:43 +00:00
9bfe5473da
[Hexagon] Adding xtype doubleword comparisons. Removing unused multiclass.
...
llvm-svn: 223701
2014-12-08 21:56:47 +00:00
6e0f9f8d61
[Hexagon] Adding cmp* immediate form instructions.
...
llvm-svn: 222849
2014-11-26 19:43:12 +00:00
902157c249
[Hexagon] Replacing cmp* instructions with ones that contain encoding bits.
...
llvm-svn: 222771
2014-11-25 18:20:52 +00:00
287c4e1762
Removing unused variable.
...
llvm-svn: 222676
2014-11-24 18:55:32 +00:00
397a25e7cd
[Hexagon] Adding asrh instruction, removing unused multiclasses.
...
llvm-svn: 222670
2014-11-24 18:04:42 +00:00
3b3197ef95
[Hexagon] Adding aslh instruction.
...
llvm-svn: 222668
2014-11-24 17:44:19 +00:00
098256c5e6
[Hexagon] Adding zxth instruction.
...
llvm-svn: 222662
2014-11-24 17:11:34 +00:00
bb7d6f5514
[Hexagon] Adding zxtb instruction.
...
llvm-svn: 222660
2014-11-24 16:48:43 +00:00
310991c66f
[Hexagon] Adding sxth instruction.
...
llvm-svn: 222577
2014-11-21 21:54:59 +00:00
91ffec908f
[Hexagon] Adding sxtb instruction. Renaming some identically named classes that will be removed after converting referencing defs.
...
llvm-svn: 222575
2014-11-21 21:35:52 +00:00
e88447d8de
[Hexagon] Removing SUB_rr and replacing with A2_sub.
...
llvm-svn: 222571
2014-11-21 21:19:18 +00:00
ac00643603
[Hexagon] Adding A2_xor instruction with IR selection pattern and test.
...
llvm-svn: 222399
2014-11-19 23:22:23 +00:00
21866546ae
[Hexagon] Adding A2_or instruction with IR selection pattern and test.
...
llvm-svn: 222396
2014-11-19 22:58:04 +00:00
44fd1c8bdf
[Hexagon] Adding A2_and instruction.
...
llvm-svn: 222274
2014-11-18 22:45:47 +00:00
efa74e0280
[Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
...
Adding test to show correct instruction selection and encoding.
llvm-svn: 222249
2014-11-18 20:28:11 +00:00
143f02c47d
Remove unused argument to CreateTargetScheduleState and change
...
the TargetMachine to a TargetSubtargetInfo since everything
we wanted is off of that.
llvm-svn: 219382
2014-10-09 01:59:35 +00:00
2651ae6513
Fix undefined behavior (left shift of negative value) in Hexagon backend.
...
This bug is reported by UBSan.
llvm-svn: 216125
2014-08-20 21:22:03 +00:00
d913448b38
Remove the TargetMachine forwards for TargetSubtargetInfo based
...
information and update all callers. No functional change.
llvm-svn: 214781
2014-08-04 21:25:23 +00:00
35b2f75733
Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the assert.
...
llvm-svn: 211254
2014-06-19 06:10:58 +00:00
062a2baef0
[C++] Use 'nullptr'. Target edition.
...
llvm-svn: 207197
2014-04-25 05:30:21 +00:00
d174b72a28
[cleanup] Lift using directives, DEBUG_TYPE definitions, and even some
...
system headers above the includes of generated '.inc' files that
actually contain code. In a few targets this was already done pretty
consistently, but it wasn't done *really* consistently anywhere. It is
strictly cleaner IMO and necessary in a bunch of places where the
DEBUG_TYPE is referenced from the generated code. Consistency with the
necessary places trumps. Hopefully the build bots are OK with the
movement of intrin.h...
llvm-svn: 206838
2014-04-22 02:03:14 +00:00
e96dd8975f
[Modules] Make Support/Debug.h modular. This requires it to not change
...
behavior based on other files defining DEBUG_TYPE, which means it cannot
define DEBUG_TYPE at all. This is actually better IMO as it forces folks
to define relevant DEBUG_TYPEs for their files. However, it requires all
files that currently use DEBUG(...) to define a DEBUG_TYPE if they don't
already. I've updated all such files in LLVM and will do the same for
other upstream projects.
This still leaves one important change in how LLVM uses the DEBUG_TYPE
macro going forward: we need to only define the macro *after* header
files have been #include-ed. Previously, this wasn't possible because
Debug.h required the macro to be pre-defined. This commit removes that.
By defining DEBUG_TYPE after the includes two things are fixed:
- Header files that need to provide a DEBUG_TYPE for some inline code
can do so by defining the macro before their inline code and undef-ing
it afterward so the macro does not escape.
- We no longer have rampant ODR violations due to including headers with
different DEBUG_TYPE definitions. This may be mostly an academic
violation today, but with modules these types of violations are easy
to check for and potentially very relevant.
Where necessary to suppor headers with DEBUG_TYPE, I have moved the
definitions below the includes in this commit. I plan to move the rest
of the DEBUG_TYPE macros in LLVM in subsequent commits; this one is big
enough.
The comments in Debug.h, which were hilariously out of date already,
have been updated to reflect the recommended practice going forward.
llvm-svn: 206822
2014-04-21 22:55:11 +00:00
b1f25f1b93
Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
...
The old system was fairly convoluted:
* A temporary label was created.
* A single PROLOG_LABEL was created with it.
* A few MCCFIInstructions were created with the same label.
The semantics were that the cfi instructions were mapped to the PROLOG_LABEL
via the temporary label. The output position was that of the PROLOG_LABEL.
The temporary label itself was used only for doing the mapping.
The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to
one by holding an index into the CFI instructions of this function.
I did consider removing MMI.getFrameInstructions completelly and having
CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non
trivial constructors and destructors and are somewhat big, so the this setup
is probably better.
The net result is that we don't create temporary labels that are never used.
llvm-svn: 203204
2014-03-07 06:08:31 +00:00
b6d0bd48bd
[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
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Remove the old functions.
llvm-svn: 202636
2014-03-02 12:27:27 +00:00
cb40291100
Fix known typos
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Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.
llvm-svn: 200018
2014-01-24 17:20:08 +00:00
f907b891da
Correct word hyphenations
...
This patch tries to avoid unrelated changes other than fixing a few
hyphen-related ambiguities and contractions in nearby lines.
llvm-svn: 196471
2013-12-05 05:44:44 +00:00
d12ccbd343
[weak vtables] Remove a bunch of weak vtables
...
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.
Differential Revision: http://llvm-reviews.chandlerc.com/D2068
Reviewed by Andy
llvm-svn: 195064
2013-11-19 00:57:56 +00:00
49109a279c
Revert r194865 and r194874.
...
This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
Base *foo = new Child();
delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.
llvm-svn: 194997
2013-11-18 09:31:53 +00:00
dbedae89b9
[weak vtables] Remove a bunch of weak vtables
...
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.
Differential Revision: http://llvm-reviews.chandlerc.com/D2068
Reviewed by Andy
llvm-svn: 194865
2013-11-15 22:34:48 +00:00
b735b4d6db
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
...
Frame index handling is now target-agnostic, so delete the target hooks
for creation & asm printing of target-specific addressing in DBG_VALUEs
and any related functions.
llvm-svn: 184067
2013-06-16 20:34:27 +00:00
4a7a408eaa
Don't cache the instruction and register info from the TargetMachine, because
...
the internals of TargetMachine could change.
llvm-svn: 183490
2013-06-07 06:19:56 +00:00
438cec566b
Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.
...
No functionality change.
llvm-svn: 181628
2013-05-10 20:58:11 +00:00
300f0b966c
Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.
...
llvm-svn: 181624
2013-05-10 20:27:34 +00:00
00681dc1f0
Hexagon: Remove switch cases from GetDotNewPredOp and isPostIncrement functions.
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No functionality change.
llvm-svn: 181535
2013-05-09 19:16:07 +00:00
978e972ff9
Hexagon: Use relation map for getMatchingCondBranchOpcode() and
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getInvertedPredicatedOpcode() functions instead of switch cases.
llvm-svn: 181530
2013-05-09 18:25:44 +00:00
84c471029b
Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
...
llvm-svn: 181235
2013-05-06 18:49:23 +00:00
1c76f155b1
Fix missing include in Hexagon code for Release+Asserts
...
llvm-svn: 180983
2013-05-03 00:54:56 +00:00
a841af7556
reverting r180953
...
llvm-svn: 180964
2013-05-02 22:10:59 +00:00
7e7c730c4f
Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
...
llvm-svn: 180953
2013-05-02 21:21:57 +00:00
1d29750b7d
Hexagon: Honor __builtin_expect by using branch probabilities.
...
* lib/Target/Hexagon/HexagonInstrInfo.cpp (GetDotNewPredOp):
Given a jump opcode return the right pred.new jump opcode with
a taken vs not-taken hint based on branch probabilities provided
by the target independent module.
* lib/Target/Hexagon/HexagonVLIWPacketizer.cpp: Use the above function.
* lib/Target/Hexagon/HexagonNewValueJump.cpp(getNewvalueJumpOpcode):
Enhance existing function use branch probabilities like
HexagonInstrInfo::GetDotNewPredOp but for New Value (GPR) Jumps.
llvm-svn: 180923
2013-05-02 15:39:30 +00:00
5ed5181178
Hexagon: Use multiclass for Jump instructions.
...
llvm-svn: 180885
2013-05-01 21:37:34 +00:00
cd66c0a270
Hexagon: Clear isKill flag on the predicate register in
...
PredicateInstruction function.
llvm-svn: 180884
2013-05-01 21:27:30 +00:00
89c84821ea
Hexagon: Remove assembler mapped instruction definitions.
...
llvm-svn: 180133
2013-04-23 19:15:55 +00:00
a696239bec
Hexagon: Remove duplicate instructions to handle global/immediate values
...
for absolute/absolute-set addressing modes.
llvm-svn: 180120
2013-04-23 17:11:46 +00:00
add82b3c75
Hexagon: Add emitFrameIndexDebugValue function to emit debug information.
...
llvm-svn: 178368
2013-03-29 21:09:53 +00:00
a46059b74d
Hexagon: Replace switch-case in isDotNewInst with TSFlags.
...
llvm-svn: 178281
2013-03-28 19:44:04 +00:00
fdc660bf2e
Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
...
llvm-svn: 177747
2013-03-22 18:41:34 +00:00
ec613665c2
Hexagon: Removed asserts regarding alignment and offset.
...
We are warning the user about the alignment, so we should not assert.
llvm-svn: 177103
2013-03-14 19:08:03 +00:00
f1214a8ab7
Hexagon: Use MO operand flags to mark constant extended instructions.
...
llvm-svn: 176500
2013-03-05 18:51:42 +00:00
8425643728
Hexagon: Add constant extender support framework.
...
llvm-svn: 176358
2013-03-01 17:37:13 +00:00
Krzysztof Parzyszek