Commit Graph

592 Commits

Author SHA1 Message Date
Pavel Labath 4a705e7ea0 Implement QPassSignals GDB package in lldb-server
Summary: QPassSignals package allows lldb client to tell lldb-server to ignore certain types of signals and re-inject them back to inferior without stopping execution.

Reviewers: jmajors, labath

Subscribers: danalbert, srhines, emaste, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D30286
Author: Eugene Zemtsov <ezemtsov@google.com>

llvm-svn: 296101
2017-02-24 09:29:14 +00:00
Pavel Labath 28096200a8 NPL: Fix an incorrect logging formatv call
llvm-svn: 295457
2017-02-17 16:09:10 +00:00
Pavel Labath a37bbbd432 NPL: Fix one more bug in the single step workaround
In the case we are stepping over the thread creation instruction, we
will end up calling Thread::SingleStep back-to-back twice (because of
the intermediate PTRACE_EVENT_CLONE stop). This will cause the cpu mask
to be set inappropriately (because the old SingleStepCheck object will
be destroyed after we create the new one), and the single-step will
fail.

Before the refactor the code was still incorrect in this case, but in a
different way (the thread was left with the incorrect mask after the
stepping was complete), so this was not easy to spot.

This fixes TestCreateDuringInstructionStep on the affected devices.

llvm-svn: 295440
2017-02-17 11:48:34 +00:00
Zachary Turner 24ae6294a4 Finish breaking the dependency from Utility.
Differential Revision: https://reviews.llvm.org/D29964

llvm-svn: 295368
2017-02-16 19:38:21 +00:00
Pavel Labath 7278496ccf NPL: Fix single step workaround
While refactoring the code in r293046 I made a very basic error -
relying on destructor side-effects of a copyable object. Fix that and
make the object non-copyable.

This fixes the tests on the platforms that need this workaround, but
unfortunately we don't have a way to make a more platform-agnostic test
right now.

llvm-svn: 295345
2017-02-16 18:12:04 +00:00
Pavel Labath aafe053c53 Remove the verbose category in the posix channel
replace by LLDB_LOGV

llvm-svn: 294223
2017-02-06 19:31:05 +00:00
Pavel Labath 4ee1c95216 Fix missing include in NativeProcessLinux
llvm-svn: 294211
2017-02-06 18:36:58 +00:00
Kamil Rytarowski c5f28e2a05 Switch std::call_once to llvm::call_once
Summary:
The std::call_once implementation in libstdc++ has problems on few systems: NetBSD, OpenBSD and Linux PPC. LLVM ships with a homegrown implementation llvm::call_once to help on these platforms.

This change is required in the NetBSD LLDB port. std::call_once with libstdc++ results with crashing the debugger.

Sponsored by <The NetBSD Foundation>

Reviewers: labath, joerg, emaste, mehdi_amini, clayborg

Reviewed By: labath, clayborg

Subscribers: #lldb

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D29288

llvm-svn: 294202
2017-02-06 17:55:02 +00:00
Pavel Labath ea1b6b17dc Use LLDB_LOG in NativeRegisterContextLinux*** files
llvm-svn: 294023
2017-02-03 18:50:41 +00:00
Zachary Turner bf9a77305f Move classes from Core -> Utility.
This moves the following classes from Core -> Utility.

ConstString
Error
RegularExpression
Stream
StreamString

The goal here is to get lldbUtility into a state where it has
no dependendencies except on itself and LLVM, so it can be the
starting point at which to start untangling LLDB's dependencies.
These are all low level and very widely used classes, and
previously lldbUtility had dependencies up to lldbCore in order
to use these classes.  So moving then down to lldbUtility makes
sense from both the short term and long term perspective in
solving this problem.

Differential Revision: https://reviews.llvm.org/D29427

llvm-svn: 293941
2017-02-02 21:39:50 +00:00
Kamil Rytarowski 816ae4b0df Transform ProcessLauncherLinux to ProcessLauncherPosixFork
Summary:
Use ProcessLauncherPosixFork in Linux and NetBSD.

Changes to ProcessLauncherLinux:
 - Limit personality.h and ASLR code to Linux.
 - Reuse portable ptrace(2) PT_TRACE_ME operation available on Linux and BSDs.
 - Limit ETXTBSY error path from execve(2) to Linux.
 - In LaunchProcess declaration change virtual to override.

This code should be readily available for FreeBSD.

Sponsored by <The NetBSD Foundation>

Reviewers: joerg, clayborg, labath, emaste

Reviewed By: labath

Subscribers: danalbert, srhines, mgorny, #lldb

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D29347

llvm-svn: 293768
2017-02-01 14:30:40 +00:00
Chris Bieneman 81b8f12b42 [CMake] [3/4] Update a batch of plugins
This is extending the updates from r293696 to more LLDB plugins.

llvm-svn: 293700
2017-01-31 22:29:11 +00:00
Pavel Labath 8abd34f015 NPL: Compartmentalize arm64 single step workaround better
The main motivation for me doing this is being able to build an arm
android lldb-server against api level 9 headers, but it seems like a
good cleanup nonetheless.

The entirety of the cpu_set_t dance now resides in SingleStepCheck.cpp,
which is only built on arm64.

llvm-svn: 293046
2017-01-25 11:19:45 +00:00
Pavel Labath b699c548c6 android-mips: define PTRACE_GETREGSET in headers don't do it
PTRACE_GETREGSET is only defined on mips only since api level 21. Define
it ourselves, so we can compile with older platform headers.

llvm-svn: 292936
2017-01-24 14:27:51 +00:00
Pavel Labath 8198db30f3 Add format_provider for lldb::StateType
Reviewers: clayborg

Subscribers: mgorny, lldb-commits

Differential Revision: https://reviews.llvm.org/D29036

llvm-svn: 292920
2017-01-24 11:48:25 +00:00
Hafiz Abid Qadeer b1554311d3 Fix more unused variable warnings when asserts are disabled.
llvm-svn: 292598
2017-01-20 10:24:03 +00:00
Pavel Labath a6321a8e95 Refactor logging in NativeProcessLinux
Use the LLDB_LOG macro instead of the more verbose if(log) ... syntax.

I have also consolidated the log channels (everything now goes to the posix
channel, instead of a mixture of posix and lldb), and cleaned up some of the
more convoluted log statements.

llvm-svn: 292489
2017-01-19 15:26:04 +00:00
Tamas Berghammer a6f5795ae2 Improve the performance of jModulesInfo in lldb-server
Previously it parsed /proc/<pid>/maps for every module separately
resulting in a very slow response time. This CL add some caching and
optimizes the implementation to improve the code from O(n*m) to O(n+m)
where n is the number of modules requested and m is the number of
files mapped into memory.

Differential revision: https://reviews.llvm.org/D28233

llvm-svn: 290895
2017-01-03 16:29:43 +00:00
Pavel Labath 1f2c1b6ccd Remove linux/personality.h wrapper
This code is currently unused.

Removing it should make porting of the linux plugin to NetBSD easier, and we can
always add it later if needed.

llvm-svn: 289801
2016-12-15 10:47:40 +00:00
Pavel Labath 6ec13991f5 Fix floating point register reads x86_64 linux on targets with no AVX support
Summary:
On for 64-bit targets, the correct register set to read the fxsave are is
NT_PRFPREG (only 32-bit targets need NT_PRXFPREG, presumably for historic
reasons). Reference:
<https://github.com/torvalds/linux/blob/v4.8/arch/x86/kernel/ptrace.c#L1261>.

Reviewers: tberghammer, valentinagiusti

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D27161

llvm-svn: 288038
2016-11-28 15:51:47 +00:00
Pavel Labath 3f8c78168e Merge Linux and FreeBSD arm64 register contexts
Summary:
This is a test-the-water change about possibilities of reducing duplication in
the register context definitions.

I've named the new class RegisterInfoPOSIX, as RegisterContextPOSIX was already
taken :(.  The two files were identical except for a fix by Tamas in D12636,
which was applied to the Linux version only, which fixed a discrepancy between
the definitions of fpsr and fpcr on one hand, and all other floating point
register definitions on the other.

Linux test suite still passes after this change. For freebsd, make the floating
point register behavior consistent, but I don't know whether it will be
consistently fixed, or consistently broken. By eyeballing the code, I have a
feeling that a similar fix to D12636 will be required in
RegisterContextPOSIXProcessMonitor_arm64::ReadRegister, but I can't be sure as I
have no way to test it (the assert in that function should fire upon accessing
the registers if it is wrong though).

Reviewers: emaste, clayborg

Subscribers: aemerson, rengolin, beanz, mgorny, modocache, dmikulin, lldb-commits

Differential Revision: https://reviews.llvm.org/D25947

llvm-svn: 287916
2016-11-25 10:28:09 +00:00
Mehdi Amini 665be50e37 Revert unwanted changes in lldb when updating llvm::Error()
My script updated lldb::Errors, and I failed to fix it entirely
before pushing. This restore everything in lldb as it was before
r286561.

llvm-svn: 286565
2016-11-11 05:07:57 +00:00
Mehdi Amini 41af43092c Make the Error class constructor protected
This is forcing to use Error::success(), which is in a wide majority
of cases a lot more readable.

Differential Revision: https://reviews.llvm.org/D26481

llvm-svn: 286561
2016-11-11 04:28:40 +00:00
Malcolm Parsons 771ef6d4f1 Fix Clang-tidy readability-redundant-string-cstr warnings
Reviewers: zturner, labath

Subscribers: tberghammer, danalbert, lldb-commits
    
Differential Revision: https://reviews.llvm.org/D26233

llvm-svn: 285855
2016-11-02 20:34:10 +00:00
Stephane Sezer 8004a57d79 Remove executable bit on a source file
llvm-svn: 285658
2016-11-01 00:21:57 +00:00
Pavel Labath 42eb6908e0 Don't set a software stepping breakpoint at 0 on arm or mips.
Summary:
Check whether the setting the breakpoint failed during instruction emulation. If
it did, the next pc is likely in unmapped memory, and the inferior will crash
anyway after the next instruction. Do not return an error in this case, but just
continue stepping.
Reenabled the crash during step test for android/linux.

Reviewers: labath

Subscribers: aemerson, rengolin, tberghammer, danalbert, srhines, lldb-commits

Differential Revision: https://reviews.llvm.org/D25926
Author: Jason Majors <jmajors@google.com>

llvm-svn: 285187
2016-10-26 11:13:56 +00:00
Pavel Labath 16706dcbd4 Add the new arm64 sub-register definitions to NativeRegisterContextLinux
It's quite sad that we have to edit so many files just to add a register. I am
going to investigate how to merge these definitions somehow, but for now this
should at least get arm64 linux working again.

llvm-svn: 284970
2016-10-24 12:59:20 +00:00
Omair Javaid 05ac4c445c Fix ARM/AArch64 Step-Over watchpoint issue remove provision for duplicate watchpoints
This patch fixes ARM/AArch64 watchpoint bug which was taking inferior out of control while stepping over watchpoints.
Also adds a test case that tests above problem.

Differential revision: https://reviews.llvm.org/D25057

llvm-svn: 284706
2016-10-20 09:07:26 +00:00
Nitesh Jain 47a2c55447 [LLDB][MIPS] fix Floating point register read/write for big endian
Reviewers: clayborg, labath, jaydeep

Subscribers: bhushan, slthakur, lldb-commits

Differential Revision: https://reviews.llvm.org/D24603

llvm-svn: 284003
2016-10-12 10:53:57 +00:00
Nitesh Jain a160ae8a04 [LLDB][MIPS] Fix register read/write for 32 bit big endian system
Reviewers: clayborg, labath

Subscribers: jaydeep, bhushan, mohit.bhakkad, slthakur, llvm-commits

Differential Revision: https://reviews.llvm.org/D24124

llvm-svn: 283728
2016-10-10 09:02:41 +00:00
Valentina Giusti 6f8c1f8da7 Add bound violation handling for Intel(R) Memory Protection Extensions (Intel(R) MPX)
Summary:
This patch adds support for handling the SIGSEGV signal with 'si_code ==
SEGV_BNDERR', which is thrown when a bound violation is caught by the
Intel(R) MPX technology.

Differential Revision: https://reviews.llvm.org/D25329

llvm-svn: 283474
2016-10-06 18:05:12 +00:00
Valentina Giusti 58db5bb20e Refactor NativeRegisterContextLinux_x86_64 code.
This patch refactors the way the XState type is checked and, in order to
simplify the code, it removes the usage of the 'cpuid' instruction: just checking
if the ptrace calls done throuhg ReadFPR is enough to verify both if there is
HW support and if there is kernel support. Also the XCR0 bits are enough to check if
there is both HW and kernel support for AVX and MPX.

Differential Revision: https://reviews.llvm.org/D24764

llvm-svn: 282072
2016-09-21 13:33:01 +00:00
Valentina Giusti 97e57e9b39 Use 'enum class' instead of 'enum' in NativeRegisterContextLinux_x86_x64.
Reviewers: labath, clayborg, zturner

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D24578

llvm-svn: 281528
2016-09-14 20:12:12 +00:00
Valentina Giusti 5f957b54c8 Use Intel CPU flags to determine target supported features.
Summary:
This patch uses the instruction CPUID to verify that FXSAVE, XSAVE, AVX
and MPX are supported by the target hardware. In case the HW supports XSAVE,
and at least one of the extended register sets, it further checks if the
target software has the kernel support for such features, by verifying that
their XSAVE part is correctly managed.

Differential Revision: https://reviews.llvm.org/D24559

llvm-svn: 281507
2016-09-14 17:27:48 +00:00
Valentina Giusti cda0ae46ac Fix for rL280668, Intel(R) Memory Protection Extensions (Intel(R) MPX) support.
Summary: Signed-off-by: Valentina Giusti <valentina.giusti@intel.com>

Reviewers: dvlahovski, granata.enrico, clayborg, labath

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D24255

llvm-svn: 280942
2016-09-08 14:16:45 +00:00
Kate Stone b9c1b51e45 *** This commit represents a complete reformatting of the LLDB source code
*** to conform to clang-format’s LLVM style.  This kind of mass change has
*** two obvious implications:

Firstly, merging this particular commit into a downstream fork may be a huge
effort.  Alternatively, it may be worth merging all changes up to this commit,
performing the same reformatting operation locally, and then discarding the
merge for this particular commit.  The commands used to accomplish this
reformatting were as follows (with current working directory as the root of
the repository):

    find . \( -iname "*.c" -or -iname "*.cpp" -or -iname "*.h" -or -iname "*.mm" \) -exec clang-format -i {} +
    find . -iname "*.py" -exec autopep8 --in-place --aggressive --aggressive {} + ;

The version of clang-format used was 3.9.0, and autopep8 was 1.2.4.

Secondly, “blame” style tools will generally point to this commit instead of
a meaningful prior commit.  There are alternatives available that will attempt
to look through this change and find the appropriate prior commit.  YMMV.

llvm-svn: 280751
2016-09-06 20:57:50 +00:00
Dimitar Vlahovski ee44a92df6 Revert "Intel(R) Memory Protection Extensions (Intel(R) MPX) support."
This reverts commit rL280668 because the register tests fail on i386
Linux.

I investigated a little bit what causes the failure - there are missing
registers when running 'register read -a'.
This is the output I got at the bottom:
"""
...
Memory Protection Extensions:
      bnd0 = {0x0000000000000000 0x0000000000000000}
      bnd1 = {0x0000000000000000 0x0000000000000000}
      bnd2 = {0x0000000000000000 0x0000000000000000}
      bnd3 = {0x0000000000000000 0x0000000000000000}

unknown:
2 registers were unavailable.
"""

Also looking at the packets exchanged between the client and server:
"""
...
history[308] tid=0x7338 <  19> send packet: $qRegisterInfo4a#d7
history[309] tid=0x7338 < 130> read packet:
$name:bnd0;bitsize:128;offset:1032;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:101;dwarf:101;#48
history[310] tid=0x7338 <  19> send packet: $qRegisterInfo4b#d8
history[311] tid=0x7338 < 130> read packet:
$name:bnd1;bitsize:128;offset:1048;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:102;dwarf:102;#52
history[312] tid=0x7338 <  19> send packet: $qRegisterInfo4c#d9
history[313] tid=0x7338 < 130> read packet:
$name:bnd2;bitsize:128;offset:1064;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:103;dwarf:103;#53
history[314] tid=0x7338 <  19> send packet: $qRegisterInfo4d#da
history[315] tid=0x7338 < 130> read packet:
$name:bnd3;bitsize:128;offset:1080;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:104;dwarf:104;#54
history[316] tid=0x7338 <  19> send packet: $qRegisterInfo4e#db
history[317] tid=0x7338 <  76> read packet:
$name:bndcfgu;bitsize:64;offset:1096;encoding:vector;format:vector-uint8;#99
history[318] tid=0x7338 <  19> send packet: $qRegisterInfo4f#dc
history[319] tid=0x7338 <  78> read packet:
$name:bndstatus;bitsize:64;offset:1104;encoding:vector;format:vector-uint8;#8e
...
"""

The bndcfgu and bndstatus registers don't have the 'Memory Protections
Extension' set. I looked at the code and it seems that that is set
correctly.

So I'm not sure what's the problem or where does it come from.

Also there is a second failure related to something like this in the
tests:
"""
registerSet.GetName().lower()
"""

For some reason the registerSet.GetName() returns None.

llvm-svn: 280703
2016-09-06 11:00:37 +00:00
Valentina Giusti f105abbc0d Intel(R) Memory Protection Extensions (Intel(R) MPX) support.
Summary:

The Intel(R) Memory Protection Extensions (Intel(R) MPX) associates pointers
to bounds, against which the software can check memory references to
prevent out of bound memory access.

This patch allows accessing the MPX registers:
  * bnd0-3: 128-bit registers to hold the bound values,
  * bndcfgu, bndstatus: 64-bit configuration registers,

This patch also adds read/write tests for the MPX registers in the register
command tests and adds a new subdirectory for MPX specific tests.

Signed-off-by: Valentina Giusti <valentina.giusti@intel.com>

Reviewers: labath, granata.enrico, lldb-commits, clayborg

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D24187

llvm-svn: 280668
2016-09-05 17:43:10 +00:00
Todd Fiala e77fce0a50 [NFC] Darwin llgs support from Week of Code
This code represents the Week of Code work I did on bringing up
lldb-server LLGS support for Darwin.  It does not include the
Xcode project changes needed, as we don't want to throw that switch
until more support is implemented (i.e. this change is inert, no
build systems use it yet.  I've verified on Ubuntu 16.04, macOS
Xcode and macOS cmake builds).

This change does some minimal refactoring of code that is shared
with the Linux LLGS portion, moving it from NativeProcessLinux into
NativeProcessProtocol.  That code is also used by NativeProcessDarwin.

Current state on Darwin:
* Process launching is implemented.  (Attach is not).
  Launching on devices has not yet been tested (FBS/BKS might
  need a bit of work).
* Inferior waitpid monitoring and communication of exit status
  via MainLoop callback is implemented.
* Memory read/write, breakpoints, thread register context, etc.
  are not yet implemented.  This impacts process stop/resume, as
  the initial launch suspended immediately starts the process
  up and running because it doesn't know it is supposed to remain
  stopped.
* I implemented the equivalent of MachThreadList as
  NativeThreadListDarwin, in anticipation that we might want to
  factor out common parts into NativeThreadList{Protocol} and share
  some code here.  After writing it, though, the fallout from merging
  Mach Task/Process into a single concept plus some other minor
  changes makes the whole NativeThreadListDarwin concept nothing more
  than dead weight.  I am likely going to get rid of this class and
  just manage it directly in NativeProcessDarwin, much like I did
  for NativeProcessLinux.
* There is a stub-out call for starting a STDIO thread.  That will
  go away and adopt the MainLoop pselect-based IOObject reading.

I am developing the fully-integrated changes in the following repo,
which contains the necessary Xcode bits and the glue that enables
lldb-debugserver on a macOS system:

  https://github.com/tfiala/lldb/tree/llgs-darwin

This change also breaks out a few of the lldb-server tests into
their own directory, and adds some $qHostInfo tests (not sure why
I didn't write those tests back when I initially implemented that
on the Linux side).

llvm-svn: 280604
2016-09-04 00:18:56 +00:00
Pavel Labath b9739d4090 Revert r280137 and 280139 and subsequent build fixes
The rewrite of StringExtractor::GetHexMaxU32 changes functionality in a way which makes
lldb-server crash. The crash (assert) happens when parsing the "qRegisterInfo0" packet, because
the function tries to drop_front more bytes than the packet contains. It's not clear to me
whether we should consider this a bug in the caller or the callee, but it any case, it worked
before, so I am reverting this until we can figure out what the proper interface should be.

llvm-svn: 280207
2016-08-31 08:43:37 +00:00
Pavel Labath 1e3b086749 Revert r280200 and put it a proper fix
PeekChar returns a character, we want the whole string there.

llvm-svn: 280204
2016-08-31 07:49:37 +00:00
Sylvestre Ledru 2c07a069b8 Update the Linux code to reflect the changes done by zturner in r280139
llvm-svn: 280200
2016-08-31 07:16:56 +00:00
Pavel Labath c923a3dc00 Remove SYS_tgkill from Android.h
instead, use __NR_tgkill directly, which seems to be the preferred form in the codebase anyway.

llvm-svn: 277999
2016-08-08 12:40:11 +00:00
Tamas Berghammer d7d69f8083 Support loading files even when incorrect file name specified by the linker
"Incorrect" file name seen on Android whene the main executable is
called "app_process32" (or 64) but the linker specifies the package
name (e.g. com.android.calculator2). Additionally it can be present
in case of some linker bugs.

This CL adds logic to try to fetch the correct file name from the proc
file system based on the base address sepcified by the linker in case
we are failed to load the module by name.

Differential revision: http://reviews.llvm.org/D22219

llvm-svn: 276411
2016-07-22 12:55:35 +00:00
Pavel Labath 5ad891f719 Unify process launching code on linux
Summary:
We've had two copies of code for launching processes:
- one in NativeProcessLinux, used for launching debugged processes
- one in ProcessLauncherAndroid, used on android for launching all other kinds of processes

These have over time acquired support for various launch options, but neither supported all of
them. I now replace them with a single implementation ProcessLauncherLinux, which supports all
the options the individual versions supported and set it to be used to launch all processes on
linux.

This also works around the ETXTBSY issue on android when the process is started from the platform
instance, as that used to go through the version which did not contain the workaround.

Reviewers: tberghammer

Subscribers: tberghammer, danalbert, srhines, lldb-commits

Differential Revision: https://reviews.llvm.org/D22457

llvm-svn: 276288
2016-07-21 14:54:03 +00:00
Nitesh Jain de69d40686 [LLVM][MIPS] Revert support for FRE.
Reviewers: jaydeep

Subscribers: bhushan, mohit.bhakkad, slthakur, llvm-commits
llvm-svn: 275785
2016-07-18 12:37:44 +00:00
Pavel Labath 4abe5d69ea [NPL] Simplify process launch code
Summary:
This removes one level of indirection, which was just packing and repacking launch args into
different structures. NFC.

Reviewers: tberghammer

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D22357

llvm-svn: 275544
2016-07-15 10:18:15 +00:00
Pavel Labath 3be0a3a173 [NPL] Increase ETXTBSY workaround sleep
10ms does not seem to be enough all the time, go to 50.

llvm-svn: 275175
2016-07-12 15:13:11 +00:00
Tamas Berghammer c73301bbe3 Change the /proc/<pid>/maps to not assert on incorrect input
If LLDB reads some incorrect input form /proc/<pid>/maps then it
should report an error instead of assert-ing as we don't want to
crash in case of an incorrect maps file.

Differential revision: http://reviews.llvm.org/D22211

llvm-svn: 275060
2016-07-11 13:43:27 +00:00
Pavel Labath ca92aed5dc [LLGS] Work around an adb bug on Android <=M
On android M it can happen that we get a ETXTBSY, when we try to launch the inferior. Sleeping
and retrying should help us get more stable results.

llvm-svn: 274763
2016-07-07 15:46:00 +00:00
Howard Hellyer ad00756301 Implement GetMemoryRegions() for Linux and Mac OSX core files.
Summary:
This patch fills in the implementation of GetMemoryRegions() on the Linux and Mac OS core file implementations of lldb_private::Process (ProcessElfCore::GetMemoryRegions and ProcessMachCore::GetMemoryRegions.) The GetMemoryRegions API was added under: http://reviews.llvm.org/D20565

The patch re-uses the m_core_range_infos list that was recently added to implement GetMemoryRegionInfo in both ProcessElfCore and ProcessMachCore to ensure the returned regions match the regions returned by Process::GetMemoryRegionInfo(addr_t load_addr, MemoryRegionInfo &region_info).

Reviewers: clayborg

Subscribers: labath, lldb-commits

Differential Revision: http://reviews.llvm.org/D21751

llvm-svn: 274741
2016-07-07 08:21:28 +00:00
Pavel Labath 0c4f01d44b [LLGS] Log more precise errors during inferior launch
Summary:
We are seeing infrequent failures to launch the inferior process on android. The failing call
seems to be execve(). This adds more logging to see the actual error reported by the call.

Reviewers: tberghammer

Subscribers: tberghammer, lldb-commits, danalbert

Differential Revision: http://reviews.llvm.org/D22039

llvm-svn: 274624
2016-07-06 13:18:50 +00:00
Omair Javaid 62661473c2 Improve watchpoint error reporting specially for arm/aarch64 targets
Differential revision: http://reviews.llvm.org/D21164

llvm-svn: 273869
2016-06-27 12:35:41 +00:00
Omair Javaid c6dc90ef87 Allow unaligned byte/word selection watchpoints for arm- linux/android targets.
Differential revision: http://reviews.llvm.org/D21516

llvm-svn: 273863
2016-06-27 11:18:23 +00:00
Omair Javaid 43507f573d Allow installing watchpoints at less than 8-byte alligned addresses for AArch64 targets
This patch allows LLDB for AArch64 to watch all bytes, words or double words individually on non 8-byte alligned addresses.

This patch also adds tests to verify this functionality.

Differential revision: http://reviews.llvm.org/D21280

llvm-svn: 272916
2016-06-16 16:41:22 +00:00
Pavel Labath 2a86b555e1 Remove Platform usages from NativeProcessLinux
Summary:
This removes the last usage of the Platform plugin in NPL. It was being
used for determining the architecture of the debugged process. I replace
the call that went through the Platform plugin with a lower level call
on the ObjectFile directly.

Reviewers: tberghammer

Subscribers: uweigand, nitesh.jain, omjavaid, lldb-commits

Differential Revision: http://reviews.llvm.org/D21324

llvm-svn: 272686
2016-06-14 17:30:52 +00:00
Pavel Labath 57a77118ba Remove Mutex from NativeProcessLinux
NPL now assumes it is running from a single thread now, so its thread-safety is untested
anyway (and if that assumption is broken, we'll have bigger problems (due to ptrace restrictions)
than a couple of missing mutexes).

llvm-svn: 269640
2016-05-16 09:18:30 +00:00
Ulrich Weigand bb00d0b6b2 Support Linux on SystemZ as platform
This patch adds support for Linux on SystemZ:
- A new ArchSpec value of eCore_s390x_generic
- A new directory Plugins/ABI/SysV-s390x providing an ABI implementation
- Register context support
- Native Linux support including watchpoint support
- ELF core file support
- Misc. support throughout the code base (e.g. breakpoint opcodes)
- Test case updates to support the platform

This should provide complete support for debugging the SystemZ platform.
Not yet supported are optional features like transaction support (zEC12)
or SIMD vector support (z13).

There is no instruction emulation, since our ABI requires that all code
provide correct DWARF CFI at all PC locations in .eh_frame to support
unwinding (i.e. -fasynchronous-unwind-tables is on by default).

The implementation follows existing platforms in a mostly straightforward
manner.  A couple of things that are different:

- We do not use PTRACE_PEEKUSER / PTRACE_POKEUSER to access single registers,
  since some registers (access register) reside at offsets in the user area
  that are multiples of 4, but the PTRACE_PEEKUSER interface only allows
  accessing aligned 8-byte blocks in the user area.  Instead, we use a s390
  specific ptrace interface PTRACE_PEEKUSR_AREA / PTRACE_POKEUSR_AREA that
  allows accessing a whole block of the user area in one go, so in effect
  allowing to treat parts of the user area as register sets.

- SystemZ hardware does not provide any means to implement read watchpoints,
  only write watchpoints.  In fact, we can only support a *single* write
  watchpoint (but this can span a range of arbitrary size).  In LLDB this
  means we support only a single watchpoint.  I've set all test cases that
  require read watchpoints (or multiple watchpoints) to expected failure
  on the platform.  [ Note that there were two test cases that install
  a read/write watchpoint even though they nowhere rely on the "read"
  property.  I've changed those to simply use plain write watchpoints. ]

Differential Revision: http://reviews.llvm.org/D18978

llvm-svn: 266308
2016-04-14 14:28:34 +00:00
Saleem Abdulrasool dd4799c28e Process: fix the build with certain kernel versions
The structure definitions are not provided, but we perform a sizeof operation of
them which causes a build failure.  Include `asm/ptrace.h` to get the structure
definitions.

llvm-svn: 266042
2016-04-12 05:40:51 +00:00
Pavel Labath 605b51b84e Work around a stepping bug in arm64 android M
Summary:
On arm64, linux<=4.4 and Android<=M there is a bug, which prevents single-stepping from working when
the system comes back from suspend, because of incorrectly initialized CPUs. This did not really
affect Android<M, because it did not use software suspend, but it is a problem for M, which uses
suspend (doze) quite extensively.  Fortunately, it seems that the first CPU is not affected by
this bug, so this commit implements a workaround by forcing the inferior to execute on the first
cpu whenever we are doing single stepping.

While inside, I have moved the implementations of Resume() and SingleStep() to the thread class
(instead of process).

Reviewers: tberghammer, ovyalov

Subscribers: aemerson, rengolin, tberghammer, danalbert, srhines, lldb-commits

Differential Revision: http://reviews.llvm.org/D17509

llvm-svn: 261636
2016-02-23 13:56:30 +00:00
Pavel Labath 7326c01aaa [linux] Remove all traces of signalfd(2)
Summary:
Signalfd is not used in the code anymore, and given that the same functionality can be achieved
with the new MainLoop class, it's unlikely we will need it in the future. Remove all traces of
it.

Reviewers: tberghammer, ovyalov

Subscribers: tberghammer, danalbert, srhines, lldb-commits

Differential Revision: http://reviews.llvm.org/D17510

llvm-svn: 261631
2016-02-23 12:26:08 +00:00
Tamas Berghammer be379e1590 Revert "Use BKPT instead of UDF for arm/thumb breakpoints"
This reverts commit 293c18e067d663e0fe93e6f3d800c2a4bfada2b0.

The BKPT instruction generates SIGBUS instead of SIGTRAP in the Linux
kernel on Nexus 6 - 5.1.1 (kernel version 3.10.40). Revert the CL
until we can figure out how can we hanble the SIGBUS or how to get
back a SIGTRAP using the BKPT instruction.

llvm-svn: 260969
2016-02-16 15:14:36 +00:00
Tamas Berghammer 1b6dacbb86 Use BKPT instead of UDF for arm/thumb breakpoints
The UDF instruction is deprecated in armv7 and in case of thumb2
instructions set it don't work well together with the IT instruction.

Differential revision: http://reviews.llvm.org/D16853

llvm-svn: 260367
2016-02-10 10:42:00 +00:00
Eugene Zelenko c33088f41e Remove autoconf support from source directories.
Differential revision: http://reviews.llvm.org/D16662

llvm-svn: 259098
2016-01-28 22:05:24 +00:00
Tamas Berghammer 239132f452 Try to fix the mips64 build after rL257447
llvm-svn: 257469
2016-01-12 10:41:43 +00:00
Mohit K. Bhakkad 64322c0331 [LLDB][MIPS] Fix ReadRegisterValue for registers with constant 32 bit size regardless of ABI
Reviewers: clayborg, tberghammer.
Subscribers: jaydeep, bhushan, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D16060

llvm-svn: 257447
2016-01-12 05:55:03 +00:00
Tamas Berghammer e85e6021f0 Make the aarch64 lldb-server capable of debugging arm32 applications
Differential revision: http://reviews.llvm.org/D15533

llvm-svn: 257322
2016-01-11 10:39:09 +00:00
Omair Javaid a7d7f7cf33 Fix for undefined behavior while updating PC value on arm-linux
Differential revision: http://reviews.llvm.org/D15877

llvm-svn: 256847
2016-01-05 16:56:13 +00:00
Sagar Thakur 307a3ba3b3 [LLDB][MIPS] Make register read/write to set/get the size of register according to abi.
Summary:
For O32 abi register size should be 4 bytes.
For N32 and N64 abi register size should be 8 bytes.
This patch will make register read/write to set/get the size of register according to abi.

Reviewers: clayborg, tberghammer
Subscribers: lldb-commits, nitesh.jain, mohit.bhakkad, bhushan, jaydeep
Differential: http://reviews.llvm.org/D15884
llvm-svn: 256834
2016-01-05 14:03:45 +00:00
Mohit K. Bhakkad f6ef187b9b [LLDB] Fix Read/Write memory to be compatible with both endians
Reviewers: tberghammer.
Subscribers:  jaydeep, bhushan, sagar, nitesh.jain,lldb-commits.
Differential Revision: http://reviews.llvm.org/D15738

llvm-svn: 256331
2015-12-23 12:34:58 +00:00
Oleksiy Vyalov 9497cc2bf8 Remove unused mips typedefs.
llvm-svn: 255419
2015-12-12 02:13:17 +00:00
Sagar Thakur 4f58827a57 [LLDB][MIPS] Adding call to IsMSAAvailable() while creating RegisterInfoInterface
This patch will fix the test case test_p_returns_correct_data_size_for_each_qRegisterInfo_attach_llgs_* of TestLldbGdbServer.py on mips. The test fails because we were sending RegisterInfo for msa registers to client even when msa registers are not available. With this commit server will send E45(end of resigters) response if msa registers are not available.

llvm-svn: 255108
2015-12-09 12:31:01 +00:00
Jaydeep Patil 7b531c1a11 [LLDB][MIPS] Using enum instead of a constant to fetch PC and CAUSE registers.
SUMMARY:
    Using enum instead of a constant to fetch PC and CAUSE registers.

llvm-svn: 254590
2015-12-03 06:41:24 +00:00
Abhishek Aggarwal 296e063d8f PTRACE ABI to read FXSAVE area for 32-bit inferior
Summary:
 - Problem occurs when:
    -- 32-bit inferiors run on x86_32 machine and
       the architecture doesn't have AVX feature

    -- This causes FPRType to be set to eFPRTypeFXSAVE

    -- PTRACE_GETFPREGS was being used to read FXSAVE area

    -- For 32-bit inferiors running on x86_32 machine,
       PTRACE_GETFPREGS reads FSAVE area and not FXSAVE area

 - Changed ptrace API to PTRACE_GETREGSET for 32-bit inferiors
    -- This reads FPR data in FXSAVE format.
    -- For 64-bit inferiors, no change has been made.

 - Modified XFAIL for TestReturnValue.py
    -- Earlier, this test was passing for Linux OS
    -- Now, it passes for Android OS as well

Change-Id: Ieed72bc969b79516fc7b263b32493aa1e7a1a2ac
Signed-off-by: Abhishek Aggarwal <abhishek.a.aggarwal@intel.com>

Reviewers: ovyalov, jingham, lldb-commits, tberghammer, labath

Subscribers: jevinskie, labath, tberghammer, danalbert

Differential Revision: http://reviews.llvm.org/D15042

llvm-svn: 254499
2015-12-02 09:40:17 +00:00
Sagar Thakur d4eb7cc3f3 [LLDB][MIPS] Clear bug 25194 - LLDB-Server Assertion raised when single stepping on MIPS
This patch will clear bug 25194 - LLDB-Server Assertion raised when single stepping on MIPS. The problem was that while emulating instructions, old and new pc values would have garbage value in their upper 32 bits. Therefore checking if pc was changed (old_pc == new_pc) would always return false, because of which pc was not getting updated.

/* If we haven't changed the PC, change it here */
if (old_pc == new_pc)
{
    new_pc += 4;
    Context context;
        return false;
}

Reviewers: tberghammer, clayborg
Subscribers: dsanders, lldb-commits, mohit.bhakkad, bhushan, jaydeep, nitesh.jain
Differential: http://reviews.llvm.org/D14633
llvm-svn: 254379
2015-12-01 05:44:18 +00:00
Tamas Berghammer b4e95a50d7 Add 64/128 bit arm neon register definitions on linux
Differential revision: http://reviews.llvm.org/D14985

llvm-svn: 254152
2015-11-26 15:02:31 +00:00
Mohit K. Bhakkad 5a998ed7a6 [LLDB][MIPS] Getting 0 index for H/W watchpoint is not necessarily an error
Reviewers: jaydeep.
Subscribers: bhushan, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D14860

llvm-svn: 253864
2015-11-23 12:19:59 +00:00
Omair Javaid f24741d9dc Fix for AArch64 watchpoint cache corruption in case of ptrace failure
Same fix has been submitted for Arm.

Review can be found here:

Differential revision: http://reviews.llvm.org/D14051

llvm-svn: 252298
2015-11-06 12:56:34 +00:00
Omair Javaid d5510d1e5c Fix for Arm watchpoint cache corruption in case of ptrace failure
Differential revision: http://reviews.llvm.org/D14051

llvm-svn: 251386
2015-10-27 05:56:56 +00:00
Omair Javaid 4aa984c1a2 Corrects return values and typos in Arm watchpoint code
This is just a trivial patch that corrects a couple of return value account to function's return type.
Also corrects typo in hardware breakpoint handler.

llvm-svn: 251269
2015-10-25 23:18:35 +00:00
Tamas Berghammer ce26b7a6ee Fix arm lldb-server on aarch64 device
* Use PTRACE_GETVFPREGS/PTRACE_SETVFPREGS to access the floating point
  registers instead of the old PTRACE_GETFPREGS/PTRACE_SETFPREGS. The
  new call is available since armv5.
* Work around a kernel issue in PTRACE_POKEUSER with reading out the full
  register set, modifying the neccessary value and then writing it back.

llvm-svn: 251111
2015-10-23 13:36:31 +00:00
Omair Javaid 5cf948d299 Fix for random watchpoint testsuite failures on AArch64 targets.
This patch corrects the number of bytes of debug register resources which are written while installing or removing a breakpoint using ptrace interface on arm64 targets.

Differential revision: http://reviews.llvm.org/D12522

llvm-svn: 250700
2015-10-19 14:54:33 +00:00
Sagar Thakur b997792cc6 [LLDB][MIPS] Use the correct ptrace buffer for writing register value for o32 applications
For o32 applications on mips we were getting segmentation fault while launching lldb-server because of overwritting stack when using elf_gregset_t in DoWriteRegisterValue.
We are now using the GPR_mips_linux buffer in DoWriteRegisterValue as done in DoReadRegisterValue also, which solves the above issue.

llvm-svn: 250696
2015-10-19 11:21:20 +00:00
Tamas Berghammer 1fa5c4b944 Fix cast in arm watchpoint handling code
We had an incorrect sign extension when castion from a pointer to an
lldb::addr_t what broke the watchpoint hit detection on arm.

llvm-svn: 250180
2015-10-13 16:48:04 +00:00
Abhishek Aggarwal b352a1c88f X86: Change FTAG register size in FXSAVE structure
Summary:
 - Changed from 16 bits to 8 bits for Intel Architecture
    -- FXSAVE structure now conforms with the layout of FXSAVE
       area specified by IA Architecture Software Developer Manual

 - Modified Linux and FreeBSD specific files to support this change
    -- MacOSX already uses 8 bits for ftag register

 - Modified TestRegisters.py and a.cpp:
    -- Change allows 8 bit comparison of ftag values

    -- Change resolves Bug 24733:
       Removed XFAIL for Clang as the test works and passes for
       Clang compiler as well

    -- Change provides a Generic/Better way of testing Bug 24457
       and Bug 25050 by using 'int3' inline assembly in inferior

Signed-off-by: Abhishek Aggarwal <abhishek.a.aggarwal@intel.com>

Reviewers: ovyalov, jingham, clayborg

Subscribers: tfiala, emaste

Differential Revision: http://reviews.llvm.org/D13587

llvm-svn: 250022
2015-10-12 09:57:00 +00:00
Sagar Thakur b8862c0107 [LLDB][MIPS] Fix gp register value for o32 applications on 64-bit target
GP registers for o32 applications were always giving zero value because SetType() on the RegisterValue was causing the accessor functions to pickup the value from m_scalar of RegisterValue which is zero.
In this patch byte size and byte order of register value is set at the time of setting the value of the register.

llvm-svn: 249020
2015-10-01 15:05:31 +00:00
Jason Molenda 63bd0db071 Clean up register naming conventions inside lldb.
"gcc" register numbers are now correctly referred to as "ehframe"
register numbers.  In almost all cases, ehframe and dwarf register
numbers are identical (the one exception is i386 darwin where ehframe
regnums were incorrect).

The old "gdb" register numbers, which I incorrectly thought were
stabs register numbers, are now referred to as "Process Plugin"
register numbers.  This is the register numbering scheme that the
remote process controller stub (lldb-server, gdbserver, core file
support, kdp server, remote jtag devices, etc) uses to refer to the
registers.  The process plugin register numbers may not be contiguous
- there are remote jtag devices that have gaps in their register
numbering schemes.

I removed all of the enums for "gdb" register numbers that we had
in lldb - these were meaningless - and I put LLDB_INVALID_REGNUM
in all of the register tables for the Process Plugin regnum slot.

This change is almost entirely mechnical; the one actual change in
here is to ProcessGDBRemote.cpp's ParseRegisters() which parses the
qXfer:features:read:target.xml response.  As it parses register
definitions from the xml, it will assign sequential numbers as the
eRegisterKindLLDB numbers (the lldb register numberings must be
sequential, without any gaps) and if the xml file specifies register
numbers, those will be used as the eRegisterKindProcessPlugin
register numbers (and those may have gaps).  A J-Link jtag device's
target.xml does contain a gap in register numbers, and it only 
specifies the register numbers for the registers after that gap.
The device supports many different ARM boards and probably selects
different part of its register file as appropriate.

http://reviews.llvm.org/D12791
<rdar://problem/22623262> 

llvm-svn: 247741
2015-09-15 23:20:34 +00:00
Tamas Berghammer c40e7b1769 Fix the handling of FPR offsets in Linux arm/aarch64 register contexts
Differential revision: http://reviews.llvm.org/D12636

llvm-svn: 246959
2015-09-07 10:11:23 +00:00
Abhishek Aggarwal 7f658edd61 Bug 24457 - X87 FPU Special Purpose Registers
Summary:
  - For 'register read --all' command on x86_64-Linux Platform:

      -- Provide correct values of X87 FPU Special Purpose Registers
      -- Both 32-bit & 64-bit inferiors give correct values on this
         Platform

  - Added a Test Vector:
      -- To verify the expected behaviour of the command

Signed-off-by: Abhishek Aggarwal <abhishek.a.aggarwal@intel.com>

Reviewers: ashok.thirumurthi, granata.enrico, tfiala, clayborg

Differential Revision: http://reviews.llvm.org/D12592

llvm-svn: 246955
2015-09-07 07:40:16 +00:00
Bruce Mitchener db25a7a245 [cmake] Remove LLVM_NO_RTTI.
Summary:
This doesn't exist in other LLVM projects any longer and doesn't
do anything.

Reviewers: chaoren, labath

Subscribers: emaste, tberghammer, lldb-commits, danalbert

Differential Revision: http://reviews.llvm.org/D12586

llvm-svn: 246749
2015-09-03 08:46:55 +00:00
Pavel Labath 7a9495bcd5 [NativeProcessLinux] Fix detach of multithreaded inferiors
When detaching, we need to detach from all threads of the inferior and not just the main one.
Without this, a multi-threaded inferior would usually crash once the server exits.

llvm-svn: 246549
2015-09-01 15:00:51 +00:00
Pavel Labath 86852d3676 [NativeProcessLinux] Fix assertion failure when killing a process
Linux sometimes sends us a PTRACE_EVENT_EXIT when an inferior process gets a SIGKILL. This can be
confusing, since normally we don't expect any events when the inferior is stopped. This commit
adds code to handle this situation (resume the thread and let it exit normally) and avoid an
assertion failure in ResumeThread().

llvm-svn: 246539
2015-09-01 10:59:36 +00:00
Mohit K. Bhakkad 16ad032183 [LLDB][MIPS] Aligning code with rL245831
Reviewers: jaydeep
Subscribers: lldb-commits.
Differential Revision: http://reviews.llvm.org/D12427

llvm-svn: 246293
2015-08-28 12:08:26 +00:00
Omair Javaid 3a56363aec Error checking correction in AArch64 hardware watchpoint code
Differential Revision: http://reviews.llvm.org/D12328

llvm-svn: 246045
2015-08-26 18:23:27 +00:00
Omair Javaid 2441aecd1e Adds support for hardware watchpoints on Arm targets.
http://reviews.llvm.org/D9703

This updated patches correct problems in arm hardware watchpoint support patch posted earlier.

This patch has been tested on samsung chromebook (ARM - Linux) and PandaBoard using basic watchpoint test application.

Also it was tested on Nexus 7 Android device.

On chromebook linux we are able to set and clear all types of watchpoints but on android we end up getting a watchpoint packet error because we are not able to call hardware watchpoint ptrace functions successfully.

llvm-svn: 245961
2015-08-25 18:22:04 +00:00
Sagar Thakur 3024117757 Fix build on mips
Setting and getting register values as bytes instead of depending on the 128 bit integer support in register value.
This patch will fix the build failure in the release branch.

Reviewers: tberghammer, clayborg, hans
Subscribers: bhushan, nitesh.jain, jaydeep, lldb-commits
Differential: http://reviews.llvm.org/D12275
llvm-svn: 245927
2015-08-25 09:52:59 +00:00
Pavel Labath 0f4b17d12c Simplify NativeThreadLinux includes
there is no need to include architecture-specific register contexts when the generic one will
suffice.

llvm-svn: 245839
2015-08-24 13:25:54 +00:00
Pavel Labath b9cc0c7593 [NativeProcessLinux] Pass around threads by reference
Summary:
Most NPL private functions took (shared) pointers to threads as arguments. This meant that the
callee could not be sure if the pointer was valid and so most functions were peppered with
null-checks. Now, I move the check closer to the source, and pass around the threads as
references (which are then assumed to be valid).

Reviewers: tberghammer

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D12237

llvm-svn: 245831
2015-08-24 09:22:04 +00:00
Pavel Labath f90777826a [NativeProcessLinux] Reduce the number of casts
Summary:
NPL used to be peppered with casts of the NativeThreadProtocol objects into NativeThreadLinux. I
move these closer to the source where we obtain these objects. This way, the rest of the code can
assume we are working with the correct type of objects.

Reviewers: ovyalov, tberghammer

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D12187

llvm-svn: 245681
2015-08-21 09:13:53 +00:00
Pavel Labath 0e1d729b75 [NativeProcessLinux] Fix a bug in instruction-stepping over thread creation
Summary:
There was a bug in NativeProcessLinux, where doing an instruction-level single-step over the
thread-creation syscall resulted in loss of control over the inferior. This happened because
after the inferior entered the thread-creation maintenance stop, we unconditionally performed a
PTRACE_CONT, even though the original intention was to do a PTRACE_SINGLESTEP. This is fixed by
storing the original state of the thread before the stop (stepping or running) and then
performing the appropriate action when resuming.

I also get rid of the callback in the ThreadContext structure, which stored the lambda used to
resume the thread, but which was not used consistently.

A test verifying the correctness of the new behavior is included.

Reviewers: ovyalov, tberghammer

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D12104

llvm-svn: 245545
2015-08-20 09:06:12 +00:00
Pavel Labath 78856474fb On Linux, clear the signal mask of the launched inferior
Summary:
Due to fork()/execve(), the launched inferior inherits the signal mask of its parent (lldb-server). But because lldb-server modifies its signal mask (It blocks SIGCHLD, for example), the inferior starts with some signals being initially blocked.

One consequence is that TestCallThatRestarts.ExprCommandThatRestartsTestCase (test/expression_command/call-restarts) fails because sigchld_handler() in lotta-signals.c is not called, due to the SIGCHLD signal being blocked.

To prevent the signal masking done by lldb-server from affecting the created inferior, the signal mask of the inferior is now cleared before the execve().

Patch by: Yacine Belkadi

Reviewers: ovyalov, labath

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D12138

llvm-svn: 245436
2015-08-19 13:47:57 +00:00
Omair Javaid dee4a867be Fix lldb-server arm-linux-g++ build
llvm-svn: 245428
2015-08-19 10:44:16 +00:00
Pavel Labath d2c4c9b132 [LLGS] Avoid misrepresenting log lines as inferior output
Summary:
in case we are logging to stdout, any log lines from the forked child can be misconstrued to be
inferior output. To avoid this, we disable all logging immediately after forking.

I also fix the implementatoion of DisableAllLogChannels, which was a no-op before this commit.

Reviewers: clayborg, ovyalov

Subscribers: dean, lldb-commits

Differential Revision: http://reviews.llvm.org/D12083

llvm-svn: 245272
2015-08-18 08:23:35 +00:00
Sagar Thakur 789da6678e [LLDB][MIPS] Fix offsets of all register sets and add MSA regset and FRE=1 mode support
This patch :

- Fixes offsets of all register sets for Mips.
- Adds MSA register set and FRE=1 mode support for FP register set.
- Separates lldb register numbers and register infos of freebsd/mips64 from linux/mips64.
- Re-orders the register numbers of all kinds for mips to be consistent with freebsd order of register numbers.

Reviewers: jaydeep, clayborg, jasonmolenda, ovyalov, emaste
Subscribers: tberghammer, ovyalov, emaste, mohit.bhakkad, nitesh.jain, bhushan
Differential: http://reviews.llvm.org/D10919
llvm-svn: 245217
2015-08-17 13:40:17 +00:00
Ravitheja Addepally 72ab9e5c6c Removing redundant check from r244875
llvm-svn: 244886
2015-08-13 11:53:23 +00:00
Tamas Berghammer 64ad85cef2 Fix Linux build after r244875
llvm-svn: 244877
2015-08-13 09:19:27 +00:00
Ravitheja Addepally 4778e410d0 Set orig_eax to -1 for Linux x86 platforms
Summary:
For Linux x86 based environments the orig_eax/orig_rax
register should be set to -1 to prevent the instruction pointer
to be decremented, which was the cause for the SIGILL exception.

Fix for Bug 23659

Reviewers: zturner, ashok.thirumurthi, mikesart, jingham, clayborg

Subscribers: clayborg, labath

Differential Revision: http://reviews.llvm.org/D11411

llvm-svn: 244875
2015-08-13 09:05:11 +00:00
Jaydeep Patil 831435042e [LLDB][MIPS] Handle false positives for MIPS hardware watchpoints
SUMMARY:
    Last 3bits of the watchpoint address are masked by the kernel. For example, n is 
    at 0x120010d00 and m is 0x120010d04. When a watchpoint is set at m, then watch 
    exception is generated even when n is read/written. To handle this case, instruction 
    at PC is emulated to find the base address of the load/store instruction. This address 
    is then appended to the description of the stop-info packet. Client then reads this 
    information to check whether the user has set a watchpoint on this address.
    
    Reviewers: jingham, clayborg
    Subscribers: nitesh.jain, mohit.bhakkad, sagar, bhushan and lldb-commits
    Differential Revision: http://reviews.llvm.org/D11672

llvm-svn: 244864
2015-08-13 03:44:09 +00:00
Omair Javaid 1fd2a8cfa7 Fix AArch64 watchpoint handlers in NativeRegisterContextLinux_arm64
http://reviews.llvm.org/D11899

llvm-svn: 244750
2015-08-12 13:42:24 +00:00
Tamas Berghammer 40caea63c4 Fix read only watchpoints on x86_64
On x86/x86_64 read only watchpoints aren't supported. Fall back
to read/write watchpoints in that case.

Note: Logic should be added to ignore the watchpoint hit when
occurred because of a write.

llvm-svn: 244742
2015-08-12 12:22:42 +00:00
Omair Javaid cf8eb9da4d Fix LLGS to enable read type watchpoints
http://reviews.llvm.org/D11902

llvm-svn: 244741
2015-08-12 11:30:21 +00:00
Oleksiy Vyalov 9dcdd2ee03 Revert r244308 since it's introducing test regressions on Linux:
- TestLldbGdbServer.py both clang & gcc, i386 and x86_64
 - TestConstVariables.py gcc, i386 and x86_64
 - 112 failures clang, i386

llvm-svn: 244514
2015-08-10 21:49:50 +00:00
Omair Javaid 2040548fcb Fix for build errors on arm-linux-gnueabi-gcc
http://reviews.llvm.org/D11256

llvm-svn: 244419
2015-08-09 19:04:41 +00:00
Sagar Thakur d754890047 [LLDB][MIPS] Fix offsets of all register sets and add MSA regset and FRE=1 mode support
This change :

    - Fixes offsets of all register sets for Mips.
    - Adds MSA register set and FRE=1 mode support for FP register set.
    - Separates lldb register numbers and register infos of freebsd/mips64 from linux/mips64.
    - Re-orders the register numbers of all kinds for mips to be consistent with freebsd order of register numbers.
    - Eliminates ENABLE_128_BIT_SUPPORT and union ValueData from Scalar.cpp and uses llvm::APInt and llvm::APFloat for all integer and floating point types.

Reviewers : emaste, jaydeep, clayborg
Subscribers : emaste, mohit.bhakkad, nitesh.jain, bhushan
Differential : http://reviews.llvm.org/D10919

llvm-svn: 244308
2015-08-07 06:39:38 +00:00
Mohit K. Bhakkad 3681c5b850 [LLDB][MIPS] To handle SI_KERNEL generated for invalid 64 bit address
Patch by Nitesh Jain

Reviewers: clayborg, ovyalov.
Subscribers: jaydeep, bhushan, mohit.bhakkad, sagar, emaste, lldb-commits.
Differential Revision: http://reviews.llvm.org/D11176

llvm-svn: 243620
2015-07-30 05:38:11 +00:00
Pavel Labath 162fb8e8ab Speed up NativeProcessLinux::GetLoadedModuleFileSpec
Summary:
GetLoadedModuleFileSpec was reading /proc/pid/maps character by character, which was very slow,
since we do that for every shared library, which android tends to have a lot. Switching to
ProcFileReader saves us about 0.4 seconds in attach time.

Reviewers: tberghammer

Subscribers: tberghammer, danalbert, lldb-commits

Differential Revision: http://reviews.llvm.org/D11460

llvm-svn: 243019
2015-07-23 14:47:33 +00:00
Pavel Labath 79203995fa [NativeProcessLinux] Fix a couple of warnings
llvm-svn: 243013
2015-07-23 13:07:37 +00:00
Pavel Labath 05569f679a Add jstopinfo support to llgs
Summary:
This adds support for jstopinfo field of stop-reply packets. This field enables us to avoid
querying full thread stop data on most stops  (see r242593 for more details).

Reviewers: ovyalov, clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D11415

llvm-svn: 242997
2015-07-23 09:09:29 +00:00
Pavel Labath cb213b3831 Fix warnings found by -Wextra-semi
patch by Eugene Zelenko.

llvm-svn: 242875
2015-07-22 08:12:01 +00:00
Pavel Labath 19cbe96a45 [NativeProcessLinux] Integrate MainLoop
Summary:
This commit integrates MainLoop into NativeProcessLinux. By registering a SIGCHLD handler with
the llgs main loop, we can get rid of the special monitor thread in NPL, which saves as a lot of
thread ping-pong when responding to client requests (e.g. qThreadInfo processing time has been
reduced by about 40%). It also makes the code simpler, IMHO.

Reviewers: ovyalov, clayborg, tberghammer, chaoren

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D11150

This is a resubmission of r242305 after it was reverted due to bad interactions with the stdio
thread.

llvm-svn: 242783
2015-07-21 13:20:32 +00:00
Pavel Labath 44e82db291 [NativeProcessLinux] Bugfix in the monitor thread
Make sure we dont treat EINTR as a fatal error. I was getting this when trying to profile the
debugger. I'm not sure why this wasn't surfacing before, it could be that the profiler is using
some signals internally.

llvm-svn: 242681
2015-07-20 16:14:46 +00:00
Pavel Labath 5abe726911 Revert "[NativeProcessLinux] Integrate MainLoop"
This seems to be causing major slowdows on the android buildbot. Reverting while I investigate.

llvm-svn: 242391
2015-07-16 08:45:03 +00:00
Pavel Labath 827965c33c [NativeProcessLinux] Integrate MainLoop
Summary:
This commit integrates MainLoop into NativeProcessLinux. By registering a SIGCHLD handler with
the llgs main loop, we can get rid of the special monitor thread in NPL, which saves as a lot of
thread ping-pong when responding to client requests (e.g. qThreadInfo processing time has been
reduced by about 40%). It also makes the code simpler, IMHO.

Reviewers: ovyalov, clayborg, tberghammer, chaoren

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D11150

llvm-svn: 242305
2015-07-15 17:20:01 +00:00
Chaoren Lin 98d0a4b39a Refactor Unix signals.
Summary:
- Consolidate Unix signals selection in UnixSignals.
- Make Unix signals available from platform.
- Add jSignalsInfo packet to retrieve Unix signals from remote platform.
- Get a copy of the platform signal for each remote process.
- Update SB API for signals.
- Update signal utility in test suite.

Reviewers: ovyalov, clayborg

Subscribers: chaoren, jingham, labath, emaste, tberghammer, lldb-commits

Differential Revision: http://reviews.llvm.org/D11094

llvm-svn: 242101
2015-07-14 01:09:28 +00:00
Chaoren Lin 1bd3c9abd8 Fix 32-bit Linux watchpoint failures.
Summary:
32-bit signed return value from ptrace got sign extended when being converted to
64-bit unsigned.

Also, replaced tabs with spaces in the source.

Reviewers: labath, clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D11047

llvm-svn: 241837
2015-07-09 18:35:16 +00:00
Pavel Labath d5b310f2a3 Avoid going through Platform when creating a NativeProcessProtocol instance
Summary:
This commit avoids the Platform instance when spawning or attaching to a process in lldb-server.
Instead, I have the server call a (static) method of NativeProcessProtocol directly. The reason
for this is that I believe that NativeProcessProtocol should be decoupled from the Platform
(after all, it always knows which platform it is running on, unlike the rest of lldb).
Additionally, the kind of platform actions a NativeProcessProtocol instance is likely to differ
greatly from the platform actions of the lldb client, so I think the separation makes sense.

After this, the only dependency NativeProcessLinux has on PlatformLinux is the ResolveExecutable
method, which needs additional refactoring.

This is a resubmit of r241672, after it was reverted due to build failueres on non-linux
platforms.

Reviewers: ovyalov, clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D10996

llvm-svn: 241796
2015-07-09 11:51:11 +00:00
Sean Callanan c307c27035 Revert r241672, which breaks the OS X build by introducing a dependency on
platform-specific symbols that are not implemented on OS X.

The build error that caused this is

Undefined symbols for architecture x86_64:
  "lldb_private::NativeProcessProtocol::Attach(unsigned long long, lldb_private::NativeProcessProtocol::NativeDelegate&, std::__1::shared_ptr<lldb_private::NativeProcessProtocol>&)", referenced from:
      lldb_private::process_gdb_remote::GDBRemoteCommunicationServerLLGS::AttachToProcess(unsigned long long) in liblldb-core.a(GDBRemoteCommunicationServerLLGS.o)
  "lldb_private::NativeProcessProtocol::Launch(lldb_private::ProcessLaunchInfo&, lldb_private::NativeProcessProtocol::NativeDelegate&, std::__1::shared_ptr<lldb_private::NativeProcessProtocol>&)", referenced from:
      lldb_private::process_gdb_remote::GDBRemoteCommunicationServerLLGS::LaunchProcess() in liblldb-core.a(GDBRemoteCommunicationServerLLGS.o)
ld: symbol(s) not found for architecture x86_64
clang: error: linker command failed with exit code 1 (use -v to see invocation)

llvm-svn: 241688
2015-07-08 16:33:46 +00:00
Pavel Labath 235c8405eb Avoid going through Platform when creating a NativeProcessProtocol instance
Summary:
This commit avoids the Platform instance when spawning or attaching to a process in lldb-server.
Instead, I have the server call a (static) method of NativeProcessProtocol directly. The reason
for this is that I believe that NativeProcessProtocol should be decoupled from the Platform
(after all, it always knows which platform it is running on, unlike the rest of lldb).
Additionally, the kind of platform actions a NativeProcessProtocol instance is likely to differ
greatly from the platform actions of the lldb client, so I think the separation makes sense.

After this, the only dependency NativeProcessLinux has on PlatformLinux is the ResolveExecutable
method, which needs additional refactoring.

Reviewers: ovyalov, clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D10996

llvm-svn: 241672
2015-07-08 09:08:53 +00:00
Pavel Labath f805e1905c Fix cmake build after recent JSON changes
I have moved StringExtractor.h into the include/ folder so that it can be properly included by
everyone.

llvm-svn: 241572
2015-07-07 10:08:41 +00:00
Tamas Berghammer ff7fd90017 Fix aarch64 breakpoint PC offset
llvm-svn: 241347
2015-07-03 12:51:30 +00:00
Tamas Berghammer cec93c355a Fix 128bit register read and user register count on aarch64
llvm-svn: 241340
2015-07-03 11:17:07 +00:00
Tamas Berghammer 09839c33b6 Fix qMemoryRegionInfo packet to return current value for address after the last memory region
Differential revision: http://reviews.llvm.org/D10899

llvm-svn: 241333
2015-07-03 09:30:19 +00:00
Pavel Labath 4a9babb26e [NativeProcessLinux] Refactor PtraceWrapper
Summary:
This changes PtraceWrapper to return an Error, while the actual result is in an pointer parameter
(instead of the other way around). Also made a couple of PtraceWrapper arguments default to zero.
This arrangement makes a lot of the code much simpler.

Test Plan: Tests pass on linux. It compiles on android arm64/mips64.

Reviewers: chaoren, mohit.bhakkad

Subscribers: tberghammer, aemerson, lldb-commits

Differential Revision: http://reviews.llvm.org/D10808

llvm-svn: 241079
2015-06-30 17:04:49 +00:00
Pavel Labath c7512fdc1e [NativeProcessLinux] Use lambdas in DoOperation calls
Summary:
This removes a lot of boilerplate, which was needed to execute monitor operations. Previously one
needed do declare a separate class for each operation which would manually capture all needed
arguments, which was very verbose. In addition to less code, I believe this also makes the code
more readable, since now the implementation of the operation can be physically closer to the code
that invokes it.

Test Plan: Code compiles on x86, arm and mips, tests pass on x86 linux.

Reviewers: tberghammer, chaoren

Subscribers: aemerson, lldb-commits

Differential Revision: http://reviews.llvm.org/D10694

llvm-svn: 240772
2015-06-26 10:14:12 +00:00
Pavel Labath b36f917854 Remove old local-only linux debugging code
Summary:
Currently, the local-only path fails about 50% of the tests, which means that: a) nobody is using
it; and b) the remote debugging path is much more stable. This commit removes the local-only
linux debugging code (ProcessLinux) and makes remote-loopback the only way to debug local
applications (the same architecture as OSX). The ProcessPOSIX code is moved to the FreeBSD
directory, which is now the only user of this class. Hopefully, FreeBSD will soon move to the new
architecture as well and then this code can be removed completely.

Test Plan: Test suite passes via remote stub.

Reviewers: emaste, vharron, ovyalov, clayborg

Subscribers: tberghammer, emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D10661

llvm-svn: 240543
2015-06-24 14:43:20 +00:00
Jaydeep Patil c60c94528c [LLDB][MIPS] MIPS32 branch emulation and single-stepping
SUMMARY:
    This patch implements
      1. Emulation of MIPS32 branch instructions
      2. Enable single-stepping for MIPS32 instructions
      3. Correction in emulation of MIPS64 branch instructions with delay slot
      4. Adjust breakpoint address when breakpoint is hit in a forbidden slot of compact branch instruction
    
    Reviewers: clayborg
    Subscribers: mohit.bhakkad, sagar, bhushan, lldb-commits, emaste, nitesh.jain
    Differential Revision: http://reviews.llvm.org/D10596

llvm-svn: 240373
2015-06-23 03:37:08 +00:00
Tamas Berghammer 783bfc8caa Fetch object file load address if it isn't specified by the linker
Differential revision: http://reviews.llvm.org/D10490

llvm-svn: 240052
2015-06-18 20:43:56 +00:00
Mohit K. Bhakkad de8b81b45a [LLDB][MIPS] Addressing some errors and warnings due to rL239991
llvm-svn: 240016
2015-06-18 13:35:29 +00:00
Mohit K. Bhakkad 3579996399 [LLDB][MIPS] Hardware Watchpoints for MIPS
Reviewers: clayborg, jingham.
Subscribers: jaydeep, bhushan, dsanders, sagar, lldb-commits.
Differential Revision: http://reviews.llvm.org/D9142

llvm-svn: 239991
2015-06-18 04:53:18 +00:00
Pavel Labath df7c69952b [NativeProcessLinux] Use fast memory reads, if the system supports it
Summary:
Memory reads using the ptrace API need to be executed on a designated thread
and in 4-byte increments. The process_vm_read syscall has no such requirements
and it is about 50 times faster. This patch makes lldb-server use the faster
API if the target kernel supports it. Kernel support for this feature is
determined at runtime. Using process_vm_writev in the same manner is more
complicated since this syscall (unlike ptrace) respects page protection settings
and so it cannot be used to set a breakpoint, since code pages are typically
read-only. However, memory writes are not currently a performance bottleneck as
they happen much more rarely.

Test Plan: all tests continue to pass

Reviewers: ovyalov, vharron

Subscribers: tberghammer, lldb-commits

Differential Revision: http://reviews.llvm.org/D10488

llvm-svn: 239924
2015-06-17 18:38:49 +00:00
Sagar Thakur 0abe018c91 [lldb-server][MIPS] Read/Write FP registers in FR0 mode
Adding support for read/write FP registers in FR0 mode of mips.

Reviewers: clayborg, tberghammer, jaydeep
Subscribers: emaste, nitesh.jain, bhushan, mohit.bhakkad, lldb-commits
Differential Revision: http://reviews.llvm.org/D10242

llvm-svn: 239132
2015-06-05 05:47:54 +00:00
Sagar Thakur ce815e4588 [MIPS][lldb-server] Add 32-bit register context and read/write FP registers on mips64
- Added support for read/write FP registers in FR1 mode.
    - Added 32 bit register context for mips32.

Reviewers: clayborg, tberghammer, jaydeep
Subscribers: emaste, nitesh.jain, bhushan, mohit.bhakkad, lldb-commits
Differential Revision: http://reviews.llvm.org/D10029

llvm-svn: 238914
2015-06-03 10:14:24 +00:00
Chaoren Lin d3173f34e8 Refactor many file functions to use FileSpec over strings.
Summary:
This should solve the issue of sending denormalized paths over gdb-remote
if we stick to GetPath(false) in GDBRemoteCommunicationClient, and let the
server handle any denormalization.

Reviewers: ovyalov, zturner, vharron, clayborg

Reviewed By: clayborg

Subscribers: tberghammer, emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D9728

llvm-svn: 238604
2015-05-29 19:52:29 +00:00
Zachary Turner 1124045ac7 Don't #include "lldb-python.h" from anywhere.
Since interaction with the python interpreter is moving towards
being more isolated, we won't be able to include this header from
normal files anymore, all includes of it should be localized to
the python library which will live under source/bindings/API/Python
after a future patch.

None of the files that were including this header actually depended
on it anyway, so it was just a dead include in every single instance.

llvm-svn: 238581
2015-05-29 17:41:47 +00:00
Pavel Labath 5b981ab9e5 [NativeProcessLinux] clean up #includes
llvm-svn: 238551
2015-05-29 12:53:54 +00:00
Pavel Labath c4e25c9648 Report inferior SIGSEGV as a signal instead of an exception on linux
Summary:
Previously, we reported inferior receiving SIGSEGV (or SIGILL, SIGFPE, SIGBUS) as an "exception"
to LLDB, presumably to match OSX behaviour. Beside the fact that we were basically lying to the
user, this was also causing problems with inferiors which handle SIGSEGV by themselves, since
LLDB was unable to reinject this signal back into the inferior.

This commit changes LLGS to report SIGSEGV as a signal. This has necessitated some changes in the
test-suite, which had previously used eStopReasonException to locate threads that crashed. Now it
uses platform-specific logic, which in the case of linux searches for eStopReasonSignaled with
signal=SIGSEGV.

I have also added the ability to set the description of StopInfoUnixSignal using the description
field of the gdb-remote packet. The linux stub uses this to display additional information about
the segfault (invalid address, address access protected, etc.).

Test Plan: All tests pass on linux and osx.

Reviewers: ovyalov, clayborg, emaste

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D10057

llvm-svn: 238549
2015-05-29 10:13:03 +00:00
Pavel Labath 05a1f2ac4c [NativeProcessLinux] Support inferiors which change their process group
Summary:
Previously, we wait()ed for events from the inferiors process group. This is resulted in a
failure if the inferior changed its process group in the middle of execution. To avoid this, I
pass -1 to the wait() call. The flag __WNOTHREAD makes sure we don't actually wait for events
from any process, but only the processes(threads) which are our children (or traced by us). Since
this happens on the monitor thread, which is dedicated to monitoring a single inferior, we will
be getting events only from this inferior.

Test Plan: All tests pass on linux. I have added a test to check the new functionality.

Reviewers: chaoren, ovyalov

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D10061

llvm-svn: 238405
2015-05-28 08:59:21 +00:00
Tamas Berghammer 068f8a7e2d Move register reading form NativeProcessLinux to NativeRegisterContextLinux*
This change reorganize the register read/write code inside lldb-server on Linux
with moving the architecture independent code into a new class called
NativeRegisterContextLinux and all of the architecture dependent code into the
appropriate NativeRegisterContextLinux_* class. As part of it the compilation of
the architecture specific register contexts are only compiled on the specific
architecture because they can't be used in other cases.

The purpose of this change is to remove a lot of duplicated code from the different
register contexts and to remove the architecture dependent codes from the global
NativeProcessLinux class.

Differential revision: http://reviews.llvm.org/D9935

llvm-svn: 238196
2015-05-26 11:58:52 +00:00
Pavel Labath 39036ac31d [NativeProcessLinux] Fix handling of SIGSTOP
Summary:
Previously, NPL tried to reinject SIGSTOP into the inferior in an attempt to get the process to
start in the group-stop state. This was:
a) wrong (reinjection should be controlled by "process handle" lldb setting)
b) racy (it should use Resume for transparent resuming instead of RequestResume)
c) broken (llgs crashed on inferior SIGSTOP)

With this change, SIGSTOP is handled just like any other signal delivered to the inferior: we
stop all threads and report signal reception to lldb. SIGSTOP reinjection does not behave the
same way as it would outside the debugger, but simulating this is a hard problem and is not
normally necessary.

Test Plan: I have added a test which verifies we get SIGSTOP reports and we do not crash.

Reviewers: ovyalov, chaoren

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9852

llvm-svn: 237880
2015-05-21 08:32:18 +00:00
Vince Harron 341eda4ca7 Fixed arm64 build error
llvm-svn: 237493
2015-05-16 00:26:20 +00:00
Pavel Labath 9eb1ecb9af [NativeProcessLinux] Fix removal of temporary breakpoints
Summary:
There was an issue in NPL, where we attempted removal of temporary breakpoints (used to implement
software single stepping), while some threads of the process were running. This is a problem
since we currently always use the main thread's ID in the removal ptrace call. Therefore, if the
main thread was still running, the ptrace call would fail, and the software breakpoint would
remain, causing all kinds of problems. This change removes the breakpoints after all threads have
stopped. This fixes TestExitDuringStep on Android arm and can also potentially help in other
situations, as previously the breakpoint would not get removed if the thread stopped for another
reason.

Test Plan: TestExitDuringStep passes, other tests remain unchanged.

Reviewers: tberghammer

Subscribers: tberghammer, aemerson, lldb-commits

Differential Revision: http://reviews.llvm.org/D9792

llvm-svn: 237448
2015-05-15 13:49:01 +00:00
Pavel Labath 6e35163cca [NativeProcessLinux] Fix potential race during thread exit
Summary:
This is the same issue as we had in D9145 for thread creation. Going through the full
ThreadDidStop/RequestResume cycle can cause a deferred notification to fire, which is not correct
when we are ignoring an event and resuming the thread. In this case it doesn't matter much since
the thread will die after that anyway, but for correctness, we should do the same thing here.
Also treating the SIGTRAP case the same way.

Test Plan: Tests continue to pass.

Reviewers: chaoren, ovyalov

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9696

llvm-svn: 237445
2015-05-15 13:30:59 +00:00
Omair Javaid cdad63b33d LLDB build broke after applying patch http://reviews.llvm.org/D9706
This patch fixes the issue.

llvm-svn: 237421
2015-05-15 08:30:29 +00:00
Omair Javaid ea8c25a802 This patch adds support for setting/clearing hardware watchpoints and breakpoints on AArch64 (Arm v8) 64-bit hardware.
http://reviews.llvm.org/D9706

llvm-svn: 237419
2015-05-15 06:29:58 +00:00
Vince Harron d7e6a4f2f0 Fixed a ton of gcc compile warnings
Removed some unused variables, added some consts, changed some casts
to const_cast. I don't think any of these changes are very
controversial.

Differential Revision: http://reviews.llvm.org/D9674

llvm-svn: 237218
2015-05-13 00:25:54 +00:00
Tamas Berghammer 1f14920437 Return the correct user register count for arm from NativeRegisterContext
The defult implementation falls back to GetRegisterCount what
includes the debug registers also what shouldn't be displayed to
the user.

llvm-svn: 237111
2015-05-12 10:27:45 +00:00
Pavel Labath 108c325d6e Remove handling of eStateStopped from NativeProcessLinux::Resume
Summary:
NPL::Resume attempted to handle eStateStopped as a resume action. However:
- GDBRemoteCommunicationServerLLGS (the only user of NPL) never sets this action
- it could set this action in response to a vCont:t packet, but LLDB never produces this packet
- gdb-remote protocol documentation says vCont:t packet is used only in non-stop mode, but LLDB
  does not support non-stop mode
- even if LLDB supported non-stop mode, this implementation of eStateStopped does something
  different from what the spec says it should (according to spec, it should stop the specified
  thread, but this seems to want to stop all threads).

Given the facts above, I believe we should remove this unused and untested code, as it probably
doesn't even work and removing it makes the rest of the code noticably simpler.

Reviewers: ovyalov, chaoren

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9657

llvm-svn: 237103
2015-05-12 09:03:18 +00:00
Pavel Labath 1dbc6c9cd6 [NativeProcessLinux] Remove event mutex and clean functions using it
Summary:
Since the former-TSC events are now processed synchronously, there is no need for to protect them
with a separate mutex - all the actions are now guarded by the big m_threads_mutex.

With the mutex gone, the following functions, no longer have any purpose and were removed:
NotifyThreadCreate: replaced by direct calls to ThreadWasCreated
NotifyThreadStop: replaced by direct calls to ThreadDidStop
NotifyThreadDeath: folded into StopTrackingThread
ResetForExec: inlined as it consisted of a single line of code
RequestThreadResume(AsNeeded): replaced by direct calls to ResumeThread
StopThreads: removed, as it was never called

Test Plan: tests continue to pass

Reviewers: ovyalov, chaoren

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9603

llvm-svn: 237101
2015-05-12 08:35:33 +00:00
Vince Harron 8b33567189 Get lldb-server building on android-9
Build lldb-server with an android-9 sysroot.

llvm-svn: 237078
2015-05-12 01:10:56 +00:00
Pavel Labath 8c8ff7af28 [NativeProcessLinux] Remove double thread state accounting
Summary:
Now that all thread events are processed synchronously, there is no need to have separate records
of whether a thread is running. This changes the (ever-dwindling) remains of the TSC to use
NativeThreadLinux as the authoritative source of the state of threads. The rest of the
ThreadContext we need has been moved to a member of NTL.

Test Plan: ninja check-lldb continues to pass

Reviewers: chaoren, ovyalov

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9562

llvm-svn: 236983
2015-05-11 10:03:10 +00:00
Pavel Labath 337f3eb929 [NativeProcessLinux] Remove the stop callback
Summary:
The stop callback is a remnant of the ThreadStateCoordinator. We don't need it now that TSC is
gone, as we know exactly which function to call when threads stop. This also removes some
stop-related functions, which were just forwarding calls to one another.

Test Plan: ninja check-lldb continues to pass

Reviewers: chaoren, ovyalov

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9531

llvm-svn: 236814
2015-05-08 08:57:45 +00:00
Pavel Labath 5eb721edcb [NativeProcessLinux] Remove logging and error callbacks
Summary:
These are remnants of the thread state coordinator, which are now unnecessary. I have basically
inlined the callbacks. No functional change.

Test Plan: Tests continue to pass.

Reviewers: chaoren, vharron

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9343

llvm-svn: 236707
2015-05-07 08:30:31 +00:00
Mohit K. Bhakkad cdc22a889e [LLDB][MIPS] Software single stepping
Patch by Jaydeep Patil

Reviewers: clayborg, jasonmolenda
Subscribers: bhushan, mohit.bhakkad, sagar, lldb-commits.
Differential Revision: http://reviews.llvm.org/D9519

llvm-svn: 236696
2015-05-07 05:56:27 +00:00
Pavel Labath ed89c7fe44 [NativeProcessLinux] Remove the post-stop lambda
Summary:
The lambda was always calling SetState(eStateStopped) with small variations, so I have inlined
the code. Given that we don't have the TSC anymore, I believe we don't need to be so generic.

The only major change here is the way we choose a stop reason thread when we're interrupting a
program on client request. Previously, we were setting a null stop reason for all threads and
then fixing up the reason for one victim thread in the lambda. Now, I make sure the stop reason
is set for the victim thread correctly in the first place.

I also take the opportunity to rename CallAfter* functions into something more appropriate.

Test Plan: All tests continue to pass.

Reviewers: chaoren, vharron

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9321

llvm-svn: 236595
2015-05-06 12:22:37 +00:00
Pavel Labath c076559a5b [NativeProcessLinux] fold ThreadStateCoordinator into NPL
Summary:
Since all TSC operations are now executed synchronously, TSC has become a little more than a
messenger between different parts of NativeProcessLinux. Therefore, the reason for its existance
has disappeared.

This commit moves the contents of the TSC into the NPL class. This will enable us to remove all
the boilerplate code in NPL (as it stands now, this is most of the class), which I plan to do in
subsequent commits.

Unfortunately, this also means we will lose the unit tests for the TSC. However, since the size
of the TSC has diminished, the unit tests were not testing much at this point anyway, so it's not
a big loss.

No functional change.

Test Plan: All tests continue to pass.

Reviewers: vharron, chaoren

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9296

llvm-svn: 236587
2015-05-06 10:46:34 +00:00
Pavel Labath 9d37c41022 [ThreadStateCoordinator] Remove Event classes
Summary:
This is a cleanup patch for thread state coordinator. After making processing of all events
synchronous, there is no need to have a a separate class for each event. I have moved back
processing of all events back into the TSC class. No functional change.

Test Plan: All tests continue to pass.

Reviewers: chaoren, vharron

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9254

llvm-svn: 236576
2015-05-06 08:23:47 +00:00
Chaoren Lin 26438d26fa Fix Android build.
llvm-svn: 236509
2015-05-05 17:50:53 +00:00
Pavel Labath 45f5cb31dc [NativeProcessLinux] Get rid of the thread state coordinator thread
Summary:
This change removes the thread state coordinator thread by making all the operations it was
performing synchronous. In order to prevent deadlock, NativeProcessLinux must now always call
m_monitor->DoOperation with the m_threads_mutex released. This is needed because HandleWait
callbacks lock the mutex (which means the monitor thread will block waiting on whoever holds the
lock). If the other thread now requests a monitor operation, it will wait for the monitor thread
do process it, creating a deadlock.

To preserve this invariant I have introduced two new Monitor commands: "begin operation block"
and "end operation block". They begin command blocks the monitor from processing waitpid
events until the corresponding end command, thereby assuring the monitor does not attempt to
acquire the mutex.

Test Plan: Run the test suite locally, verify no tests fail.

Reviewers: vharron, chaoren

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9227

llvm-svn: 236501
2015-05-05 15:05:50 +00:00
Chaoren Lin 3eb4b4589e Remove trap code from disassembly.
Summary:
NativeProcessProtocol uses ReadMemory internally for setting/checking
breakpoints but also for generic memory reads (Handle_m), this change adds a
ReadMemoryWithoutTrap for that purpose. Also fixes a bunch of misuses of addr_t
as size/length.

Test Plan: `disassemble` no longer shows the trap code.

Reviewers: jingham, vharron, clayborg

Reviewed By: clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9330

llvm-svn: 236132
2015-04-29 17:24:48 +00:00
Pavel Labath 426bdf8861 [NativeProcessLinux] Add back synchronisation of thread create events
Summary:
Without the synchronisation between the two thread creation events the following case could
happen:
- threads A and B are running. A hits a breakpoint. We note that we want to stop B.
- before we could stop it, B creates a new thread C, we get the stop notification for B, but we
  don't record C's existence yet.
- we resume B
- before we get the C notification, B stops again (e.g. hits a breakpoint, gets our SIGSTOP,
  etc.)
- we see all known threads have stopped, and we notify LLDB
- C notification comes, we note it's existence and resume it
=> we have an inconsistent state (LLDB thinks we've stopped, but C is running)

I resolve this by doing a blocking wait for for the C notification when we get the creation
notification on the parent (B) thread. This way the two events are synchronised, but we don't
need to introduce the intermediate "launching" state which would complicate handling of thread
states as all code would need to be aware of the third possible state.

Test Plan:
This is an obscure corner case, which I had not observed in practise, so I have no
test for it. I have tested that this commit does not regress in existing tests though.

Reviewers: chaoren, vharron

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9217

llvm-svn: 235969
2015-04-28 07:51:52 +00:00
Pavel Labath 6648fcc34b Fix register read callback in linux-arm single stepping
The previous read callback always read the value of the register what
caused problems when the emulator wrote some value into a register and
then expected to read the same value back. This CL add a register value
cache into the callbacks to return the correct value after a register
write also.

Test Plan: Stepping over BL/BLX instruction works on android-arm if the instruction set isn't change (other, unrelated patch will come for the case when we move to an other instruction set)

Reviewers: omjavaid, sas, clayborg

Reviewed By: clayborg

Subscribers: labath, tberghammer, rengolin, aemerson, lldb-commits

Differential Revision: http://reviews.llvm.org/D9187

From: Tamas Berghammer <tberghammer@google.com>
llvm-svn: 235852
2015-04-27 09:21:14 +00:00
Chaoren Lin 9cf4f2c2d8 Fix TestFdLeak on Linux.
Summary:
LLGS leaks pipes (when launched by lldb), sockets (when launched by platform),
and/or log file to the inferior. This should prevent all possible leaks.

Reviewers: vharron, clayborg

Reviewed By: clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9211

llvm-svn: 235615
2015-04-23 18:28:04 +00:00
Pavel Labath 5fd24c673e [NativeProcessLinux] Fix race condition during inferior thread creation
The following situation occured if we were stopping a process (due to breakpoint, watchpoint, ...
hit) while a new thread was being created.
- process has two threads: A and B.
- thread A hits a breakpoint: we send a STOP signal to thread B and register a callback with
  ThreadStateCoordinator to send a stop notification after the thread stops.
- thread B stops, but not due to the SIGSTOP, but on a thread creation event (of a new thread C).
  We are unaware of our desire to stop, so we queue ThreadStopped and RequestResume operations
  with TSC, so the thread can continue running.
- TSC receives the ThreadStopped event, sees that all threads are stopped and fires the delayed
  stop notification.
- immediately after that TSC gets the RequestResume operation, so it resumes the thread.

At this point the state is inconsistent because LLDB thinks the process is stopped and will start
issuing commands to it, but one of the threads is in fact running. Things eventually break.

I address this problem by omitting the two TSC events altogether and Resuming the thread B
directly. This way the short stop is invisible to the TSC and the delayed notification will not
fire. We will fire the notification when we actually process the SIGSTOP on thread B.

When we get the initial SIGSTOP for thread C, we also resume the thread and send a
ThreadWasCreated message (is_stopped = false) to the TSC. This way, the TSC can stop the thread
on its own and handle the stop event later. This way the state of the new thread is correctly
handled as well (thanks Chaoren for the idea).

This patch also removes the synchronisation between the thread creation notifications on threads
B and C. The need for this synchronisation is unclear (the comments seem to hint that the new
thread is "fully created" only after we process both events, but I have noticed no regressions in
treating it as "created" even after just processing the initial C event), but it is a source for
many kinds of obscure races, since it introduces a new thread state "Launching" and the rest of
the code does not handle this state at all (what happens if we get a resume request from LLDB
while this thread is launching? what happens if we get a stop request? etc.).

This fixes the "spurious $O packet" problem in TestPrintStackTraces.py. However, the test remains
disabled on i386 due to the VDSO issue.

Test Plan:
TestPrintStackTraces works on x86_64. No regressions in the rest of the test suite.

Reviewers: vharron, chaoren

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9145

llvm-svn: 235579
2015-04-23 09:04:35 +00:00
Mohit K. Bhakkad e8659b5df6 [LLDB][MIPS] Add MIPS32 and MIPS64 core revisions
Patch by Jaydeep Patil

Added MIPS32 and MIPS64 core revisions. This would be followed by register context and emulate-instruction for MIPS32.

DYLDRendezvous.cpp:
On Linux link map struct does not contain extra load offset field.

Reviewers: clayborg
Subscribers: bhushan, mohit.bhakkad, sagar, lldb-commits.
Differential Revision: http://reviews.llvm.org/D9190

llvm-svn: 235574
2015-04-23 06:36:20 +00:00
Tamas Berghammer e7708688ba Fix signle stepping on arm when multiple thread is involved
On linux-arm we use software single stepping where setting the new
breakpoint is only possible while the process is in stopped state.
This CL moves the setup code for single stepping form the SigneStep
operation into the Resum method to avoid an error when the process
already started when we want to step one of the thread.

Differential revision: http://reviews.llvm.org/D9108

llvm-svn: 235494
2015-04-22 10:00:23 +00:00
Pavel Labath bd7cbc5a97 NativeProcessLinux: Merge operation and monitor threads
Summary:
This commit moves the functionality of the operation thread into the new monitor thread. This is
required to avoid a kernel race between the two threads and I believe it actually makes the code
cleaner.

Test Plan: Ran the test suite a couple of times, no regressions.

Reviewers: ovyalov, tberghammer, vharron

Subscribers: tberghammer, lldb-commits

Differential Revision: http://reviews.llvm.org/D9080

llvm-svn: 235304
2015-04-20 13:53:49 +00:00
Tamas Berghammer c4ddfd865d Auto advance pc for signle stepping on arm when emulation failes
The arm instruction emulation handles only some of the opcode (including
all of them modifying the PC). For the rest of the instructions we can
advance the PC by the size of the instruction as they don't modify the
PC on any other way.

Differential revision: http://reviews.llvm.org/D9076

llvm-svn: 235292
2015-04-20 10:31:22 +00:00
Omair Javaid 652e384a7a Fix LLDB ARM GCC4.7 broken build
llvm-svn: 235280
2015-04-19 21:36:06 +00:00
Pavel Labath 1107b5a597 Use non-blocking waitpid in NativeProcessLinux
Summary:
This is the first phase of the merging of Monitor and Operation threads in NativeProcessLinux
(which is necessary since the two threads race inside Linux kernel). Here, I reimplement the
Monitor thread do use non-blocking waitpid calls, which enables later addition of code from the
operation thread.

Test Plan: Ran the test suite a couple of times, no regressions detected.

Reviewers: vharron, ovyalov, tberghammer

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9048

llvm-svn: 235193
2015-04-17 14:07:49 +00:00
Tamas Berghammer 1fab7b9790 Fix printing of the failure address in NativeThreadLinux
llvm-svn: 235097
2015-04-16 14:06:15 +00:00
Tamas Berghammer d8c338d42f Add single stepping logic for linux arm
Linux arm don't support hardware stepping (neither mismatch
breakpoints). This patch implement signle stepping with doing a software
emulation of the next instruction and then setting a temporary
breakpoint at the address where the thread will stop next.

Differential revision: http://reviews.llvm.org/D8976

llvm-svn: 234987
2015-04-15 09:47:02 +00:00
Tamas Berghammer 63c8be9571 Fix breakpoint trap opcode detection for arm linux
llvm-svn: 234986
2015-04-15 09:38:48 +00:00
Greg Clayton bef47e497f Fix printf warnings about a size mismatch on MacOSX.
llvm-svn: 234941
2015-04-14 20:58:08 +00:00
Omair Javaid 3f57216ca4 Adds Register Context Linux/POSIX for ARM Architecture
This patch is major step towards supporting lldb on ARM.
This adds all the required bits to support register manipulation on Linux Arm.
Also adds utility enumerations, definitions and register context classes for arm.

llvm-svn: 234870
2015-04-14 07:30:20 +00:00
Mohit K. Bhakkad 2c2acf9602 [LLDB][MIPS] Add LinuxSignals for mips64 and change trap opcode for mips64el.
Patch by Sagar Thakur

- Added LinuxSignals for MIPS64.
- Changed software trap opcode for mips64el.

Reviewers: clayborg, tberghammer.

Subscribers: emaste, jaydeep, bhushan, mohit.bhakkad, llvm-commits.

Differential Revision: http://reviews.llvm.org/D8856

llvm-svn: 234469
2015-04-09 07:12:15 +00:00
Benjamin Kramer 3f69fa6f56 Sprinkle some #include <mutex> in files that use std::call_once.
llvm-svn: 234005
2015-04-03 10:55:00 +00:00
Davide Italiano c8d69828ee [Plugin/Process] Use std::call_once() to initialize.
This replaces the home-grown initialization mechanism used before.

Differential Revision:  http://reviews.llvm.org/D8760	

llvm-svn: 233999
2015-04-03 04:24:32 +00:00
Mohit K. Bhakkad 09ba1a323e [LLDB][MIPS] Read/Write register for MIPS64
Patch by Sagar Thakur

Reviewers: clayborg, tberghammer.

Subscribers: jaydeep, bhushan, mohit.bhakkad, llvm-commits.

Differential Revision: http://reviews.llvm.org/D8695

llvm-svn: 233685
2015-03-31 12:01:27 +00:00
Tamas Berghammer db264a6d09 Move several plugin to its own namespace
Affected paths:
* Plugins/Platform/Android/*
* Plugins/Platform/Linux/*
* Plugins/Platform/gdb-server/*
* Plugins/Process/Linux/*
* Plugins/Process/gdb-remote/*

Differential revision: http://reviews.llvm.org/D8654

llvm-svn: 233679
2015-03-31 09:52:22 +00:00
Tamas Berghammer d542efde8b Remove virtual and add override for lots of function.
Effeted pathes:
* Host/posix/*
* Platform/gdb-server/*
* Process/Linux/*
* Process/POSIX/*

llvm-svn: 233193
2015-03-25 15:37:56 +00:00
Tamas Berghammer adf8adbd77 Fix wrong type convesrion in ReadRegOperation
The automatic conversion from long int to lldb::addr_t caused sign
extension but for a register read it is an unwanted behaviour. Fix with
forcing different conversion path.

llvm-svn: 233176
2015-03-25 10:14:19 +00:00
Tamas Berghammer 7cb18bf537 Fetch module specification from remote process also
Previously the remote module sepcification was fetched only from the
remote platform. With this CL if we have a remote process then we ask it
if it have any information from a given module. It is required because
on android the dynamic linker only reports the name of the SO file and
the platform can't always find it without a full path (the process can
do it based on /proc/<pid>/maps).

Differential revision: http://reviews.llvm.org/D8547

llvm-svn: 233061
2015-03-24 11:15:23 +00:00
Richard Smith 7572caf485 Add missing #include to fix libc++ Linux build.
llvm-svn: 232925
2015-03-22 23:18:46 +00:00
Pavel Labath 12fd375629 Add missing cases to NativeProcessLinux LogThreadStopInfo
Test Plan: No tests, this is just a debug logging function.

Reviewers: tberghammer

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D8453

llvm-svn: 232815
2015-03-20 14:45:13 +00:00
Chaoren Lin c16f5dca27 Report watchpoint hits during single stepping.
Summary:
Reorganized NativeProcessLinux::MonitorSIGTRAP to check for watchpoint hits on
TRAP_TRACE.

Added test for stepping over watchpoints.

https://llvm.org/bugs/show_bug.cgi?id=22814

Reviewers: ovyalov, tberghammer, vharron, clayborg

Subscribers: jingham, labath, lldb-commits

Differential Revision: http://reviews.llvm.org/D8404

llvm-svn: 232784
2015-03-19 23:28:10 +00:00
Zachary Turner 3294de270e Move lldb-log.cpp to core/Logging.cpp
So that we don't have to update every single #include in the entire
codebase to #include this new header (which used to get included by
lldb-private-log.h, we automatically #include "Logging.h" from
within "Log.h".

llvm-svn: 232653
2015-03-18 18:20:42 +00:00
David Blaikie 7d3cf0062a Add missing overrides to fix the clang -Werror build (-Winconsistent-missing-override)
llvm-svn: 232504
2015-03-17 17:26:41 +00:00
Tamas Berghammer cb84eebb52 Change reinterpret_casts to static_casts in NativeProcessLinux
llvm-svn: 232491
2015-03-17 15:05:31 +00:00
Tamas Berghammer eadb2a9ed0 Report stopped by trace if none of the watchpoint was hit
Some linux kernel reports a watchpoint hit after single stepping even
when no watchpoint was hit. This CL looks for a watchpoint which was hit
and reports a stop by trace if it haven't found any.

Differential revision: http://reviews.llvm.org/D8081

llvm-svn: 232482
2015-03-17 14:40:57 +00:00
Mohit K. Bhakkad 3df471c32d [MIPS] - Register Context for MIPS64
Patch by Jaydeep Patil

Summery:
1. Add MIPS variants by parsing e_flags of the ELF
2. Create RegisterInfoInterface and RegisterContext for MIPS64 and MIPS64EL

Reviewers: clayborg

Subscribers: tberghammer, bhushan, mohit.bhakkad, sagar

Differential Revision: http://reviews.llvm.org/D8166

llvm-svn: 232467
2015-03-17 11:43:56 +00:00