3 Commits

Author	SHA1	Message	Date
Craig Topper	12d51f95fe	[RISCV] Implement lround*/llround*/lrint*/llrint* with fcvt instruction with -fno-math-errno ... These are fp->int conversions using either RMM or dynamic rounding modes. The lround and lrint opcodes have a return type of either i32 or i64 depending on sizeof(long) in the frontend which should follow xlen. llround/llrint should always return i64 so we'll need a libcall for those on rv32. The frontend will only emit the intrinsics if -fno-math-errno is in effect otherwise a libcall will be emitted which will not use these ISD opcodes. gcc also does this optimization. Reviewed By: arcbbb Differential Revision: https://reviews.llvm.org/D105206	2021-07-06 11:43:22 -07:00
Craig Topper	e52a91e156	[RISCV] Add f16 to isFMAFasterThanFMulAndFAdd now that the Zfh extension is supported	2020-12-02 20:31:43 -08:00
Hsiangkai Wang	f7bc7c2981	[RISCV] Support Zfh half-precision floating-point extension. ... Support "Zfh" extension according to https://github.com/riscv/riscv-isa-manual/blob/zfh/src/zfh.tex Differential Revision: https://reviews.llvm.org/D90738	2020-12-03 09:16:33 +08:00