61 Commits

Author	SHA1	Message	Date
Craig Topper	c16db840be	Fix issues in shuffle decoding around VPERM* instructions. Fix shuffle decoding for VSHUFPS/D for 256-bit types. Add pattern matching for memory forms of VPERMILPS/VPERMILPD. ... llvm-svn: 145390	2011-11-29 07:49:05 +00:00
Craig Topper	83c4592619	More fixes to the X86InstComments for shuffle instructions. In particular add AVX flavors of many instructions and fix the destination operand for some of the existing AVX entries. ... llvm-svn: 145063	2011-11-22 14:27:57 +00:00
Craig Topper	ccb7097509	Fix shuffle decoding logic to handle UNPCKLPS/UNPCKLPD on 256-bit vectors correctly. Add support for decoding UNPCKHPS/UNPCKHPD for AVX 128-bit and 256-bit forms. ... llvm-svn: 145055	2011-11-22 01:57:35 +00:00
Bruno Cardoso Lopes	f15dfe5818	The VPERM2F128 is a AVX instruction which permutes between two 256-bit ... vectors. It operates on 128-bit elements instead of regular scalar types. Recognize shuffles that are suitable for VPERM2F128 and teach the x86 legalizer how to handle them. llvm-svn: 137519	2011-08-12 21:48:26 +00:00
Bruno Cardoso Lopes	795f558532	Add DecodeShuffle shuffle support for VPERMIPD variantes ... llvm-svn: 136452	2011-07-29 01:31:11 +00:00
Bruno Cardoso Lopes	f8fe47bd2b	Recognize unpckh* masks and match 256-bit versions. The new versions are ... different from the previous 128-bit because they work in lanes. Update a few comments and add testcases llvm-svn: 136157	2011-07-26 22:03:40 +00:00
Bruno Cardoso Lopes	b878caa5e2	Add support for 256-bit versions of VPERMIL instruction. This is a new ... instruction introduced in AVX, which can operate on 128 and 256-bit vectors. It considers a 256-bit vector as two independent 128-bit lanes. It can permute any 32 or 64 elements inside a lane, and restricts the second lane to have the same permutation of the first one. With the improved splat support introduced early today, adding codegen for this instruction enable more efficient 256-bit code: Instead of: vextractf128 $0, %ymm0, %xmm0 punpcklbw %xmm0, %xmm0 punpckhbw %xmm0, %xmm0 vinsertf128 $0, %xmm0, %ymm0, %ymm1 vinsertf128 $1, %xmm0, %ymm1, %ymm0 vextractf128 $1, %ymm0, %xmm1 shufps $1, %xmm1, %xmm1 movss %xmm1, 28(%rsp) movss %xmm1, 24(%rsp) movss %xmm1, 20(%rsp) movss %xmm1, 16(%rsp) vextractf128 $0, %ymm0, %xmm0 shufps $1, %xmm0, %xmm0 movss %xmm0, 12(%rsp) movss %xmm0, 8(%rsp) movss %xmm0, 4(%rsp) movss %xmm0, (%rsp) vmovaps (%rsp), %ymm0 We get: vextractf128 $0, %ymm0, %xmm0 punpcklbw %xmm0, %xmm0 punpckhbw %xmm0, %xmm0 vinsertf128 $0, %xmm0, %ymm0, %ymm1 vinsertf128 $1, %xmm0, %ymm1, %ymm0 vpermilps $85, %ymm0, %ymm0 llvm-svn: 135662	2011-07-21 01:55:47 +00:00
David Greene	dd567b214b	[AVX] Fix mask predicates for 256-bit UNPCKLPS/D and implement ... missing patterns for them. Add a SIMD test subdirectory to hold tests for SIMD instruction selection correctness and quality. ' llvm-svn: 126845	2011-03-02 17:23:43 +00:00
Chris Lattner	c93d207e8c	fix a signed comparison warning. ... llvm-svn: 126682	2011-02-28 20:50:35 +00:00
David Greene	20a1cbefad	[AVX] Add decode support for VUNPCKLPS/D instructions, both 128-bit ... and 256-bit forms. Because the number of elements in a vector does not determine the vector type (4 elements could be v4f32 or v4f64), pass the full type of the vector to decode routines. llvm-svn: 126664	2011-02-28 19:06:56 +00:00
David Greene	3a2b508e8f	[AVX] Recorganize X86ShuffleDecode into its own library ... (LLVMX86Utils.a) to break cyclic library dependencies between LLVMX86CodeGen.a and LLVMX86AsmParser.a. Previously this code was in a header file and marked static but AVX requires some additional functionality here that won't be used by all clients. Since including unused static functions causes a gcc compiler warning, keeping it as a header would break builds that use -Werror. Putting this in its own library solves both problems at once. llvm-svn: 125765	2011-02-17 19:18:59 +00:00