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6 Commits

Author SHA1 Message Date
Bob Wilson 36be00ceb3 Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions. 
If the basic block containing the BCCi64 (or BCCZi64) instruction ends with
an unconditional branch, that branch needs to be deleted before appending
the expansion of the BCCi64 to the end of the block.

llvm-svn: 122521
 2010-12-23 22:45:49 +00:00
Evan Cheng 55f0c6b9fc Split -enable-finite-only-fp-math to two options: 
-enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN.

llvm-svn: 108465
 2010-07-15 22:07:12 +00:00
Evan Cheng 0cc4ad983d Extend the r107852 optimization which turns some fp compare to code sequence using only i32 operations. It now optimize some f64 compares when fp compare is exceptionally slow (e.g. cortex-a8). It also catches comparison against 0.0. 
llvm-svn: 108258
 2010-07-13 19:27:42 +00:00
Evan Cheng 0f54854a1d Check for FiniteOnlyFPMath as well. 
llvm-svn: 107904
 2010-07-08 20:12:24 +00:00
Evan Cheng be1f7a931e r107852 is only safe with -enable-unsafe-fp-math to account for +0.0 == -0.0. 
llvm-svn: 107856
 2010-07-08 06:01:49 +00:00
Evan Cheng 25f9364cbd Optimize some vfp comparisons to integer ones. This patch implements the simplest case when the following conditions are met: 
1. The arguments are f32.
2. The arguments are loads and they have no uses other than the comparison.
3. The comparison code is EQ or NE.

e.g.
        vldr.32 s0, [r1]
        vldr.32 s1, [r0]
        vcmpe.f32       s1, s0
        vmrs    apsr_nzcv, fpscr
	beq     LBB0_2
=>
        ldr     r1, [r1]
        ldr     r0, [r0]
        cmp     r0, r1
        beq     LBB0_2

More complicated cases will be implemented in subsequent patches.

llvm-svn: 107852
 2010-07-08 02:08:50 +00:00