Evan Cheng 05f13e94bf Correct some load / store instruction itinerary mistakes: ... 1. Cortex-A8 load / store multiplies can only issue on ALU0. 2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues. 3. Correctly model all vld1 and vld2 variants. llvm-svn: 116134		2010-10-09 01:03:04 +00:00
clang	Add support for UCNs for character literals	2010-10-09 00:27:47 +00:00
compiler-rt	<rdar://problem/8482056> Add Soft Floating Compares for armv6 and armv7	2010-09-27 18:28:15 +00:00
debuginfo-tests	testcase commit for upcoming fix.	2010-09-21 20:51:54 +00:00
libcxx	Updated atomic design docs	2010-10-08 17:36:50 +00:00
lldb	Fixed a missing space when using the "apropos" command and you don't find any matches.	2010-10-09 00:51:35 +00:00
llvm	Correct some load / store instruction itinerary mistakes:	2010-10-09 01:03:04 +00:00