forked from OSchip/llvm-project
35 lines
941 B
YAML
35 lines
941 B
YAML
# RUN: llc -O0 %s -o - 2>&1 -march=avr | FileCheck %s
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# This test ensures that the pseudo expander can correctly handle the case
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# where we are expanding a 16-bit LDD instruction where the source and
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# destination registers are the same.
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#
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# The instruction itself is earlyclobber and so ISel will never produce an
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# instruction like this, but the stack slot loading can and will.
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--- |
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target triple = "avr--"
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define void @test_lddw() {
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entry:
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ret void
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}
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...
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---
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name: test_lddw
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stack:
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- { id: 0, type: spill-slot, offset: -4, size: 1, alignment: 1, callee-saved-register: '%r28' }
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body: |
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bb.0.entry:
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liveins: %r28, %r29
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; CHECK-LABEL: test_lddw
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; CHECK: ldd [[TMPREG:r[0-9]+]], Y+0
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; CHECK-NEXT: mov r28, [[TMPREG]]
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; CHECK-NEXT: ldd [[TMPREG]], Y+1
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; CHECK-NEXT: mov r29, [[TMPREG]]
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dead early-clobber %r29r28 = LDDWRdYQ killed %r29r28, 0
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...
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