forked from OSchip/llvm-project
428 lines
8.9 KiB
LLVM
428 lines
8.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; There should be no 'and' instructions left in any test.
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define i32 @test1(i32 %A) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret i32 0
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;
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%B = and i32 %A, 0
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ret i32 %B
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}
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define i32 @test2(i32 %A) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: ret i32 %A
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;
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%B = and i32 %A, -1
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ret i32 %B
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}
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define i1 @test3(i1 %A) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: ret i1 false
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;
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%B = and i1 %A, false
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ret i1 %B
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}
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define i1 @test4(i1 %A) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: ret i1 %A
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;
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%B = and i1 %A, true
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ret i1 %B
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}
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define i32 @test5(i32 %A) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: ret i32 %A
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;
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%B = and i32 %A, %A
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ret i32 %B
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}
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define i1 @test6(i1 %A) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: ret i1 %A
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;
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%B = and i1 %A, %A
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ret i1 %B
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}
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; A & ~A == 0
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define i32 @test7(i32 %A) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: ret i32 0
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;
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%NotA = xor i32 %A, -1
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%B = and i32 %A, %NotA
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ret i32 %B
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}
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; AND associates
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define i8 @test8(i8 %A) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: ret i8 0
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;
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%B = and i8 %A, 3
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%C = and i8 %B, 4
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ret i8 %C
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}
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; Test of sign bit, convert to setle %A, 0
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define i1 @test9(i32 %A) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %A, 0
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; CHECK-NEXT: ret i1 [[C]]
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;
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%B = and i32 %A, -2147483648
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%C = icmp ne i32 %B, 0
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ret i1 %C
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}
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; Test of sign bit, convert to setle %A, 0
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define i1 @test9a(i32 %A) {
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; CHECK-LABEL: @test9a(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %A, 0
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; CHECK-NEXT: ret i1 [[C]]
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;
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%B = and i32 %A, -2147483648
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%C = icmp ne i32 %B, 0
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ret i1 %C
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}
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define i32 @test10(i32 %A) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: ret i32 1
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;
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%B = and i32 %A, 12
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%C = xor i32 %B, 15
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; (X ^ C1) & C2 --> (X & C2) ^ (C1&C2)
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%D = and i32 %C, 1
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ret i32 %D
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}
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define i32 @test11(i32 %A, i32* %P) {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: [[B:%.*]] = or i32 %A, 3
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; CHECK-NEXT: [[C:%.*]] = xor i32 [[B]], 12
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; CHECK-NEXT: store i32 [[C]], i32* %P, align 4
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; CHECK-NEXT: ret i32 3
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;
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%B = or i32 %A, 3
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%C = xor i32 %B, 12
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; additional use of C
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store i32 %C, i32* %P
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; %C = and uint %B, 3 --> 3
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%D = and i32 %C, 3
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ret i32 %D
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}
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define i1 @test12(i32 %A, i32 %B) {
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 %A, %B
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%C1 = icmp ult i32 %A, %B
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%C2 = icmp ule i32 %A, %B
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; (A < B) & (A <= B) === (A < B)
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%D = and i1 %C1, %C2
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ret i1 %D
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}
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define i1 @test13(i32 %A, i32 %B) {
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; CHECK-LABEL: @test13(
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; CHECK-NEXT: ret i1 false
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;
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%C1 = icmp ult i32 %A, %B
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%C2 = icmp ugt i32 %A, %B
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; (A < B) & (A > B) === false
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%D = and i1 %C1, %C2
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ret i1 %D
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}
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define i1 @test14(i8 %A) {
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; CHECK-LABEL: @test14(
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; CHECK-NEXT: [[C:%.*]] = icmp slt i8 %A, 0
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; CHECK-NEXT: ret i1 [[C]]
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;
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%B = and i8 %A, -128
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%C = icmp ne i8 %B, 0
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ret i1 %C
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}
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define i8 @test15(i8 %A) {
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; CHECK-LABEL: @test15(
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; CHECK-NEXT: ret i8 0
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;
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%B = lshr i8 %A, 7
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; Always equals zero
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%C = and i8 %B, 2
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ret i8 %C
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}
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define i8 @test16(i8 %A) {
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; CHECK-LABEL: @test16(
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; CHECK-NEXT: ret i8 0
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;
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%B = shl i8 %A, 2
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%C = and i8 %B, 3
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ret i8 %C
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}
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;; ~(~X & Y) --> (X | ~Y)
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define i8 @test17(i8 %X, i8 %Y) {
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; CHECK-LABEL: @test17(
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; CHECK-NEXT: [[Y_NOT:%.*]] = xor i8 %Y, -1
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; CHECK-NEXT: [[D:%.*]] = or i8 %X, [[Y_NOT]]
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; CHECK-NEXT: ret i8 [[D]]
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;
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%B = xor i8 %X, -1
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%C = and i8 %B, %Y
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%D = xor i8 %C, -1
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ret i8 %D
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}
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define i1 @test18(i32 %A) {
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; CHECK-LABEL: @test18(
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; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %A, 127
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; CHECK-NEXT: ret i1 [[C]]
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;
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%B = and i32 %A, -128
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;; C >= 128
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%C = icmp ne i32 %B, 0
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ret i1 %C
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}
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define <2 x i1> @test18_vec(<2 x i32> %A) {
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; CHECK-LABEL: @test18_vec(
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; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i32> %A, <i32 127, i32 127>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%B = and <2 x i32> %A, <i32 -128, i32 -128>
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%C = icmp ne <2 x i32> %B, zeroinitializer
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ret <2 x i1> %C
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}
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define i1 @test18a(i8 %A) {
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; CHECK-LABEL: @test18a(
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; CHECK-NEXT: [[C:%.*]] = icmp ult i8 %A, 2
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; CHECK-NEXT: ret i1 [[C]]
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;
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%B = and i8 %A, -2
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%C = icmp eq i8 %B, 0
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ret i1 %C
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}
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define <2 x i1> @test18a_vec(<2 x i8> %A) {
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; CHECK-LABEL: @test18a_vec(
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; CHECK-NEXT: [[C:%.*]] = icmp ult <2 x i8> %A, <i8 2, i8 2>
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; CHECK-NEXT: ret <2 x i1> [[C]]
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;
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%B = and <2 x i8> %A, <i8 -2, i8 -2>
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%C = icmp eq <2 x i8> %B, zeroinitializer
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ret <2 x i1> %C
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}
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define i32 @test19(i32 %A) {
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; CHECK-LABEL: @test19(
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; CHECK-NEXT: [[B:%.*]] = shl i32 %A, 3
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; CHECK-NEXT: ret i32 [[B]]
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;
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%B = shl i32 %A, 3
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;; Clearing a zero bit
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%C = and i32 %B, -2
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ret i32 %C
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}
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define i8 @test20(i8 %A) {
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; CHECK-LABEL: @test20(
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; CHECK-NEXT: [[C:%.*]] = lshr i8 %A, 7
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; CHECK-NEXT: ret i8 [[C]]
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;
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%C = lshr i8 %A, 7
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;; Unneeded
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%D = and i8 %C, 1
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ret i8 %D
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}
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define i1 @test23(i32 %A) {
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; CHECK-LABEL: @test23(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 %A, 2
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%B = icmp sgt i32 %A, 1
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%C = icmp sle i32 %A, 2
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%D = and i1 %B, %C
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ret i1 %D
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}
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; FIXME: Vectors should fold too.
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define <2 x i1> @test23vec(<2 x i32> %A) {
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; CHECK-LABEL: @test23vec(
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; CHECK-NEXT: [[B:%.*]] = icmp sgt <2 x i32> %A, <i32 1, i32 1>
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; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> %A, <i32 3, i32 3>
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; CHECK-NEXT: [[D:%.*]] = and <2 x i1> [[B]], [[C]]
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; CHECK-NEXT: ret <2 x i1> [[D]]
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;
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%B = icmp sgt <2 x i32> %A, <i32 1, i32 1>
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%C = icmp sle <2 x i32> %A, <i32 2, i32 2>
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%D = and <2 x i1> %B, %C
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ret <2 x i1> %D
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}
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define i1 @test24(i32 %A) {
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; CHECK-LABEL: @test24(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %A, 2
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%B = icmp sgt i32 %A, 1
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%C = icmp ne i32 %A, 2
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;; A > 2
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%D = and i1 %B, %C
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ret i1 %D
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}
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define i1 @test25(i32 %A) {
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; CHECK-LABEL: @test25(
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; CHECK-NEXT: [[A_OFF:%.*]] = add i32 %A, -50
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[A_OFF]], 50
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%B = icmp sge i32 %A, 50
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%C = icmp slt i32 %A, 100
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%D = and i1 %B, %C
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ret i1 %D
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}
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; FIXME: Vectors should fold too.
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define <2 x i1> @test25vec(<2 x i32> %A) {
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; CHECK-LABEL: @test25vec(
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; CHECK-NEXT: [[B:%.*]] = icmp sgt <2 x i32> %A, <i32 49, i32 49>
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; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> %A, <i32 100, i32 100>
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; CHECK-NEXT: [[D:%.*]] = and <2 x i1> [[B]], [[C]]
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; CHECK-NEXT: ret <2 x i1> [[D]]
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;
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%B = icmp sge <2 x i32> %A, <i32 50, i32 50>
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%C = icmp slt <2 x i32> %A, <i32 100, i32 100>
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%D = and <2 x i1> %B, %C
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ret <2 x i1> %D
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}
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define i1 @test26(i32 %A) {
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; CHECK-LABEL: @test26(
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; CHECK-NEXT: [[A_OFF:%.*]] = add i32 %A, -49
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; CHECK-NEXT: [[A_CMP:%.*]] = icmp ugt i32 [[A_OFF]], 1
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; CHECK-NEXT: ret i1 [[A_CMP]]
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;
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%B = icmp ne i32 %A, 49
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%C = icmp ne i32 %A, 50
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;; (A-49) > 1
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%D = and i1 %B, %C
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ret i1 %D
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}
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define i8 @test27(i8 %A) {
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; CHECK-LABEL: @test27(
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; CHECK-NEXT: ret i8 0
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;
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%B = and i8 %A, 4
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%C = sub i8 %B, 16
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;; 0xF0
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%D = and i8 %C, -16
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%E = add i8 %D, 16
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ret i8 %E
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}
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;; This is juse a zero extending shr.
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define i32 @test28(i32 %X) {
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; CHECK-LABEL: @test28(
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; CHECK-NEXT: [[Y1:%.*]] = lshr i32 %X, 24
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; CHECK-NEXT: ret i32 [[Y1]]
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;
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;; Sign extend
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%Y = ashr i32 %X, 24
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;; Mask out sign bits
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%Z = and i32 %Y, 255
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ret i32 %Z
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}
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define i32 @test29(i8 %X) {
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; CHECK-LABEL: @test29(
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; CHECK-NEXT: [[Y:%.*]] = zext i8 %X to i32
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; CHECK-NEXT: ret i32 [[Y]]
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;
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%Y = zext i8 %X to i32
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;; Zero extend makes this unneeded.
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%Z = and i32 %Y, 255
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ret i32 %Z
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}
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define i32 @test30(i1 %X) {
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; CHECK-LABEL: @test30(
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; CHECK-NEXT: [[Y:%.*]] = zext i1 %X to i32
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; CHECK-NEXT: ret i32 [[Y]]
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;
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%Y = zext i1 %X to i32
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%Z = and i32 %Y, 1
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ret i32 %Z
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}
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define i32 @test31(i1 %X) {
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; CHECK-LABEL: @test31(
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; CHECK-NEXT: [[Y:%.*]] = zext i1 %X to i32
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; CHECK-NEXT: [[Z:%.*]] = shl nuw nsw i32 [[Y]], 4
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; CHECK-NEXT: ret i32 [[Z]]
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;
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%Y = zext i1 %X to i32
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%Z = shl i32 %Y, 4
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%A = and i32 %Z, 16
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ret i32 %A
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}
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define i32 @test32(i32 %In) {
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; CHECK-LABEL: @test32(
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; CHECK-NEXT: ret i32 0
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;
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%Y = and i32 %In, 16
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%Z = lshr i32 %Y, 2
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%A = and i32 %Z, 1
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ret i32 %A
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}
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;; Code corresponding to one-bit bitfield ^1.
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define i32 @test33(i32 %b) {
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; CHECK-LABEL: @test33(
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; CHECK-NEXT: [[TMP_13:%.*]] = xor i32 %b, 1
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; CHECK-NEXT: ret i32 [[TMP_13]]
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;
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%tmp.4.mask = and i32 %b, 1
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%tmp.10 = xor i32 %tmp.4.mask, 1
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%tmp.12 = and i32 %b, -2
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%tmp.13 = or i32 %tmp.12, %tmp.10
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ret i32 %tmp.13
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}
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define i32 @test34(i32 %A, i32 %B) {
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; CHECK-LABEL: @test34(
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; CHECK-NEXT: ret i32 %B
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;
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%tmp.2 = or i32 %B, %A
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%tmp.4 = and i32 %tmp.2, %B
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ret i32 %tmp.4
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}
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; FIXME: This test should only need -instsimplify (ValueTracking / computeKnownBits), not -instcombine.
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define <2 x i32> @PR24942(<2 x i32> %x) {
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; CHECK-LABEL: @PR24942(
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; CHECK-NEXT: ret <2 x i32> zeroinitializer
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;
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%lshr = lshr <2 x i32> %x, <i32 31, i32 31>
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%and = and <2 x i32> %lshr, <i32 2, i32 2>
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ret <2 x i32> %and
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}
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