forked from OSchip/llvm-project
				
			
		
			
				
	
	
		
			314 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			314 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			LLVM
		
	
	
	
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; This should never happen, but make sure we don't crash handling a non-constant immediate byte.
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define <4 x double> @perm2pd_non_const_imm(<4 x double> %a0, <4 x double> %a1, i8 %b) {
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; CHECK-LABEL: @perm2pd_non_const_imm(
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; CHECK-NEXT:    [[RES:%.*]] = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 %b)
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; CHECK-NEXT:    ret <4 x double> [[RES]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 %b)
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  ret <4 x double> %res
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}
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; In the following 4 tests, both zero mask bits of the immediate are set.
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define <4 x double> @perm2pd_0x88(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x88(
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; CHECK-NEXT:    ret <4 x double> zeroinitializer
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 136)
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  ret <4 x double> %res
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}
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define <8 x float> @perm2ps_0x88(<8 x float> %a0, <8 x float> %a1) {
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; CHECK-LABEL: @perm2ps_0x88(
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; CHECK-NEXT:    ret <8 x float> zeroinitializer
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;
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  %res = call <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float> %a0, <8 x float> %a1, i8 136)
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  ret <8 x float> %res
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}
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define <8 x i32> @perm2si_0x88(<8 x i32> %a0, <8 x i32> %a1) {
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; CHECK-LABEL: @perm2si_0x88(
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; CHECK-NEXT:    ret <8 x i32> zeroinitializer
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;
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  %res = call <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32> %a0, <8 x i32> %a1, i8 136)
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  ret <8 x i32> %res
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}
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define <4 x i64> @perm2i_0x88(<4 x i64> %a0, <4 x i64> %a1) {
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; CHECK-LABEL: @perm2i_0x88(
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; CHECK-NEXT:    ret <4 x i64> zeroinitializer
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;
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  %res = call <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64> %a0, <4 x i64> %a1, i8 136)
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  ret <4 x i64> %res
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}
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; The other control bits are ignored when zero mask bits of the immediate are set.
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define <4 x double> @perm2pd_0xff(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0xff(
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; CHECK-NEXT:    ret <4 x double> zeroinitializer
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 255)
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  ret <4 x double> %res
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}
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; The following 16 tests are simple shuffles, except for 2 cases where we can just return one of the
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; source vectors. Verify that we generate the right shuffle masks and undef source operand where possible..
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define <4 x double> @perm2pd_0x00(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x00(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 0)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x01(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x01(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 1)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x02(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x02(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> %a0, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 2)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x03(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x03(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> %a0, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 3)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x10(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x10(
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; CHECK-NEXT:    ret <4 x double> %a0
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 16)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x11(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x11(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> undef, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 17)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x12(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x12(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> %a0, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 18)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x13(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x13(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> %a0, <4 x i32> <i32 2, i32 3, i32 6, i32 7>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 19)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x20(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x20(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 32)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x21(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x21(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 33)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x22(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x22(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 34)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x23(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x23(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 35)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x30(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x30(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 48)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x31(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x31(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 2, i32 3, i32 6, i32 7>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 49)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x32(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x32(
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; CHECK-NEXT:    ret <4 x double> %a1
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 50)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x33(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x33(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> undef, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 51)
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  ret <4 x double> %res
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}
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; Confirm that a mask for 32-bit elements is also correct.
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define <8 x float> @perm2ps_0x31(<8 x float> %a0, <8 x float> %a1) {
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; CHECK-LABEL: @perm2ps_0x31(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15>
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; CHECK-NEXT:    ret <8 x float> [[TMP1]]
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;
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  %res = call <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float> %a0, <8 x float> %a1, i8 49)
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  ret <8 x float> %res
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}
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; Confirm that the AVX2 version works the same.
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define <4 x i64> @perm2i_0x33(<4 x i64> %a0, <4 x i64> %a1) {
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; CHECK-LABEL: @perm2i_0x33(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x i64> %a1, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
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; CHECK-NEXT:    ret <4 x i64> [[TMP1]]
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;
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  %res = call <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64> %a0, <4 x i64> %a1, i8 51)
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  ret <4 x i64> %res
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}
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; Confirm that when a single zero mask bit is set, we replace a source vector with zeros.
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define <4 x double> @perm2pd_0x81(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x81(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> <double 0.000000e+00, double 0.000000e+00, double undef, double undef>, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 129)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x83(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x83(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> <double 0.000000e+00, double 0.000000e+00, double undef, double undef>, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 131)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x28(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x28(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> <double 0.000000e+00, double 0.000000e+00, double undef, double undef>, <4 x double> %a1, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 40)
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  ret <4 x double> %res
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}
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define <4 x double> @perm2pd_0x08(<4 x double> %a0, <4 x double> %a1) {
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; CHECK-LABEL: @perm2pd_0x08(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> <double 0.000000e+00, double 0.000000e+00, double undef, double undef>, <4 x double> %a0, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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; CHECK-NEXT:    ret <4 x double> [[TMP1]]
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;
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  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 8)
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  ret <4 x double> %res
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}
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; Check one more with the AVX2 version.
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define <4 x i64> @perm2i_0x28(<4 x i64> %a0, <4 x i64> %a1) {
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; CHECK-LABEL: @perm2i_0x28(
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; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x i64> <i64 0, i64 0, i64 undef, i64 undef>, <4 x i64> %a1, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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; CHECK-NEXT:    ret <4 x i64> [[TMP1]]
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;
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  %res = call <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64> %a0, <4 x i64> %a1, i8 40)
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  ret <4 x i64> %res
 | 
						|
 | 
						|
}
 | 
						|
 | 
						|
declare <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double>, <4 x double>, i8) nounwind readnone
 | 
						|
declare <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float>, <8 x float>, i8) nounwind readnone
 | 
						|
declare <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32>, <8 x i32>, i8) nounwind readnone
 | 
						|
declare <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64>, <4 x i64>, i8) nounwind readnone
 | 
						|
 |