forked from OSchip/llvm-project
27 lines
679 B
LLVM
27 lines
679 B
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
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; Optimize fneg to togglebit in V5.
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define float @foo(float %x) nounwind {
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entry:
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; CHECK: r{{[0-9]+}} = togglebit(r{{[0-9]+}}, #31)
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%x.addr = alloca float, align 4
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store float %x, float* %x.addr, align 4
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%0 = load float* %x.addr, align 4
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%sub = fsub float -0.000000e+00, %0
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ret float %sub
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}
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define float @bar(float %x) nounwind {
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entry:
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; CHECK: r{{[0-9]+}} = togglebit(r{{[0-9]+}}, #31)
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%sub = fsub float -0.000000e+00, %x
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ret float %sub
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}
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define float @baz(float %x) nounwind {
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entry:
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; CHECK: r{{[0-9]+}} = togglebit(r{{[0-9]+}}, #31)
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%conv1 = fmul float %x, -1.000000e+00
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ret float %conv1
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}
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