forked from OSchip/llvm-project
				
			
		
			
				
	
	
		
			106 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			106 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: opt -S -codegenprepare -mcpu=core-avx2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX2
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| ; RUN: opt -S -codegenprepare -mcpu=corei7 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-SSE2
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| 
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| target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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| target triple = "x86_64-apple-darwin10.9.0"
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| 
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| define <16 x i8> @test_8bit(<16 x i8> %lhs, <16 x i8> %tmp, i1 %tst) {
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| ; CHECK-LABEL: @test_8bit
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| ; CHECK: if_true:
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| ; CHECK-NOT: shufflevector
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| 
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| ; CHECK: if_false:
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| ; CHECK-NOT: shufflevector
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| ; CHECK: shl <16 x i8> %lhs, %mask
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|   %mask = shufflevector <16 x i8> %tmp, <16 x i8> undef, <16 x i32> zeroinitializer
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|   br i1 %tst, label %if_true, label %if_false
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| 
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| if_true:
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|   ret <16 x i8> %mask
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| 
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| if_false:
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|   %res = shl <16 x i8> %lhs, %mask
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|   ret <16 x i8> %res
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| }
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| 
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| define <8 x i16> @test_16bit(<8 x i16> %lhs, <8 x i16> %tmp, i1 %tst) {
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| ; CHECK-LABEL: @test_16bit
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| ; CHECK: if_true:
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| ; CHECK-NOT: shufflevector
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| 
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| ; CHECK: if_false:
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| ; CHECK: [[SPLAT:%[0-9a-zA-Z_]+]] = shufflevector
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| ; CHECK: shl <8 x i16> %lhs, [[SPLAT]]
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|   %mask = shufflevector <8 x i16> %tmp, <8 x i16> undef, <8 x i32> zeroinitializer
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|   br i1 %tst, label %if_true, label %if_false
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| 
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| if_true:
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|   ret <8 x i16> %mask
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| 
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| if_false:
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|   %res = shl <8 x i16> %lhs, %mask
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|   ret <8 x i16> %res
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| }
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| 
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| define <4 x i32> @test_notsplat(<4 x i32> %lhs, <4 x i32> %tmp, i1 %tst) {
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| ; CHECK-LABEL: @test_notsplat
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| ; CHECK: if_true:
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| ; CHECK-NOT: shufflevector
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| 
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| ; CHECK: if_false:
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| ; CHECK-NOT: shufflevector
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| ; CHECK: shl <4 x i32> %lhs, %mask
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|   %mask = shufflevector <4 x i32> %tmp, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 1, i32 0>
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|   br i1 %tst, label %if_true, label %if_false
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| 
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| if_true:
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|   ret <4 x i32> %mask
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| 
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| if_false:
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|   %res = shl <4 x i32> %lhs, %mask
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|   ret <4 x i32> %res
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| }
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| 
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| define <4 x i32> @test_32bit(<4 x i32> %lhs, <4 x i32> %tmp, i1 %tst) {
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| ; CHECK-AVX2-LABEL: @test_32bit
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| ; CHECK-AVX2: if_false:
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| ; CHECK-AVX2-NOT: shufflevector
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| ; CHECK-AVX2: ashr <4 x i32> %lhs, %mask
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| 
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| ; CHECK-SSE2-LABEL: @test_32bit
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| ; CHECK-SSE2: if_false:
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| ; CHECK-SSE2: [[SPLAT:%[0-9a-zA-Z_]+]] = shufflevector
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| ; CHECK-SSE2: ashr <4 x i32> %lhs, [[SPLAT]]
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|   %mask = shufflevector <4 x i32> %tmp, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 0, i32 0>
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|   br i1 %tst, label %if_true, label %if_false
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| 
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| if_true:
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|   ret <4 x i32> %mask
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| 
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| if_false:
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|   %res = ashr <4 x i32> %lhs, %mask
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|   ret <4 x i32> %res
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| }
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| 
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| define <2 x i64> @test_64bit(<2 x i64> %lhs, <2 x i64> %tmp, i1 %tst) {
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| ; CHECK-AVX2-LABEL: @test_64bit
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| ; CHECK-AVX2: if_false:
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| ; CHECK-AVX2-NOT: shufflevector
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| ; CHECK-AVX2: lshr <2 x i64> %lhs, %mask
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| 
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| ; CHECK-SSE2-LABEL: @test_64bit
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| ; CHECK-SSE2: if_false:
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| ; CHECK-SSE2: [[SPLAT:%[0-9a-zA-Z_]+]] = shufflevector
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| ; CHECK-SSE2: lshr <2 x i64> %lhs, [[SPLAT]]
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| 
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|   %mask = shufflevector <2 x i64> %tmp, <2 x i64> undef, <2 x i32> zeroinitializer
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|   br i1 %tst, label %if_true, label %if_false
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| 
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| if_true:
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|   ret <2 x i64> %mask
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| 
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| if_false:
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|   %res = lshr <2 x i64> %lhs, %mask
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|   ret <2 x i64> %res
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| }
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