Nigel
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
llvm-project/llvm/test/Transforms/PhaseOrdering/X86
History
Anton Afanasyev cfb6dfcbd1 [AggressiveInstCombine] Add logical shift right instr to `TruncInstCombine` DAG 
Add `lshr` instruction to the DAG post-dominated by `trunc`, allowing
TruncInstCombine to reduce bitwidth of expressions containing
these instructions.

We should be shifting by less than the target bitwidth.
Also it is sufficient to require that all truncated bits
of the value-to-be-shifted are zeros: https://alive2.llvm.org/ce/z/_LytbB

Alive2 variable-length proof:
https://godbolt.org/z/1srE1aqzf => s/32/8/ => https://alive2.llvm.org/ce/z/StwPia

Part of https://reviews.llvm.org/D107766

Differential Revision: https://reviews.llvm.org/D108201
 		2021-08-18 22:20:58 +03:00
..
SROA-after-loop-unrolling.ll [NewPM][opt] Run the "default" AA pipeline by default 2021-01-21 21:08:54 -08:00
addsub-inseltpoison.ll [NewPM][opt] Run the "default" AA pipeline by default 2021-01-21 21:08:54 -08:00
addsub.ll [NewPM][opt] Run the "default" AA pipeline by default 2021-01-21 21:08:54 -08:00
ctlz-loop.ll Reapply [InstCombine] Fold multiuse shr eq zero 2021-05-22 14:46:50 +02:00
earlycse-after-simplifycfg-two-entry-phi-node-folding.ll [SimplifyCFG] Rerun PHI deduplication after common code sinkinkg (PR51092) 2021-07-15 16:34:34 +03:00
horiz-math-inseltpoison.ll [InstCombine] use poison as placeholder for undemanded elems 2020-12-28 08:58:15 +09:00
horiz-math.ll [InstCombine] use poison as placeholder for undemanded elems 2020-12-28 08:58:15 +09:00
lit.local.cfg
…
loop-idiom-vs-indvars.ll [NewPM][opt] Run the "default" AA pipeline by default 2021-01-21 21:08:54 -08:00
masked-memory-ops.ll [NewPM][opt] Run the "default" AA pipeline by default 2021-01-21 21:08:54 -08:00
nancvt.ll
…
peel-before-lv-to-enable-vectorization.ll [PhaseOrdering] Update tests after 23c2f2e6b2. 2021-06-07 10:59:30 +01:00
pixel-splat.ll [PhaseOrdering] Update tests after 23c2f2e6b2. 2021-06-07 10:59:30 +01:00
pr48844-br-to-switch-vectorization.ll [PhaseOrdering] Add tests for PR44461 and PR48844 (NFC) 2021-01-23 21:24:54 +01:00
pr50555.ll [AggressiveInstCombine] Add logical shift right instr to `TruncInstCombine` DAG 2021-08-18 22:20:58 +03:00
scalarization-inseltpoison.ll [IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder 2020-12-30 04:21:04 +09:00
scalarization.ll Update InstCombine to use undef matcher instead 2021-04-18 11:05:36 +09:00
shuffle-inseltpoison.ll [IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder 2020-12-30 04:21:04 +09:00
shuffle.ll [IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder 2020-12-30 04:21:04 +09:00
simplifycfg-late.ll [SimplifyCFG] SwitchToLookupTable(): don't increase ret count 2021-07-26 23:29:55 +03:00
spurious-peeling.ll [PassManager] Run additional LICM before LoopRotate 2021-04-02 11:11:42 +03:00
vdiv-nounroll.ll [PhaseOrdering] Update tests after 23c2f2e6b2. 2021-06-07 10:59:30 +01:00
vdiv.ll [PhaseOrdering] Update tests after 23c2f2e6b2. 2021-06-07 10:59:30 +01:00
vector-reductions-expanded.ll [InstCombine] fold reassociative FP add into start value of fadd reduction 2021-07-18 06:26:20 -04:00
vector-reductions-logical.ll [InstCombine] canonicalize cmp-of-bitcast-of-vector-cmp to use zero constant 2021-07-31 13:31:12 -04:00
vector-reductions.ll [SimplifyCFG] SimplifyCondBranchToTwoReturns(): really only deal with different ret blocks 2021-07-23 00:36:59 +03:00