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			468 lines
		
	
	
		
			16 KiB
		
	
	
	
		
			C++
		
	
	
	
| //===---- LiveRangeCalc.cpp - Calculate live ranges -----------------------===//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| //
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| // Implementation of the LiveRangeCalc class.
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| //
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| //===----------------------------------------------------------------------===//
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| 
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| #include "LiveRangeCalc.h"
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| #include "llvm/CodeGen/MachineDominators.h"
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| #include "llvm/CodeGen/MachineRegisterInfo.h"
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| 
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| using namespace llvm;
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| 
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| #define DEBUG_TYPE "regalloc"
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| 
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| void LiveRangeCalc::resetLiveOutMap() {
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|   unsigned NumBlocks = MF->getNumBlockIDs();
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|   Seen.clear();
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|   Seen.resize(NumBlocks);
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|   Map.resize(NumBlocks);
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| }
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| 
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| void LiveRangeCalc::reset(const MachineFunction *mf,
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|                           SlotIndexes *SI,
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|                           MachineDominatorTree *MDT,
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|                           VNInfo::Allocator *VNIA) {
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|   MF = mf;
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|   MRI = &MF->getRegInfo();
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|   Indexes = SI;
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|   DomTree = MDT;
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|   Alloc = VNIA;
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|   resetLiveOutMap();
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|   LiveIn.clear();
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| }
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| 
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| 
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| static void createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc,
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|                           LiveRange &LR, const MachineOperand &MO) {
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|     const MachineInstr *MI = MO.getParent();
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|     SlotIndex DefIdx =
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|         Indexes.getInstructionIndex(MI).getRegSlot(MO.isEarlyClobber());
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| 
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|     // Create the def in LR. This may find an existing def.
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|     LR.createDeadDef(DefIdx, Alloc);
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| }
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| 
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| void LiveRangeCalc::calculate(LiveInterval &LI, bool TrackSubRegs) {
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|   assert(MRI && Indexes && "call reset() first");
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| 
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|   // Step 1: Create minimal live segments for every definition of Reg.
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|   // Visit all def operands. If the same instruction has multiple defs of Reg,
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|   // createDeadDef() will deduplicate.
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|   const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
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|   unsigned Reg = LI.reg;
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|   for (const MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
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|     if (!MO.isDef() && !MO.readsReg())
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|       continue;
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| 
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|     unsigned SubReg = MO.getSubReg();
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|     if (LI.hasSubRanges() || (SubReg != 0 && TrackSubRegs)) {
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|       unsigned Mask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg)
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|                                   : MRI->getMaxLaneMaskForVReg(Reg);
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| 
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|       // If this is the first time we see a subregister def, initialize
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|       // subranges by creating a copy of the main range.
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|       if (!LI.hasSubRanges() && !LI.empty()) {
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|         unsigned ClassMask = MRI->getMaxLaneMaskForVReg(Reg);
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|         LI.createSubRangeFrom(*Alloc, ClassMask, LI);
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|       }
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| 
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|       for (LiveInterval::SubRange &S : LI.subranges()) {
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|         // A Mask for subregs common to the existing subrange and current def.
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|         unsigned Common = S.LaneMask & Mask;
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|         if (Common == 0)
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|           continue;
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|         // A Mask for subregs covered by the subrange but not the current def.
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|         unsigned LRest = S.LaneMask & ~Mask;
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|         LiveInterval::SubRange *CommonRange;
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|         if (LRest != 0) {
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|           // Split current subrange into Common and LRest ranges.
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|           S.LaneMask = LRest;
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|           CommonRange = LI.createSubRangeFrom(*Alloc, Common, S);
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|         } else {
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|           assert(Common == S.LaneMask);
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|           CommonRange = &S;
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|         }
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|         if (MO.isDef())
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|           createDeadDef(*Indexes, *Alloc, *CommonRange, MO);
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|         Mask &= ~Common;
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|       }
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|       // Create a new SubRange for subregs we did not cover yet.
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|       if (Mask != 0) {
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|         LiveInterval::SubRange *NewRange = LI.createSubRange(*Alloc, Mask);
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|         if (MO.isDef())
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|           createDeadDef(*Indexes, *Alloc, *NewRange, MO);
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|       }
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|     }
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| 
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|     // Create the def in the main liverange. We do not have to do this if
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|     // subranges are tracked as we recreate the main range later in this case.
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|     if (MO.isDef() && !LI.hasSubRanges())
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|       createDeadDef(*Indexes, *Alloc, LI, MO);
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|   }
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| 
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|   // We may have created empty live ranges for partially undefined uses, we
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|   // can't keep them because we won't find defs in them later.
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|   LI.removeEmptySubRanges();
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| 
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|   // Step 2: Extend live segments to all uses, constructing SSA form as
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|   // necessary.
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|   if (LI.hasSubRanges()) {
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|     for (LiveInterval::SubRange &S : LI.subranges()) {
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|       resetLiveOutMap();
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|       extendToUses(S, Reg, S.LaneMask);
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|     }
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|     LI.clear();
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|     LI.constructMainRangeFromSubranges(*Indexes, *Alloc);
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|   } else {
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|     resetLiveOutMap();
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|     extendToUses(LI, Reg, ~0u);
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|   }
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| }
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| 
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| 
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| void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) {
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|   assert(MRI && Indexes && "call reset() first");
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| 
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|   // Visit all def operands. If the same instruction has multiple defs of Reg,
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|   // LR.createDeadDef() will deduplicate.
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|   for (MachineOperand &MO : MRI->def_operands(Reg))
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|     createDeadDef(*Indexes, *Alloc, LR, MO);
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| }
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| 
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| 
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| void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, unsigned Mask) {
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|   // Visit all operands that read Reg. This may include partial defs.
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|   const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
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|   for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
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|     // Clear all kill flags. They will be reinserted after register allocation
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|     // by LiveIntervalAnalysis::addKillFlags().
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|     if (MO.isUse())
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|       MO.setIsKill(false);
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|     else {
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|       // We only care about uses, but on the main range (mask ~0u) this includes
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|       // the "virtual" reads happening for subregister defs.
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|       if (Mask != ~0u)
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|         continue;
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|     }
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| 
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|     if (!MO.readsReg())
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|       continue;
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|     unsigned SubReg = MO.getSubReg();
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|     if (SubReg != 0) {
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|       unsigned SubRegMask = TRI.getSubRegIndexLaneMask(SubReg);
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|       // Ignore uses not covering the current subrange.
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|       if ((SubRegMask & Mask) == 0)
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|         continue;
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|     }
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| 
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|     // Determine the actual place of the use.
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|     const MachineInstr *MI = MO.getParent();
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|     unsigned OpNo = (&MO - &MI->getOperand(0));
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|     SlotIndex UseIdx;
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|     if (MI->isPHI()) {
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|       assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
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|       // The actual place where a phi operand is used is the end of the pred
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|       // MBB. PHI operands are paired: (Reg, PredMBB).
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|       UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
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|     } else {
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|       // Check for early-clobber redefs.
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|       bool isEarlyClobber = false;
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|       unsigned DefIdx;
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|       if (MO.isDef())
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|         isEarlyClobber = MO.isEarlyClobber();
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|       else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
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|         // FIXME: This would be a lot easier if tied early-clobber uses also
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|         // had an early-clobber flag.
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|         isEarlyClobber = MI->getOperand(DefIdx).isEarlyClobber();
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|       }
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|       UseIdx = Indexes->getInstructionIndex(MI).getRegSlot(isEarlyClobber);
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|     }
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| 
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|     // MI is reading Reg. We may have visited MI before if it happens to be
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|     // reading Reg multiple times. That is OK, extend() is idempotent.
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|     extend(LR, UseIdx, Reg);
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|   }
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| }
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| 
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| 
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| void LiveRangeCalc::updateFromLiveIns() {
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|   LiveRangeUpdater Updater;
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|   for (const LiveInBlock &I : LiveIn) {
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|     if (!I.DomNode)
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|       continue;
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|     MachineBasicBlock *MBB = I.DomNode->getBlock();
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|     assert(I.Value && "No live-in value found");
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|     SlotIndex Start, End;
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|     std::tie(Start, End) = Indexes->getMBBRange(MBB);
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| 
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|     if (I.Kill.isValid())
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|       // Value is killed inside this block.
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|       End = I.Kill;
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|     else {
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|       // The value is live-through, update LiveOut as well.
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|       // Defer the Domtree lookup until it is needed.
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|       assert(Seen.test(MBB->getNumber()));
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|       Map[MBB] = LiveOutPair(I.Value, nullptr);
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|     }
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|     Updater.setDest(&I.LR);
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|     Updater.add(Start, End, I.Value);
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|   }
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|   LiveIn.clear();
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| }
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| 
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| 
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| void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg) {
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|   assert(Use.isValid() && "Invalid SlotIndex");
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|   assert(Indexes && "Missing SlotIndexes");
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|   assert(DomTree && "Missing dominator tree");
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| 
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|   MachineBasicBlock *UseMBB = Indexes->getMBBFromIndex(Use.getPrevSlot());
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|   assert(UseMBB && "No MBB at Use");
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| 
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|   // Is there a def in the same MBB we can extend?
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|   if (LR.extendInBlock(Indexes->getMBBStartIdx(UseMBB), Use))
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|     return;
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| 
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|   // Find the single reaching def, or determine if Use is jointly dominated by
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|   // multiple values, and we may need to create even more phi-defs to preserve
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|   // VNInfo SSA form.  Perform a search for all predecessor blocks where we
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|   // know the dominating VNInfo.
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|   if (findReachingDefs(LR, *UseMBB, Use, PhysReg))
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|     return;
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| 
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|   // When there were multiple different values, we may need new PHIs.
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|   calculateValues();
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| }
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| 
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| 
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| // This function is called by a client after using the low-level API to add
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| // live-out and live-in blocks.  The unique value optimization is not
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| // available, SplitEditor::transferValues handles that case directly anyway.
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| void LiveRangeCalc::calculateValues() {
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|   assert(Indexes && "Missing SlotIndexes");
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|   assert(DomTree && "Missing dominator tree");
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|   updateSSA();
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|   updateFromLiveIns();
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| }
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| 
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| 
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| bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB,
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|                                      SlotIndex Use, unsigned PhysReg) {
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|   unsigned UseMBBNum = UseMBB.getNumber();
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| 
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|   // Block numbers where LR should be live-in.
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|   SmallVector<unsigned, 16> WorkList(1, UseMBBNum);
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| 
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|   // Remember if we have seen more than one value.
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|   bool UniqueVNI = true;
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|   VNInfo *TheVNI = nullptr;
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| 
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|   // Using Seen as a visited set, perform a BFS for all reaching defs.
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|   for (unsigned i = 0; i != WorkList.size(); ++i) {
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|     MachineBasicBlock *MBB = MF->getBlockNumbered(WorkList[i]);
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| 
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| #ifndef NDEBUG
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|     if (MBB->pred_empty()) {
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|       MBB->getParent()->verify();
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|       errs() << "Use of " << PrintReg(PhysReg)
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|              << " does not have a corresponding definition on every path:\n";
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|       const MachineInstr *MI = Indexes->getInstructionFromIndex(Use);
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|       if (MI != nullptr)
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|         errs() << Use << " " << *MI;
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|       llvm_unreachable("Use not jointly dominated by defs.");
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|     }
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| 
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|     if (TargetRegisterInfo::isPhysicalRegister(PhysReg) &&
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|         !MBB->isLiveIn(PhysReg)) {
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|       MBB->getParent()->verify();
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|       errs() << "The register " << PrintReg(PhysReg)
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|              << " needs to be live in to BB#" << MBB->getNumber()
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|              << ", but is missing from the live-in list.\n";
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|       llvm_unreachable("Invalid global physical register");
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|     }
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| #endif
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| 
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|     for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
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|          PE = MBB->pred_end(); PI != PE; ++PI) {
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|        MachineBasicBlock *Pred = *PI;
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| 
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|        // Is this a known live-out block?
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|        if (Seen.test(Pred->getNumber())) {
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|          if (VNInfo *VNI = Map[Pred].first) {
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|            if (TheVNI && TheVNI != VNI)
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|              UniqueVNI = false;
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|            TheVNI = VNI;
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|          }
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|          continue;
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|        }
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| 
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|        SlotIndex Start, End;
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|        std::tie(Start, End) = Indexes->getMBBRange(Pred);
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| 
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|        // First time we see Pred.  Try to determine the live-out value, but set
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|        // it as null if Pred is live-through with an unknown value.
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|        VNInfo *VNI = LR.extendInBlock(Start, End);
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|        setLiveOutValue(Pred, VNI);
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|        if (VNI) {
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|          if (TheVNI && TheVNI != VNI)
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|            UniqueVNI = false;
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|          TheVNI = VNI;
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|          continue;
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|        }
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| 
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|        // No, we need a live-in value for Pred as well
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|        if (Pred != &UseMBB)
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|           WorkList.push_back(Pred->getNumber());
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|        else
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|           // Loopback to UseMBB, so value is really live through.
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|          Use = SlotIndex();
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|     }
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|   }
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| 
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|   LiveIn.clear();
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| 
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|   // Both updateSSA() and LiveRangeUpdater benefit from ordered blocks, but
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|   // neither require it. Skip the sorting overhead for small updates.
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|   if (WorkList.size() > 4)
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|     array_pod_sort(WorkList.begin(), WorkList.end());
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| 
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|   // If a unique reaching def was found, blit in the live ranges immediately.
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|   if (UniqueVNI) {
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|     LiveRangeUpdater Updater(&LR);
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|     for (SmallVectorImpl<unsigned>::const_iterator I = WorkList.begin(),
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|          E = WorkList.end(); I != E; ++I) {
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|        SlotIndex Start, End;
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|        std::tie(Start, End) = Indexes->getMBBRange(*I);
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|        // Trim the live range in UseMBB.
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|        if (*I == UseMBBNum && Use.isValid())
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|          End = Use;
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|        else
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|          Map[MF->getBlockNumbered(*I)] = LiveOutPair(TheVNI, nullptr);
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|        Updater.add(Start, End, TheVNI);
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|     }
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|     return true;
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|   }
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| 
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|   // Multiple values were found, so transfer the work list to the LiveIn array
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|   // where UpdateSSA will use it as a work list.
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|   LiveIn.reserve(WorkList.size());
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|   for (SmallVectorImpl<unsigned>::const_iterator
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|        I = WorkList.begin(), E = WorkList.end(); I != E; ++I) {
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|     MachineBasicBlock *MBB = MF->getBlockNumbered(*I);
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|     addLiveInBlock(LR, DomTree->getNode(MBB));
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|     if (MBB == &UseMBB)
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|       LiveIn.back().Kill = Use;
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|   }
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| 
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|   return false;
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| }
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| 
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| 
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| // This is essentially the same iterative algorithm that SSAUpdater uses,
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| // except we already have a dominator tree, so we don't have to recompute it.
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| void LiveRangeCalc::updateSSA() {
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|   assert(Indexes && "Missing SlotIndexes");
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|   assert(DomTree && "Missing dominator tree");
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| 
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|   // Interate until convergence.
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|   unsigned Changes;
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|   do {
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|     Changes = 0;
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|     // Propagate live-out values down the dominator tree, inserting phi-defs
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|     // when necessary.
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|     for (LiveInBlock &I : LiveIn) {
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|       MachineDomTreeNode *Node = I.DomNode;
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|       // Skip block if the live-in value has already been determined.
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|       if (!Node)
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|         continue;
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|       MachineBasicBlock *MBB = Node->getBlock();
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|       MachineDomTreeNode *IDom = Node->getIDom();
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|       LiveOutPair IDomValue;
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| 
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|       // We need a live-in value to a block with no immediate dominator?
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|       // This is probably an unreachable block that has survived somehow.
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|       bool needPHI = !IDom || !Seen.test(IDom->getBlock()->getNumber());
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| 
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|       // IDom dominates all of our predecessors, but it may not be their
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|       // immediate dominator. Check if any of them have live-out values that are
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|       // properly dominated by IDom. If so, we need a phi-def here.
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|       if (!needPHI) {
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|         IDomValue = Map[IDom->getBlock()];
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| 
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|         // Cache the DomTree node that defined the value.
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|         if (IDomValue.first && !IDomValue.second)
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|           Map[IDom->getBlock()].second = IDomValue.second =
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|             DomTree->getNode(Indexes->getMBBFromIndex(IDomValue.first->def));
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| 
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|         for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
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|                PE = MBB->pred_end(); PI != PE; ++PI) {
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|           LiveOutPair &Value = Map[*PI];
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|           if (!Value.first || Value.first == IDomValue.first)
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|             continue;
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| 
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|           // Cache the DomTree node that defined the value.
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|           if (!Value.second)
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|             Value.second =
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|               DomTree->getNode(Indexes->getMBBFromIndex(Value.first->def));
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| 
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|           // This predecessor is carrying something other than IDomValue.
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|           // It could be because IDomValue hasn't propagated yet, or it could be
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|           // because MBB is in the dominance frontier of that value.
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|           if (DomTree->dominates(IDom, Value.second)) {
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|             needPHI = true;
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|             break;
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|           }
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|         }
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|       }
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| 
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|       // The value may be live-through even if Kill is set, as can happen when
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|       // we are called from extendRange. In that case LiveOutSeen is true, and
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|       // LiveOut indicates a foreign or missing value.
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|       LiveOutPair &LOP = Map[MBB];
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| 
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|       // Create a phi-def if required.
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|       if (needPHI) {
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|         ++Changes;
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|         assert(Alloc && "Need VNInfo allocator to create PHI-defs");
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|         SlotIndex Start, End;
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|         std::tie(Start, End) = Indexes->getMBBRange(MBB);
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|         LiveRange &LR = I.LR;
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|         VNInfo *VNI = LR.getNextValue(Start, *Alloc);
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|         I.Value = VNI;
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|         // This block is done, we know the final value.
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|         I.DomNode = nullptr;
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| 
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|         // Add liveness since updateFromLiveIns now skips this node.
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|         if (I.Kill.isValid())
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|           LR.addSegment(LiveInterval::Segment(Start, I.Kill, VNI));
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|         else {
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|           LR.addSegment(LiveInterval::Segment(Start, End, VNI));
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|           LOP = LiveOutPair(VNI, Node);
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|         }
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|       } else if (IDomValue.first) {
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|         // No phi-def here. Remember incoming value.
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|         I.Value = IDomValue.first;
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| 
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|         // If the IDomValue is killed in the block, don't propagate through.
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|         if (I.Kill.isValid())
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|           continue;
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| 
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|         // Propagate IDomValue if it isn't killed:
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|         // MBB is live-out and doesn't define its own value.
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|         if (LOP.first == IDomValue.first)
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|           continue;
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|         ++Changes;
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|         LOP = IDomValue;
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|       }
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|     }
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|   } while (Changes);
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| }
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