forked from OSchip/llvm-project
70 lines
1.8 KiB
ArmAsm
70 lines
1.8 KiB
ArmAsm
// This file is dual licensed under the MIT and the University of Illinois Open
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// Source Licenses. See LICENSE.TXT for details.
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#include "../assembly.h"
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// di_int __ashrdi3(di_int input, int count);
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#ifdef __i386__
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#ifdef __SSE2__
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.text
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.balign 4
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DEFINE_COMPILERRT_FUNCTION(__ashrdi3)
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movd 12(%esp), %xmm2 // Load count
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movl 8(%esp), %eax
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#ifndef TRUST_CALLERS_USE_64_BIT_STORES
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movd 4(%esp), %xmm0
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movd 8(%esp), %xmm1
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punpckldq %xmm1, %xmm0 // Load input
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#else
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movq 4(%esp), %xmm0 // Load input
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#endif
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psrlq %xmm2, %xmm0 // unsigned shift input by count
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testl %eax, %eax // check the sign-bit of the input
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jns 1f // early out for positive inputs
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// If the input is negative, we need to construct the shifted sign bit
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// to or into the result, as xmm does not have a signed right shift.
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pcmpeqb %xmm1, %xmm1 // -1ULL
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psrlq $58, %xmm1 // 0x3f
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pandn %xmm1, %xmm2 // 63 - count
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pcmpeqb %xmm1, %xmm1 // -1ULL
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psubq %xmm1, %xmm2 // 64 - count
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psllq %xmm2, %xmm1 // -1 << (64 - count) = leading sign bits
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por %xmm1, %xmm0
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// Move the result back to the general purpose registers and return
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1: movd %xmm0, %eax
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psrlq $32, %xmm0
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movd %xmm0, %edx
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ret
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END_COMPILERRT_FUNCTION(__ashrdi3)
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#else // Use GPRs instead of SSE2 instructions, if they aren't available.
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.text
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.balign 4
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DEFINE_COMPILERRT_FUNCTION(__ashrdi3)
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movl 12(%esp), %ecx // Load count
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movl 8(%esp), %edx // Load high
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movl 4(%esp), %eax // Load low
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testl $0x20, %ecx // If count >= 32
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jnz 1f // goto 1
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shrdl %cl, %edx, %eax // right shift low by count
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sarl %cl, %edx // right shift high by count
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ret
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1: movl %edx, %eax // Move high to low
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sarl $31, %edx // clear high
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sarl %cl, %eax // shift low by count - 32
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ret
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END_COMPILERRT_FUNCTION(__ashrdi3)
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#endif // __SSE2__
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#endif // __i386__
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