llvm-project/llvm/test/MC/Disassembler/AMDGPU
Valery Pykhtin c761675ef4 [AMDGPU] fix failure on printing of non-existing instruction operands.
Differential revision: https://reviews.llvm.org/D23323

llvm-svn: 278665
2016-08-15 10:56:48 +00:00
..
dpp_vi.txt [AMDGPU] Disassembler: support for DPP 2016-03-31 14:15:04 +00:00
ds_vi.txt [AMDGPU] refactor DS instruction definitions. NFC. 2016-08-01 14:21:30 +00:00
flat_vi.txt [AMDGPU] add VI disassembler tests. NFC. 2016-03-17 17:56:33 +00:00
lit.local.cfg
missing_op.txt [AMDGPU] fix failure on printing of non-existing instruction operands. 2016-08-15 10:56:48 +00:00
mov.txt
mubuf_vi.txt [AMDGPU][llvm-mc] Fixes to support buffer atomics. 2016-05-19 12:22:39 +00:00
nop.txt
sdwa_vi.txt [AMDGPU] Disassembler: Support for sdwa instructions 2016-06-09 11:04:45 +00:00
smem_vi.txt [AMDGPU] add VI disassembler tests. NFC. 2016-03-17 17:56:33 +00:00
smrd_vi.txt [AMDGPU] add VI disassembler tests. NFC. 2016-03-17 17:56:33 +00:00
sop1_vi.txt [AMDGPU] add VI disassembler tests. NFC. 2016-03-17 17:56:33 +00:00
sop2_vi.txt [AMDGPU] add VI disassembler tests. NFC. 2016-03-17 17:56:33 +00:00
sopc_vi.txt [AMDGPU] add VI disassembler tests. NFC. 2016-03-17 17:56:33 +00:00
sopk_vi.txt [AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware registers. 2016-04-27 15:17:03 +00:00
sopp_vi.txt [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax. 2016-05-06 17:48:48 +00:00
trap_vi.txt [AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers. 2016-05-24 12:05:16 +00:00
vop1.txt
vop1_vi.txt [AMDGPU] Add some VI disassembler tests missing from previous autogeneration due to different filecheck prefix. NFC. 2016-04-08 05:42:20 +00:00
vop2_vi.txt [AMDGPU][llvm-mc] v_cndmask_b32: src2 is mandatory; do not enforce VOP2 when src2 == VCC. 2016-06-06 15:23:43 +00:00
vop3_vi.txt [AMDGPU][llvm-mc] v_cndmask_b32: src2 is mandatory; do not enforce VOP2 when src2 == VCC. 2016-06-06 15:23:43 +00:00
vopc_vi.txt [AMDGPU] add VI disassembler tests. NFC. 2016-03-17 17:56:33 +00:00