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Merge f984701d53 into d76716239c

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Linar Yusupov 2025-05-08 00:29:11 +00:00 committed by GitHub
parent d76716239c f984701d53
commit 7e7356eeef
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GPG Key ID: B5690EEEBB952194
3 changed files with 32 additions and 6 deletions
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4
variants/CH32V30x/CH32V307VCT6/PeripheralPins.c
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@ -135,6 +135,7 @@ WEAK const PinMap PinMap_UART_CTS[] = {
WEAK const PinMap PinMap_SPI_MOSI[] = { WEAK const PinMap PinMap_SPI_MOSI[] = {
{PA_7, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, {PA_7, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
{PB_15, SPI2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, {PB_15, SPI2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
{PB_5, SPI3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
{NC, NP, 0} {NC, NP, 0}
}; };
#endif #endif
@ -143,6 +144,7 @@ WEAK const PinMap PinMap_SPI_MOSI[] = {
WEAK const PinMap PinMap_SPI_MISO[] = { WEAK const PinMap PinMap_SPI_MISO[] = {
{PA_6, SPI1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_FLOAT, 0, AFIO_NONE)}, {PA_6, SPI1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_FLOAT, 0, AFIO_NONE)},
{PB_14, SPI2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_FLOAT, 0, AFIO_NONE)}, {PB_14, SPI2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_FLOAT, 0, AFIO_NONE)},
{PB_4, SPI3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_FLOAT, 0, AFIO_NONE)},
{NC, NP, 0} {NC, NP, 0}
}; };
#endif #endif
@ -151,6 +153,7 @@ WEAK const PinMap PinMap_SPI_MISO[] = {
WEAK const PinMap PinMap_SPI_SCLK[] = { WEAK const PinMap PinMap_SPI_SCLK[] = {
{PA_5, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, {PA_5, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
{PB_13, SPI2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, {PB_13, SPI2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
{PB_3, SPI3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
{NC, NP, 0} {NC, NP, 0}
}; };
#endif #endif
@ -159,6 +162,7 @@ WEAK const PinMap PinMap_SPI_SCLK[] = {
WEAK const PinMap PinMap_SPI_SSEL[] = { WEAK const PinMap PinMap_SPI_SSEL[] = {
{PA_4, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, {PA_4, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
{PB_12, SPI2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, {PB_12, SPI2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
{PA_15, SPI3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
{NC, NP, 0} {NC, NP, 0}
}; };
#endif #endif

19
variants/CH32V30x/CH32V307VCT6/variant_CH32V307VCT6.cpp
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@ -30,9 +30,9 @@ const PinName digitalPin[] = {
PA_8, //D8 PA_8, //D8
PA_7, //D9 SPI_MOSI TIM8_CH1N TIM3_CH2 PA_7, //D9 SPI_MOSI TIM8_CH1N TIM3_CH2
PA_6, //D10 SPI1_MISO PA_6, //D10 SPI1_MISO
PB_5, //D11 TIM3_CH2_2 TIM10_CH3_1 PB_5, //D11 TIM3_CH2_2 TIM10_CH3_1 SPI3_MOSI
PB_8, //D12 TIM4_CH3 TIM10_CH1 TIM8_CH3_1 PB_8, //D12 TIM4_CH3 TIM10_CH1 TIM8_CH3_1 SDIO_D4
PB_9, //D13 PB_9, //D13 SDIO_D5
PB_1, //D14 TIM3_CH4 TIM8_CH3N TIM1_CH3N_1 TIM3_CH4_2 TIM9_CH2N_1 PB_1, //D14 TIM3_CH4 TIM8_CH3N TIM1_CH3N_1 TIM3_CH4_2 TIM9_CH2N_1
PB_0, //D15 TIM3_CH3 TIM8_CH2N TIM1_CH2N_1 TIM3_CH3_2 TIM9_CH1N_1 PB_0, //D15 TIM3_CH3 TIM8_CH2N TIM1_CH2N_1 TIM3_CH3_2 TIM9_CH1N_1
PB_12, //D16 SPI2_NSS PB_12, //D16 SPI2_NSS
@ -40,7 +40,18 @@ const PinName digitalPin[] = {
PB_14, //D18 SPI2_MISO PB_14, //D18 SPI2_MISO
PB_13, //D19 SPI2_SCK PB_13, //D19 SPI2_SCK
PB_11, //D20 I2C2_SDA PB_11, //D20 I2C2_SDA
PB_10 //D21 I2C2_SCL PB_10, //D21 I2C2_SCL
PA_15, //D22 SPI3_NSS
PB_4, //D23 SPI3_MISO
PB_3, //D24 SPI3_SCK
PC_8, //D25 SDIO_D0
PC_9, //D26 SDIO_D1
PC_10, //D27 SDIO_D2
PC_11, //D28 SDIO_D3
PC_6, //D29 SDIO_D6
PC_7, //D30 SDIO_D7
PC_12, //D31 SDIO_CK
PD_2 //D32 SDIO_CMD
}; };
// Analog (Ax) pin number array // Analog (Ax) pin number array

13
variants/CH32V30x/CH32V307VCT6/variant_CH32V307VCT6.h
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@ -44,6 +44,17 @@
#define PB13 19 #define PB13 19
#define PB11 20 #define PB11 20
#define PB10 21 #define PB10 21
#define PA15 22
#define PB4 23
#define PB3 24
#define PC8 25
#define PC9 26
#define PC10 27
#define PC11 28
#define PC6 29
#define PC7 30
#define PC12 31
#define PD2 32
// Alternate pins number // Alternate pins number
@ -60,7 +71,7 @@
#define NUM_DIGITAL_PINS 22 #define NUM_DIGITAL_PINS 33
#define NUM_ANALOG_INPUTS 6 #define NUM_ANALOG_INPUTS 6
// #define ADC_CTLR_ADCAL // #define ADC_CTLR_ADCAL
#define ADC_RESOLUTION 12 #define ADC_RESOLUTION 12