diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..600d2d3
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1 @@
+.vscode
\ No newline at end of file
diff --git a/boards.txt b/boards.txt
index 3840e47..ebab5db 100644
--- a/boards.txt
+++ b/boards.txt
@@ -285,7 +285,7 @@ CH32V20x_EVT.menu.pnum.CH32V203G8=CH32V203G8 EVT
 CH32V20x_EVT.menu.pnum.CH32V203G8.node=NODE_V203G8
 CH32V20x_EVT.menu.pnum.CH32V203G8.upload.maximum_size=65536
 CH32V20x_EVT.menu.pnum.CH32V203G8.upload.maximum_data_size=20480
-CH32V20x_EVT.menu.pnum.CH32V203G8.build.mcu=QingKe-V4C
+CH32V20x_EVT.menu.pnum.CH32V203G8.build.mcu=QingKe-V4B
 CH32V20x_EVT.menu.pnum.CH32V203G8.build.board=CH32V203G8
 CH32V20x_EVT.menu.pnum.CH32V203G8.build.series=CH32V20x
 CH32V20x_EVT.menu.pnum.CH32V203G8.build.variant=CH32V20x/CH32V203G8
@@ -297,6 +297,42 @@ CH32V20x_EVT.menu.pnum.CH32V203G8.build.IQ_math_RV32=
 CH32V20x_EVT.menu.pnum.CH32V203G8.build.ch_extra_lib=-lprintf
 
 
+
+#Generic CH32V203C8 Board
+CH32V20x_EVT.menu.pnum.CH32V203C8=CH32V203C8
+CH32V20x_EVT.menu.pnum.CH32V203C8.node=NODE_V203C8
+CH32V20x_EVT.menu.pnum.CH32V203C8.upload.maximum_size=65536
+CH32V20x_EVT.menu.pnum.CH32V203C8.upload.maximum_data_size=20480
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.mcu=QingKe-V4B
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.board=CH32V203C8
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.series=CH32V20x
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.variant=CH32V20x/CH32V203C8
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.chip=CH32V203
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.march=rv32imacxw
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.mabi=ilp32
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.math_lib_gcc=-lm 
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.IQ_math_RV32=
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.ch_extra_lib=-lprintf
+
+
+#Generic CH32V203C6 Board
+CH32V20x_EVT.menu.pnum.CH32V203C6=CH32V203C6
+CH32V20x_EVT.menu.pnum.CH32V203C6.node=NODE_V203C6
+CH32V20x_EVT.menu.pnum.CH32V203C6.upload.maximum_size=32768
+CH32V20x_EVT.menu.pnum.CH32V203C6.upload.maximum_data_size=20480
+CH32V20x_EVT.menu.pnum.CH32V203C6.build.mcu=QingKe-V4B
+CH32V20x_EVT.menu.pnum.CH32V203C6.build.board=CH32V203C6
+CH32V20x_EVT.menu.pnum.CH32V203C6.build.series=CH32V20x
+CH32V20x_EVT.menu.pnum.CH32V203C6.build.variant=CH32V20x/CH32V203C6
+CH32V20x_EVT.menu.pnum.CH32V203C6.build.chip=CH32V203
+CH32V20x_EVT.menu.pnum.CH32V203C6.build.march=rv32imacxw
+CH32V20x_EVT.menu.pnum.CH32V203C6.build.mabi=ilp32
+CH32V20x_EVT.menu.pnum.CH32V203C6.build.math_lib_gcc=-lm 
+CH32V20x_EVT.menu.pnum.CH32V203C6.build.IQ_math_RV32=
+CH32V20x_EVT.menu.pnum.CH32V203C6.build.ch_extra_lib=-lprintf
+
+
+
 # Upload menu
 CH32V20x_EVT.menu.upload_method.swdMethod=WCH-SWD
 CH32V20x_EVT.menu.upload_method.swdMethod.upload.protocol=
diff --git a/cores/arduino/ch32/backup.h b/cores/arduino/ch32/backup.h
index 8eb6c3f..f25277d 100644
--- a/cores/arduino/ch32/backup.h
+++ b/cores/arduino/ch32/backup.h
@@ -40,8 +40,10 @@ static inline void resetBackupDomain(void)
 #ifdef PWR_MODULE_ENABLED
   PWR_BackupAccessCmd(ENABLE);
 #endif
+#ifndef CH32V00x
   RCC_BackupResetCmd(ENABLE);
   RCC_BackupResetCmd(DISABLE);
+#endif
 }
 
 static inline void enableBackupDomain(void)
diff --git a/cores/arduino/ch32/clock.h b/cores/arduino/ch32/clock.h
index a1f6e99..7409089 100644
--- a/cores/arduino/ch32/clock.h
+++ b/cores/arduino/ch32/clock.h
@@ -26,6 +26,7 @@ extern "C" {
 /* Exported constants --------------------------------------------------------*/
 /* Exported macro ------------------------------------------------------------*/
 /* Exported functions ------------------------------------------------------- */
+WEAK uint64_t GetTick(void);
 uint32_t getCurrentMillis(void);
 uint32_t getCurrentMicros(void);
 
diff --git a/cores/arduino/ch32/lib/ch32yyxx_can.c b/cores/arduino/ch32/lib/ch32yyxx_can.c
index 320ac14..4b69d94 100644
--- a/cores/arduino/ch32/lib/ch32yyxx_can.c
+++ b/cores/arduino/ch32/lib/ch32yyxx_can.c
@@ -2,6 +2,6 @@
 #include "ch32v20x_can.c"
 #endif
 
-#ifdef defined(CH32V30x) || defined(CH32V30x_C)
+#if defined(CH32V30x) || defined(CH32V30x_C)
 #include "ch32v30x_can.c"
 #endif
\ No newline at end of file
diff --git a/cores/arduino/ch32/lib/ch32yyxx_can.h b/cores/arduino/ch32/lib/ch32yyxx_can.h
index 271de97..4fa5143 100644
--- a/cores/arduino/ch32/lib/ch32yyxx_can.h
+++ b/cores/arduino/ch32/lib/ch32yyxx_can.h
@@ -5,7 +5,7 @@
 #include "ch32v20x_can.h"
 #endif
 
-#ifdef defined(CH32V30x) || defined(CH32V30x_C)
+#if defined(CH32V30x) || defined(CH32V30x_C)
 #include "ch32v30x_can.h"
 #endif
 
diff --git a/cores/arduino/ch32/lib/ch32yyxx_crc.c b/cores/arduino/ch32/lib/ch32yyxx_crc.c
index eb32fbb..2fe2c6a 100644
--- a/cores/arduino/ch32/lib/ch32yyxx_crc.c
+++ b/cores/arduino/ch32/lib/ch32yyxx_crc.c
@@ -6,6 +6,6 @@
 #include "ch32v20x_crc.c"
 #endif
 
-#ifdef defined(CH32V30x) || defined(CH32V30x_C)
+#if defined(CH32V30x) || defined(CH32V30x_C)
 #include "ch32v30x_crc.c"
 #endif
\ No newline at end of file
diff --git a/cores/arduino/ch32/lib/ch32yyxx_crc.h b/cores/arduino/ch32/lib/ch32yyxx_crc.h
index a4a5a0b..70041d1 100644
--- a/cores/arduino/ch32/lib/ch32yyxx_crc.h
+++ b/cores/arduino/ch32/lib/ch32yyxx_crc.h
@@ -9,7 +9,7 @@
 #include "ch32v20x_crc.h"
 #endif
 
-#ifdef defined(CH32V30x) || defined(CH32V30x_C)
+#if defined(CH32V30x) || defined(CH32V30x_C)
 #include "ch32v30x_crc.h"
 #endif
 
diff --git a/cores/arduino/ch32/lib/ch32yyxx_it.h b/cores/arduino/ch32/lib/ch32yyxx_it.h
index 1bfb31c..169c3f7 100644
--- a/cores/arduino/ch32/lib/ch32yyxx_it.h
+++ b/cores/arduino/ch32/lib/ch32yyxx_it.h
@@ -17,7 +17,7 @@
 #include "ch32v20x_it.h"
 #endif
 
-#ifdef defined (CH32V30x) || defined(CH32V30x_C)
+#if defined (CH32V30x) || defined(CH32V30x_C)
 #include "ch32v30x_it.h"
 #endif
 
diff --git a/cores/arduino/ch32/lib/ch32yyxx_opa.c b/cores/arduino/ch32/lib/ch32yyxx_opa.c
index 3dff6be..65a1c28 100644
--- a/cores/arduino/ch32/lib/ch32yyxx_opa.c
+++ b/cores/arduino/ch32/lib/ch32yyxx_opa.c
@@ -11,6 +11,6 @@
 #include "ch32v20x_opa.c"
 #endif
 
-#ifdef defined(CH32V30x) || defined(CH32V30x_C)
+#if defined(CH32V30x) || defined(CH32V30x_C)
 #include "ch32v30x_opa.c"
 #endif
diff --git a/cores/arduino/ch32/lib/ch32yyxx_opa.h b/cores/arduino/ch32/lib/ch32yyxx_opa.h
index ae29801..93c1b24 100644
--- a/cores/arduino/ch32/lib/ch32yyxx_opa.h
+++ b/cores/arduino/ch32/lib/ch32yyxx_opa.h
@@ -14,7 +14,7 @@
 #include "ch32v20x_opa.h"
 #endif
 
-#ifdef defined(CH32V30x) || defined(CH32V30x_C)
+#if defined(CH32V30x) || defined(CH32V30x_C)
 #include "ch32v30x_opa.h"
 #endif
 
diff --git a/cores/arduino/ch32/lib/ch32yyxx_pwr.c b/cores/arduino/ch32/lib/ch32yyxx_pwr.c
index 8afbfa0..c897dfe 100644
--- a/cores/arduino/ch32/lib/ch32yyxx_pwr.c
+++ b/cores/arduino/ch32/lib/ch32yyxx_pwr.c
@@ -14,6 +14,6 @@
 #include "ch32v20x_pwr.c"
 #endif
 
-#ifdef defined(CH32V30x) || defined(CH32V30x_C)
+#if defined(CH32V30x) || defined(CH32V30x_C)
 #include "ch32v30x_pwr.c"
 #endif
\ No newline at end of file
diff --git a/cores/arduino/ch32/lib/ch32yyxx_rcc.h b/cores/arduino/ch32/lib/ch32yyxx_rcc.h
index c8c4099..ddab956 100644
--- a/cores/arduino/ch32/lib/ch32yyxx_rcc.h
+++ b/cores/arduino/ch32/lib/ch32yyxx_rcc.h
@@ -17,7 +17,7 @@
 #include "ch32v20x_rcc.h"
 #endif
 
-#ifdef defined(CH32V30x) || defined(CH32V30x_C)
+#if defined(CH32V30x) || defined(CH32V30x_C)
 #include "ch32v30x_rcc.h"
 #endif
 
diff --git a/cores/arduino/ch32/uart.c b/cores/arduino/ch32/uart.c
index eaf94c6..5116b0a 100644
--- a/cores/arduino/ch32/uart.c
+++ b/cores/arduino/ch32/uart.c
@@ -89,6 +89,8 @@ static serial_t serial_debug =
   .index = UART_NUM,
 };
 
+extern uint64_t GetTick(void);
+
 /* Aim of the function is to get serial_s pointer using huart pointer */
 /* Highly inspired from magical linux kernel's "container_of" */
 serial_t *get_serial_obj(UART_HandleTypeDef *huart)
@@ -263,7 +265,7 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par
 
   if (uart_rx == NP) 
   {
-      USART_HalfDuplexCmd(huart,ENABLE);
+      USART_HalfDuplexCmd(huart->Instance,ENABLE);
   }
 
   USART_Init(huart->Instance, &(huart->init));
diff --git a/package.json b/package.json
index 959a8f9..c4ed031 100644
--- a/package.json
+++ b/package.json
@@ -1,6 +1,7 @@
 {
-    "name": "framework-arduino-ch32v",
-    "description": "Arduino Wiring-based Framework (CH32V Core)",
-    "version": "0.0.0",
-    "url": "https://github.com/openwch/arduino_core_ch32"
-}
\ No newline at end of file
+    "description": "Core library for CH32duino",
+    "name": "framework-arduino-openwch-ch32",
+    "system": "all",
+    "url": "https://github.com/openwch/arduino_core_ch32",
+    "version": "0.0.0"
+}
diff --git a/tools/platformio-build.py b/tools/platformio-build.py
new file mode 100644
index 0000000..af584f5
--- /dev/null
+++ b/tools/platformio-build.py
@@ -0,0 +1,160 @@
+# Copyright 2023-present Maximilian Gerhardt <maximilian.gerhardt@rub.de>
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#    http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""
+Arduino
+
+Arduino Wiring-based Framework allows writing cross-platform software to
+control devices attached to a wide range of Arduino boards to create all
+kinds of creative coding, interactive objects, spaces or physical experiences.
+
+http://arduino.cc/en/Reference/HomePage
+"""
+
+from os.path import isdir, join
+import sys
+
+from SCons.Script import DefaultEnvironment
+
+IS_MAC = sys.platform.startswith("darwin")
+
+env = DefaultEnvironment()
+platform = env.PioPlatform()
+board = env.BoardConfig()
+mcu = env.BoardConfig().get("build.mcu")
+chip_series: str = board.get("build.series", "")[0:-1].upper() + "x"
+variant_h = board.get("build.arduino.openwch.variant_h")
+
+FRAMEWORK_DIR = platform.get_package_dir("framework-arduino-openwch-ch32")
+assert isdir(FRAMEWORK_DIR)
+
+machine_flags = [
+    "-march=%s" % board.get("build.march"),
+    "-mabi=%s" % board.get("build.mabi"),
+    "-msmall-data-limit=8",
+    "-msave-restore",
+]
+
+env.Append(
+    ASFLAGS=machine_flags,
+    ASPPFLAGS=[
+        "-x", "assembler-with-cpp"
+    ],
+
+    CFLAGS=[
+        "-std=gnu99"
+    ],
+
+    CCFLAGS=machine_flags + [
+        "-Os",
+        "-Wall",
+        "-fmessage-length=0",
+        "-fsigned-char",
+        "-ffunction-sections",
+        "-fdata-sections",
+        "-fno-common",
+        #"-flto",
+    ],
+
+    CXXFLAGS=[
+        "-fno-threadsafe-statics",
+        "-fno-rtti",
+        "-fno-exceptions",
+        "-fno-use-cxa-atexit",
+        "-fpermissive",
+        "-std=gnu++14"
+    ],
+
+    LINKFLAGS=machine_flags + [
+        "-Os",
+        "-fmessage-length=0",
+        "-fsigned-char",
+        "-ffunction-sections",
+        "-fdata-sections",
+        "-fno-common",
+        "-Wl,--gc-sections",
+        #"-flto",
+        "--specs=nosys.specs",
+        "--specs=nano.specs",
+        "-nostartfiles",
+        '-Wl,-Map="%s"' % join("${BUILD_DIR}", "${PROGNAME}.map")
+    ],
+
+    CPPDEFINES= [
+        ("ARDUINO", 10808),
+        ("VARIANT_H", env.StringifyMacro(variant_h)),
+        chip_series
+    ],
+
+    # LIBS is handled in _LIBFLAGS below
+
+    LIBSOURCE_DIRS=[
+        join(FRAMEWORK_DIR, "libraries")
+    ],
+
+    CPPPATH=[
+        join(FRAMEWORK_DIR, "cores", "arduino"),
+        join(FRAMEWORK_DIR, "cores", "arduino", "avr"),
+        join(FRAMEWORK_DIR, "cores", "arduino", "ch32"),
+        join(FRAMEWORK_DIR, "cores", "arduino", "ch32", "lib"),
+        join(FRAMEWORK_DIR, "system", chip_series, "USER"),
+        join(FRAMEWORK_DIR, "system", chip_series, "SRC", "Core"),
+        join(FRAMEWORK_DIR, "system", chip_series, "SRC", "Debug"),
+        join(FRAMEWORK_DIR, "system", chip_series, "SRC", "Startup"),
+        join(FRAMEWORK_DIR, "system", chip_series, "SRC", "Peripheral", "inc"),
+        join(FRAMEWORK_DIR, "system", chip_series, "SRC", "Peripheral", "src"),
+    ],
+)
+# Use exact same size regexes as the real core
+env.Replace(
+    SIZEPROGREGEX=r"^(?:\.text|\.data|\.rodata)\s+([0-9]+).*",
+    # excludes stack
+    SIZEDATAREGEXP=r"^(?:\.data|\.bss|\.noinit)\s+(\d+).*",
+)
+
+#
+# Target: Build Core Library
+#
+
+libs = []
+
+if "build.variant" in board:
+    variants_dir = join(
+        "$PROJECT_DIR", board.get("build.variants_dir")) if board.get(
+            "build.variants_dir", "") else join(FRAMEWORK_DIR, "variants")
+
+    variant = board.get("build.arduino.openwch.variant", board.get("build.variant"))
+    env.Append(
+        CPPPATH=[
+            join(variants_dir, variant)
+        ],
+        LDSCRIPT_PATH=join(FRAMEWORK_DIR, "system", chip_series, "SRC", "Ld", "Link.ld"),
+
+    )
+    env.BuildSources(
+        join("$BUILD_DIR", "FrameworkArduinoVariant"),
+        join(variants_dir, variant)
+    )
+
+# Startup files and debug.c require this to be built using BuildSources or with -Wl,-whole-archive
+pre_libs = "-lprintf" if not IS_MAC else ""
+env.Prepend(_LIBFLAGS="%s -Wl,--whole-archive " % pre_libs)
+env.Append(_LIBFLAGS=" -Wl,--no-whole-archive -lc")
+
+libs.append(env.BuildLibrary(
+    join("$BUILD_DIR", "FrameworkArduino"),
+    join(FRAMEWORK_DIR, "cores", "arduino"),
+))
+
+env.Prepend(LIBS=libs)
\ No newline at end of file
diff --git a/variants/CH32V00x/CH32V003F4/PeripheralPins.c b/variants/CH32V00x/CH32V003F4/PeripheralPins.c
index 354ea48..1b86c53 100644
--- a/variants/CH32V00x/CH32V003F4/PeripheralPins.c
+++ b/variants/CH32V00x/CH32V003F4/PeripheralPins.c
@@ -48,14 +48,14 @@ WEAK const PinMap PinMap_ADC[] = {
 #ifdef I2C_MODULE_ENABLED
 WEAK const PinMap PinMap_I2C_SDA[] = {
   {PC_1, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_NONE)},
-  {NC,   NP,   0, 0}
+  {NC,   NP,   0}
 };
 #endif
 
 #ifdef I2C_MODULE_ENABLED
 WEAK const PinMap PinMap_I2C_SCL[] = {
   {PC_2, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_NONE)},
-  {NC,   NP,   0, 0}
+  {NC,   NP,   0}
 };
 #endif
 
@@ -82,28 +82,28 @@ WEAK const PinMap PinMap_TIM[] = {
 #ifdef UART_MODULE_ENABLED
 WEAK const PinMap PinMap_UART_TX[] = {
   {PD_5, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, 
-  {NC,   NP,     0, 0}
+  {NC,   NP,     0}
 };
 #endif
 
 #ifdef UART_MODULE_ENABLED
 WEAK const PinMap PinMap_UART_RX[] = {
   {PD_6, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
-  {NC,    NP,     0, 0}
+  {NC,    NP,     0}
 };
 #endif
 
 #ifdef UART_MODULE_ENABLED
 WEAK const PinMap PinMap_UART_RTS[] = {
   {PC_2, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, 
-  {NC,    NP,     0, 0}
+  {NC,    NP,     0}
 };
 #endif
 
 #ifdef UART_MODULE_ENABLED
 WEAK const PinMap PinMap_UART_CTS[] = {
   {PD_3, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},   
-  {NC,    NP,     0, 0}
+  {NC,    NP,     0}
 };
 #endif
 
diff --git a/variants/CH32V20x/CH32V203C6/CMakeLists.txt b/variants/CH32V20x/CH32V203C6/CMakeLists.txt
new file mode 100644
index 0000000..faa4ecc
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C6/CMakeLists.txt
@@ -0,0 +1,30 @@
+# v3.21 implemented semantic changes regarding $<TARGET_OBJECTS:...>
+# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects
+cmake_minimum_required(VERSION 3.21)
+
+add_library(variant INTERFACE)
+add_library(variant_usage INTERFACE)
+
+target_include_directories(variant_usage INTERFACE
+  .
+)
+
+
+target_link_libraries(variant_usage INTERFACE
+  base_config
+)
+
+target_link_libraries(variant INTERFACE variant_usage)
+
+
+
+add_library(variant_bin STATIC EXCLUDE_FROM_ALL
+  PeripheralPins.c
+  variant_CH32V203C8.cpp
+)
+target_link_libraries(variant_bin PUBLIC variant_usage)
+
+target_link_libraries(variant INTERFACE
+  variant_bin
+)
+
diff --git a/variants/CH32V20x/CH32V203C6/PeripheralPins.c b/variants/CH32V20x/CH32V203C6/PeripheralPins.c
new file mode 100644
index 0000000..d033661
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C6/PeripheralPins.c
@@ -0,0 +1,218 @@
+/**
+ *******************************************************************************
+ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+ * All rights reserved.
+ *
+ * This software component is licensed by WCH under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+
+#include "Arduino.h"
+#include "PeripheralPins.h"
+
+/* =====
+ * Notes:
+ * - The pins mentioned Px_y_ALTz are alternative possibilities which use other
+ *   HW peripheral instances. You can use them the same way as any other "normal"
+ *   pin (i.e. analogWrite(PA7_ALT1, 128);).
+ *
+ * - Commented lines are alternative possibilities which are not used per default.
+ *   If you change them, you will have to know what you do
+ * =====
+ */
+
+//*** ADC ***
+#ifdef ADC_MODULE_ENABLED
+WEAK const PinMap PinMap_ADC[] = {
+  {PA_0,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 0)}, // ADC1_IN0
+  {PA_0_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 0)}, // ADC2_IN0
+  {PA_1,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 1)}, // ADC1_IN1
+  {PA_1_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 1)}, // ADC2_IN1
+  {PA_2,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 2)}, // ADC1_IN2
+  {PA_2_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 2)}, // ADC2_IN2
+  {PA_3,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 3)}, // ADC1_IN3
+  {PA_3_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 3)}, // ADC2_IN3
+  {PA_4,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 4)}, // ADC1_IN4
+  {PA_4_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 4)}, // ADC2_IN4
+  {PA_5,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 5)}, // ADC1_IN5
+  {PA_5_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 5)}, // ADC2_IN5
+  {PA_6,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 6)}, // ADC1_IN6
+  {PA_6_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 6)}, // ADC2_IN6
+  {PA_7,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 7)}, // ADC1_IN7
+  {PA_7_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 7)}, // ADC2_IN7
+  {PB_0,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 8)}, // ADC1_IN8
+  {PB_0_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 8)}, // ADC2_IN8
+  {PB_1,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 9)}, // ADC1_IN9
+  {PB_1_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 9)}, // ADC2_IN9
+  {NC,        NP,   0}
+};
+#endif
+
+//*** No DAC ***
+
+
+
+//*** I2C ***
+#ifdef I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SDA[] = {
+  {PB_7, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_NONE)},
+  {PB_9, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_Remap_I2C1_ENABLE)},
+  {NC,   NP,   0}
+};
+#endif
+
+#ifdef I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SCL[] = {
+  {PB_6, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_NONE)},
+  {PB_8, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_Remap_I2C1_ENABLE)},
+  {NC,   NP,   0}
+};
+#endif
+
+//*** TIM ***
+#ifdef TIM_MODULE_ENABLED
+WEAK const PinMap PinMap_TIM[] = {
+  {PA_0,       TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1
+  {PA_0_ALT1,  TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1
+  {PA_1,       TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 2, 0)}, // TIM2_CH2
+  {PA_1_ALT1,  TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2
+  {PA_2,       TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 3, 0)}, // TIM2_CH3
+  {PA_2_ALT1,  TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3
+  {PA_3,       TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 4, 0)}, // TIM2_CH4
+  {PA_3_ALT1,  TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4
+  {PA_6,       TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 1, 0)}, // TIM3_CH1
+  {PA_7,       TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
+  {PA_7_ALT1,  TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 2, 0)}, // TIM3_CH2
+  {PA_8,       TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 0)}, // TIM1_CH1
+  {PA_8_ALT1,  TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1
+  {PA_9,       TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 0)}, // TIM1_CH2
+  {PA_9_ALT1,  TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2
+  {PA_10,      TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 0)}, // TIM1_CH3
+  {PA_10_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3
+  {PA_11,      TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 4, 0)}, // TIM1_CH4
+  {PA_11_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4
+  {PA_15,      TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1
+  {PA_15_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1
+  {PB_0,       TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N
+  {PB_0_ALT1,  TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 3, 0)}, // TIM3_CH3
+  {PB_0_ALT2,  TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3
+  {PB_1,       TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N
+  {PB_1_ALT1,  TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 4, 0)}, // TIM3_CH4
+  {PB_1_ALT2,  TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4
+  {PB_3,       TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2
+  {PB_3_ALT1,  TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2
+  {PB_4,       TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1
+  {PB_5,       TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2
+  {PB_10,      TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
+  {PB_10_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3
+  {PB_11,      TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4
+  {PB_11_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
+  {PB_13,      TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 1)}, // TIM1_CH1N
+  {PB_14,      TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 1)}, // TIM1_CH2N
+  {PB_15,      TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 1)}, // TIM1_CH3N
+  {NC,         NP,   0}
+};
+#endif
+
+//*** UART ***
+#ifdef UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_TX[] = {
+  {PA_9, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PB_6, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_Remap_USART1_ENABLE)},
+  {PA_2, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, 
+  {NC,   NP,     0}
+};
+#endif
+
+#ifdef UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_RX[] = {
+  {PA_10, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {PB_7,  USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_Remap_USART1_ENABLE)},
+  {PA_3,  USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {NC,    NP,     0}
+};
+#endif
+
+#ifdef UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_RTS[] = {
+  {PA_12, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PA_1,  USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {NC,    NP,     0}
+};
+#endif
+
+#ifdef UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_CTS[] = {
+  {PA_11, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},  
+  {PA_0,  USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, 
+  {NC,    NP,     0}
+};
+#endif
+
+
+//*** SPI ***
+#ifdef SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MOSI[] = {
+  {PA_7, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {NC,   NP,   0}
+};
+#endif
+
+#ifdef SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MISO[] = {
+  {PA_6, SPI1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_FLOAT, 0, AFIO_NONE)},
+  {NC,   NP,   0}
+};
+#endif
+
+#ifdef SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_SCLK[] = {
+  {PA_5, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {NC,   NP,   0}
+};
+#endif
+
+#ifdef SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_SSEL[] = {
+  {PA_4,  SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {NC,    NP,   0}
+};
+#endif
+
+//*** CAN ***
+#ifdef CAN_MODULE_ENABLED
+WEAK const PinMap PinMap_CAN_RD[] = {
+  {PA_11, CAN1, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)},
+  {PB_8,  CAN1, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_2)},
+  {NC,    NP,   0}
+};
+#endif
+
+#ifdef CAN_MODULE_ENABLED 
+WEAK const PinMap PinMap_CAN_TD[] = {
+  {PA_12, CAN1, CH_PIN_DATA(CH_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)},
+  {PB_9,  CAN1, CH_PIN_DATA(CH_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)},
+  {NC,    NP,   0}
+};
+#endif
+
+//*** No ETHERNET ***
+
+
+
+//*** USB ***
+#ifdef USB_MODULE_ENABLED
+WEAK const PinMap PinMap_USB[] = {
+  {PA_11, USB, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM
+  {PA_12, USB, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP
+  {NC,    NP,  0}
+};
+#endif
+
+//*** No SD ***
+
+
diff --git a/variants/CH32V20x/CH32V203C6/PinNamesVar.h b/variants/CH32V20x/CH32V203C6/PinNamesVar.h
new file mode 100644
index 0000000..2b0fb9d
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C6/PinNamesVar.h
@@ -0,0 +1,53 @@
+/* Alternate pin name */
+PA_0_ALT1  = PA_0  | ALT1,
+PA_1_ALT1  = PA_1  | ALT1,
+PA_2_ALT1  = PA_2  | ALT1,
+PA_3_ALT1  = PA_3  | ALT1,
+PA_4_ALT1  = PA_4  | ALT1,
+PA_5_ALT1  = PA_5  | ALT1,
+PA_6_ALT1  = PA_6  | ALT1,
+PA_7_ALT1  = PA_7  | ALT1,
+PA_8_ALT1  = PA_8  | ALT1,
+PA_9_ALT1  = PA_9  | ALT1,
+PA_10_ALT1 = PA_10 | ALT1,
+PA_11_ALT1 = PA_11 | ALT1,
+PA_15_ALT1 = PA_15 | ALT1,
+PB_0_ALT1  = PB_0  | ALT1,
+PB_0_ALT2  = PB_0  | ALT2,
+PB_1_ALT1  = PB_1  | ALT1,
+PB_1_ALT2  = PB_1  | ALT2,
+PB_3_ALT1  = PB_3  | ALT1,
+PB_10_ALT1 = PB_10 | ALT1,
+PB_11_ALT1 = PB_11 | ALT1,
+
+/* SYS_WKUP */
+#ifdef PWR_WAKEUP_PIN1
+  SYS_WKUP1 = PA_0,
+#endif
+#ifdef PWR_WAKEUP_PIN2
+  SYS_WKUP2 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN3
+  SYS_WKUP3 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN4
+  SYS_WKUP4 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN5
+  SYS_WKUP5 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN6
+  SYS_WKUP6 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN7
+  SYS_WKUP7 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN8
+  SYS_WKUP8 = NC,
+#endif
+
+/* USB */
+#ifdef USBCON
+  USB_DM = PA_11,
+  USB_DP = PA_12,
+#endif
diff --git a/variants/CH32V20x/CH32V203C6/boards_entry.txt b/variants/CH32V20x/CH32V203C6/boards_entry.txt
new file mode 100644
index 0000000..1ece961
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C6/boards_entry.txt
@@ -0,0 +1,12 @@
+# This file help to add generic board entry.
+
+
+
+# CH32V203C8
+CH32V20x_EVT.menu.pnum.CH32V203C8=Generic CH32V203C8 Board
+CH32V20x_EVT.menu.pnum.CH32V203C8.upload.maximum_size=65536
+CH32V20x_EVT.menu.pnum.CH32V203C8.upload.maximum_data_size=20480
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.board=CH32V203C8
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.product_line=CH32V203x8
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.variant=CH32V20x/CH32V203C8
+
diff --git a/variants/CH32V20x/CH32V203C6/variant_CH32V203C6.cpp b/variants/CH32V20x/CH32V203C6/variant_CH32V203C6.cpp
new file mode 100644
index 0000000..c1136eb
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C6/variant_CH32V203C6.cpp
@@ -0,0 +1,75 @@
+/**
+ *******************************************************************************
+ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+ * All rights reserved.
+ *
+ * This software component is licensed by WCH under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+
+#include "pins_arduino.h"
+
+
+
+
+// Digital PinName array
+const PinName digitalPin[] = {
+  PA_0,   // D0/A0
+  PA_1,   // D1/A1
+  PA_2,   // D2/A2
+  PA_3,   // D3/A3
+  PA_4,   // D4/A4
+  PA_5,   // D5/A5
+  PA_6,   // D6/A6
+  PA_7,   // D7/A7
+  PA_8,   // D8
+  PA_9,   // D9
+  PA_10,  // D10
+  PA_11,  // D11
+  PA_12,  // D12
+  PA_13,  // D13
+  PA_14,  // D14
+  PA_15,  // D15
+  PB_0,   // D16/A8
+  PB_1,   // D17/A9
+  PB_2,   // D18
+  PB_3,   // D19
+  PB_4,   // D20
+  PB_5,   // D21
+  PB_6,   // D22
+  PB_7,   // D23
+  PB_8,   // D24
+  PB_9,   // D25
+  PB_10,  // D26
+  PB_11,  // D27
+  PB_12,  // D28
+  PB_13,  // D29
+  PB_14,  // D30
+  PB_15,  // D31
+  PC_13,  // D32
+  PC_14,  // D33
+  PC_15,  // D34
+  PD_0,   // D35
+  PD_1    // D36
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+  0,  // A0,  PA0
+  1,  // A1,  PA1
+  2,  // A2,  PA2
+  3,  // A3,  PA3
+  4,  // A4,  PA4
+  5,  // A5,  PA5
+  6,  // A6,  PA6
+  7,  // A7,  PA7
+  16, // A8,  PB0
+  17  // A9,  PB1
+};
+
+
+
diff --git a/variants/CH32V20x/CH32V203C6/variant_CH32V203C6.h b/variants/CH32V20x/CH32V203C6/variant_CH32V203C6.h
new file mode 100644
index 0000000..91f0398
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C6/variant_CH32V203C6.h
@@ -0,0 +1,183 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+ * All rights reserved.
+ *
+ * This software component is licensed by WCH under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/* ENABLE Peripherals */
+#define                         ADC_MODULE_ENABLED
+#define                         UART_MODULE_ENABLED
+#define                         SPI_MODULE_ENABLED  
+#define                         I2C_MODULE_ENABLED
+
+/* CH32V203C6 Pins */
+#define PA0                     PIN_A0
+#define PA1                     PIN_A1
+#define PA2                     PIN_A2
+#define PA3                     PIN_A3
+#define PA4                     PIN_A4
+#define PA5                     PIN_A5
+#define PA6                     PIN_A6
+#define PA7                     PIN_A7
+#define PA8                     8
+#define PA9                     9
+#define PA10                    10
+#define PA11                    11
+#define PA12                    12
+#define PA13                    13
+#define PA14                    14
+#define PA15                    15
+#define PB0                     PIN_A8
+#define PB1                     PIN_A9
+#define PB2                     18
+#define PB3                     19
+#define PB4                     20
+#define PB5                     21
+#define PB6                     22
+#define PB7                     23
+#define PB8                     24
+#define PB9                     25
+#define PB10                    26
+#define PB11                    27
+#define PB12                    28
+#define PB13                    29
+#define PB14                    30
+#define PB15                    31
+#define PC13                    32
+#define PC14                    33
+#define PC15                    34
+#define PD0                     35
+#define PD1                     36
+
+// Alternate pins number
+#define PA0_ALT1                (PA0  | ALT1)
+#define PA1_ALT1                (PA1  | ALT1)
+#define PA2_ALT1                (PA2  | ALT1)
+#define PA3_ALT1                (PA3  | ALT1)
+#define PA4_ALT1                (PA4  | ALT1)
+#define PA5_ALT1                (PA5  | ALT1)
+#define PA6_ALT1                (PA6  | ALT1)
+#define PA7_ALT1                (PA7  | ALT1)
+#define PA8_ALT1                (PA8  | ALT1)
+#define PA9_ALT1                (PA9  | ALT1)
+#define PA10_ALT1               (PA10 | ALT1)
+#define PA11_ALT1               (PA11 | ALT1)
+#define PA15_ALT1               (PA15 | ALT1)
+#define PB0_ALT1                (PB0  | ALT1)
+#define PB0_ALT2                (PB0  | ALT2)
+#define PB1_ALT1                (PB1  | ALT1)
+#define PB1_ALT2                (PB1  | ALT2)
+#define PB3_ALT1                (PB3  | ALT1)
+#define PB10_ALT1               (PB10 | ALT1)
+#define PB11_ALT1               (PB11 | ALT1)
+
+#define NUM_DIGITAL_PINS        37
+#define NUM_ANALOG_INPUTS       10
+// #define ADC_CTLR_ADCAL          
+#define ADC_RESOLUTION          12
+
+
+// On-board LED pin number
+#ifndef LED_BUILTIN
+  #define LED_BUILTIN           PNUM_NOT_DEFINED
+#endif
+
+
+
+// On-board user button
+#ifndef USER_BTN
+  #define USER_BTN              PNUM_NOT_DEFINED
+#endif
+
+// SPI definitions
+#ifndef PIN_SPI_SS
+  #define PIN_SPI_SS            PA4
+#endif
+#ifndef PIN_SPI_SS1
+  #define PIN_SPI_SS1           PA15
+#endif
+#ifndef PIN_SPI_SS2
+  #define PIN_SPI_SS2           PNUM_NOT_DEFINED
+#endif
+#ifndef PIN_SPI_SS3
+  #define PIN_SPI_SS3           PNUM_NOT_DEFINED
+#endif
+
+#ifndef PIN_SPI_MOSI
+  #define PIN_SPI_MOSI          PA7
+#endif
+#ifndef PIN_SPI_MISO
+  #define PIN_SPI_MISO          PA6
+#endif
+#ifndef PIN_SPI_SCK
+  #define PIN_SPI_SCK           PA5
+#endif
+
+// I2C definitions
+#ifndef PIN_WIRE_SDA
+  #define PIN_WIRE_SDA          PB7
+#endif
+#ifndef PIN_WIRE_SCL
+  #define PIN_WIRE_SCL          PB6
+#endif
+
+// Timer Definitions
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
+#ifndef TIMER_TONE
+  #define TIMER_TONE            TIM3
+#endif
+#ifndef TIMER_SERVO
+  #define TIMER_SERVO           TIM2
+#endif
+
+
+// UART Definitions
+#ifndef SERIAL_UART_INSTANCE
+  #define SERIAL_UART_INSTANCE  1
+#endif
+// Default pin used for generic 'Serial' instance
+// Mandatory for Firmata
+#ifndef PIN_SERIAL_RX
+  #define PIN_SERIAL_RX         PA10
+#endif
+#ifndef PIN_SERIAL_TX
+  #define PIN_SERIAL_TX         PA9
+#endif
+
+/*----------------------------------------------------------------------------
+ *        Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+  // These serial port names are intended to allow libraries and architecture-neutral
+  // sketches to automatically default to the correct port name for a particular type
+  // of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+  // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+  //
+  // SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
+  //
+  // SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
+  //
+  // SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
+  //
+  // SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
+  //
+  // SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
+  //                            pins are NOT connected to anything by default.
+  #ifndef SERIAL_PORT_MONITOR
+    #define SERIAL_PORT_MONITOR   Serial
+  #endif
+  #ifndef SERIAL_PORT_HARDWARE
+    #define SERIAL_PORT_HARDWARE  Serial
+  #endif
+#endif
+
+
diff --git a/variants/CH32V20x/CH32V203C8/CMakeLists.txt b/variants/CH32V20x/CH32V203C8/CMakeLists.txt
new file mode 100644
index 0000000..faa4ecc
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C8/CMakeLists.txt
@@ -0,0 +1,30 @@
+# v3.21 implemented semantic changes regarding $<TARGET_OBJECTS:...>
+# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects
+cmake_minimum_required(VERSION 3.21)
+
+add_library(variant INTERFACE)
+add_library(variant_usage INTERFACE)
+
+target_include_directories(variant_usage INTERFACE
+  .
+)
+
+
+target_link_libraries(variant_usage INTERFACE
+  base_config
+)
+
+target_link_libraries(variant INTERFACE variant_usage)
+
+
+
+add_library(variant_bin STATIC EXCLUDE_FROM_ALL
+  PeripheralPins.c
+  variant_CH32V203C8.cpp
+)
+target_link_libraries(variant_bin PUBLIC variant_usage)
+
+target_link_libraries(variant INTERFACE
+  variant_bin
+)
+
diff --git a/variants/CH32V20x/CH32V203C8/PeripheralPins.c b/variants/CH32V20x/CH32V203C8/PeripheralPins.c
new file mode 100644
index 0000000..1826aad
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C8/PeripheralPins.c
@@ -0,0 +1,236 @@
+/**
+ *******************************************************************************
+ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+ * All rights reserved.
+ *
+ * This software component is licensed by WCH under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+
+#include "Arduino.h"
+#include "PeripheralPins.h"
+
+/* =====
+ * Notes:
+ * - The pins mentioned Px_y_ALTz are alternative possibilities which use other
+ *   HW peripheral instances. You can use them the same way as any other "normal"
+ *   pin (i.e. analogWrite(PA7_ALT1, 128);).
+ *
+ * - Commented lines are alternative possibilities which are not used per default.
+ *   If you change them, you will have to know what you do
+ * =====
+ */
+
+//*** ADC ***
+#ifdef ADC_MODULE_ENABLED
+WEAK const PinMap PinMap_ADC[] = {
+  {PA_0,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 0)}, // ADC1_IN0
+  {PA_0_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 0)}, // ADC2_IN0
+  {PA_1,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 1)}, // ADC1_IN1
+  {PA_1_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 1)}, // ADC2_IN1
+  {PA_2,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 2)}, // ADC1_IN2
+  {PA_2_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 2)}, // ADC2_IN2
+  {PA_3,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 3)}, // ADC1_IN3
+  {PA_3_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 3)}, // ADC2_IN3
+  {PA_4,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 4)}, // ADC1_IN4
+  {PA_4_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 4)}, // ADC2_IN4
+  {PA_5,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 5)}, // ADC1_IN5
+  {PA_5_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 5)}, // ADC2_IN5
+  {PA_6,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 6)}, // ADC1_IN6
+  {PA_6_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 6)}, // ADC2_IN6
+  {PA_7,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 7)}, // ADC1_IN7
+  {PA_7_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 7)}, // ADC2_IN7
+  {PB_0,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 8)}, // ADC1_IN8
+  {PB_0_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 8)}, // ADC2_IN8
+  {PB_1,      ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 9)}, // ADC1_IN9
+  {PB_1_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 9)}, // ADC2_IN9
+  {NC,        NP,   0}
+};
+#endif
+
+//*** No DAC ***
+
+
+
+//*** I2C ***
+#ifdef I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SDA[] = {
+  {PB_7, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_NONE)},
+  {PB_9, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_Remap_I2C1_ENABLE)},
+  {PB_11, I2C2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_NONE)},
+  {NC,   NP,   0}
+};
+#endif
+
+#ifdef I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SCL[] = {
+  {PB_6, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_NONE)},
+  {PB_8, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_Remap_I2C1_ENABLE)},
+  {PB_10, I2C2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_NONE)},
+  {NC,   NP,   0}
+};
+#endif
+
+//*** TIM ***
+#ifdef TIM_MODULE_ENABLED
+WEAK const PinMap PinMap_TIM[] = {
+  {PA_0,       TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1
+  {PA_0_ALT1,  TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1
+  {PA_1,       TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 2, 0)}, // TIM2_CH2
+  {PA_1_ALT1,  TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2
+  {PA_2,       TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 3, 0)}, // TIM2_CH3
+  {PA_2_ALT1,  TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3
+  {PA_3,       TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_DISABLE, 4, 0)}, // TIM2_CH4
+  {PA_3_ALT1,  TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4
+  {PA_6,       TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 1, 0)}, // TIM3_CH1
+  {PA_7,       TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
+  {PA_7_ALT1,  TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 2, 0)}, // TIM3_CH2
+  {PA_8,       TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 0)}, // TIM1_CH1
+  {PA_8_ALT1,  TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1
+  {PA_9,       TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 0)}, // TIM1_CH2
+  {PA_9_ALT1,  TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2
+  {PA_10,      TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 0)}, // TIM1_CH3
+  {PA_10_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3
+  {PA_11,      TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 4, 0)}, // TIM1_CH4
+  {PA_11_ALT1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4
+  {PA_15,      TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1
+  {PA_15_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1
+  {PB_0,       TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N
+  {PB_0_ALT1,  TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 3, 0)}, // TIM3_CH3
+  {PB_0_ALT2,  TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3
+  {PB_1,       TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N
+  {PB_1_ALT1,  TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_DISABLE, 4, 0)}, // TIM3_CH4
+  {PB_1_ALT2,  TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4
+  {PB_3,       TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2
+  {PB_3_ALT1,  TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2
+  {PB_4,       TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1
+  {PB_5,       TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2
+  {PB_10,      TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
+  {PB_10_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3
+  {PB_11,      TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4
+  {PB_11_ALT1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
+  {PB_13,      TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 1)}, // TIM1_CH1N
+  {PB_14,      TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 1)}, // TIM1_CH2N
+  {PB_15,      TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 1)}, // TIM1_CH3N
+  {NC,         NP,   0, 0}
+};
+#endif
+
+//*** UART ***
+#ifdef UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_TX[] = {
+  {PA_9, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PB_6, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_Remap_USART1_ENABLE)},
+  {PA_2, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PB_10,USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PC_10,USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_FullRemap_USART3_ENABLE)},
+  {PB_0, UART4,  CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PA_5, UART4,  CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_FullRemap_USART4_ENABLE)},  
+  {NC,   NP,     0}
+};
+#endif
+
+#ifdef UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_RX[] = {
+  {PA_10, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {PB_7,  USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_Remap_USART1_ENABLE)},
+  {PA_3,  USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {PB_11, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {PC_11, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_FullRemap_USART3_ENABLE)},
+  {PB_1,  UART4,  CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {PB_5,  UART4,  CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_FullRemap_USART4_ENABLE)},
+  {NC,    NP,     0}
+};
+#endif
+
+#ifdef UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_RTS[] = {
+  {PA_12, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PA_1,  USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PB_14, USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PB_4,  UART4,  CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},  
+  {NC,    NP,     0}
+};
+#endif
+
+#ifdef UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_CTS[] = {
+  {PA_11, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},  
+  {PA_0,  USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {PB_13, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
+  {PB_3,  UART4,  CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},    
+  {NC,    NP,     0}
+};
+#endif
+
+
+//*** SPI ***
+#ifdef SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MOSI[] = {
+  {PA_7, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PB_15,SPI2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {NC,   NP,   0}
+};
+#endif
+
+#ifdef SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MISO[] = {
+  {PA_6, SPI1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_FLOAT, 0, AFIO_NONE)},
+  {PB_14, SPI2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_FLOAT, 0, AFIO_NONE)},
+  {NC,   NP,   0}
+};
+#endif
+
+#ifdef SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_SCLK[] = {
+  {PA_5, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PB_13, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {NC,   NP,   0}
+};
+#endif
+
+#ifdef SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_SSEL[] = {
+  {PA_4,  SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {PB_12,  SPI2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
+  {NC,    NP,   0}
+};
+#endif
+
+//*** CAN ***
+#ifdef CAN_MODULE_ENABLED
+WEAK const PinMap PinMap_CAN_RD[] = {
+  {PA_11, CAN1, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)},
+  {PB_8,  CAN1, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_2)},
+  {NC,    NP,   0}
+};
+#endif
+
+#ifdef CAN_MODULE_ENABLED 
+WEAK const PinMap PinMap_CAN_TD[] = {
+  {PA_12, CAN1, CH_PIN_DATA(CH_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)},
+  {PB_9,  CAN1, CH_PIN_DATA(CH_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)},
+  {NC,    NP,   0}
+};
+#endif
+
+//*** No ETHERNET ***
+
+
+
+//*** USB ***
+#ifdef USB_MODULE_ENABLED
+WEAK const PinMap PinMap_USB[] = {
+  {PA_11, USB, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM
+  {PA_12, USB, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP
+  {NC,    NP,  0}
+};
+#endif
+
+//*** No SD ***
+
+
diff --git a/variants/CH32V20x/CH32V203C8/PinNamesVar.h b/variants/CH32V20x/CH32V203C8/PinNamesVar.h
new file mode 100644
index 0000000..2b0fb9d
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C8/PinNamesVar.h
@@ -0,0 +1,53 @@
+/* Alternate pin name */
+PA_0_ALT1  = PA_0  | ALT1,
+PA_1_ALT1  = PA_1  | ALT1,
+PA_2_ALT1  = PA_2  | ALT1,
+PA_3_ALT1  = PA_3  | ALT1,
+PA_4_ALT1  = PA_4  | ALT1,
+PA_5_ALT1  = PA_5  | ALT1,
+PA_6_ALT1  = PA_6  | ALT1,
+PA_7_ALT1  = PA_7  | ALT1,
+PA_8_ALT1  = PA_8  | ALT1,
+PA_9_ALT1  = PA_9  | ALT1,
+PA_10_ALT1 = PA_10 | ALT1,
+PA_11_ALT1 = PA_11 | ALT1,
+PA_15_ALT1 = PA_15 | ALT1,
+PB_0_ALT1  = PB_0  | ALT1,
+PB_0_ALT2  = PB_0  | ALT2,
+PB_1_ALT1  = PB_1  | ALT1,
+PB_1_ALT2  = PB_1  | ALT2,
+PB_3_ALT1  = PB_3  | ALT1,
+PB_10_ALT1 = PB_10 | ALT1,
+PB_11_ALT1 = PB_11 | ALT1,
+
+/* SYS_WKUP */
+#ifdef PWR_WAKEUP_PIN1
+  SYS_WKUP1 = PA_0,
+#endif
+#ifdef PWR_WAKEUP_PIN2
+  SYS_WKUP2 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN3
+  SYS_WKUP3 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN4
+  SYS_WKUP4 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN5
+  SYS_WKUP5 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN6
+  SYS_WKUP6 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN7
+  SYS_WKUP7 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN8
+  SYS_WKUP8 = NC,
+#endif
+
+/* USB */
+#ifdef USBCON
+  USB_DM = PA_11,
+  USB_DP = PA_12,
+#endif
diff --git a/variants/CH32V20x/CH32V203C8/boards_entry.txt b/variants/CH32V20x/CH32V203C8/boards_entry.txt
new file mode 100644
index 0000000..1ece961
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C8/boards_entry.txt
@@ -0,0 +1,12 @@
+# This file help to add generic board entry.
+
+
+
+# CH32V203C8
+CH32V20x_EVT.menu.pnum.CH32V203C8=Generic CH32V203C8 Board
+CH32V20x_EVT.menu.pnum.CH32V203C8.upload.maximum_size=65536
+CH32V20x_EVT.menu.pnum.CH32V203C8.upload.maximum_data_size=20480
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.board=CH32V203C8
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.product_line=CH32V203x8
+CH32V20x_EVT.menu.pnum.CH32V203C8.build.variant=CH32V20x/CH32V203C8
+
diff --git a/variants/CH32V20x/CH32V203C8/variant_CH32V203C8.cpp b/variants/CH32V20x/CH32V203C8/variant_CH32V203C8.cpp
new file mode 100644
index 0000000..c1136eb
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C8/variant_CH32V203C8.cpp
@@ -0,0 +1,75 @@
+/**
+ *******************************************************************************
+ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+ * All rights reserved.
+ *
+ * This software component is licensed by WCH under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+
+#include "pins_arduino.h"
+
+
+
+
+// Digital PinName array
+const PinName digitalPin[] = {
+  PA_0,   // D0/A0
+  PA_1,   // D1/A1
+  PA_2,   // D2/A2
+  PA_3,   // D3/A3
+  PA_4,   // D4/A4
+  PA_5,   // D5/A5
+  PA_6,   // D6/A6
+  PA_7,   // D7/A7
+  PA_8,   // D8
+  PA_9,   // D9
+  PA_10,  // D10
+  PA_11,  // D11
+  PA_12,  // D12
+  PA_13,  // D13
+  PA_14,  // D14
+  PA_15,  // D15
+  PB_0,   // D16/A8
+  PB_1,   // D17/A9
+  PB_2,   // D18
+  PB_3,   // D19
+  PB_4,   // D20
+  PB_5,   // D21
+  PB_6,   // D22
+  PB_7,   // D23
+  PB_8,   // D24
+  PB_9,   // D25
+  PB_10,  // D26
+  PB_11,  // D27
+  PB_12,  // D28
+  PB_13,  // D29
+  PB_14,  // D30
+  PB_15,  // D31
+  PC_13,  // D32
+  PC_14,  // D33
+  PC_15,  // D34
+  PD_0,   // D35
+  PD_1    // D36
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+  0,  // A0,  PA0
+  1,  // A1,  PA1
+  2,  // A2,  PA2
+  3,  // A3,  PA3
+  4,  // A4,  PA4
+  5,  // A5,  PA5
+  6,  // A6,  PA6
+  7,  // A7,  PA7
+  16, // A8,  PB0
+  17  // A9,  PB1
+};
+
+
+
diff --git a/variants/CH32V20x/CH32V203C8/variant_CH32V203C8.h b/variants/CH32V20x/CH32V203C8/variant_CH32V203C8.h
new file mode 100644
index 0000000..45ce6d5
--- /dev/null
+++ b/variants/CH32V20x/CH32V203C8/variant_CH32V203C8.h
@@ -0,0 +1,183 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+ * All rights reserved.
+ *
+ * This software component is licensed by WCH under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/* ENABLE Peripherals */
+#define                         ADC_MODULE_ENABLED
+#define                         UART_MODULE_ENABLED
+#define                         SPI_MODULE_ENABLED  
+#define                         I2C_MODULE_ENABLED
+
+/* CH32V203C8 Pins */
+#define PA0                     PIN_A0
+#define PA1                     PIN_A1
+#define PA2                     PIN_A2
+#define PA3                     PIN_A3
+#define PA4                     PIN_A4
+#define PA5                     PIN_A5
+#define PA6                     PIN_A6
+#define PA7                     PIN_A7
+#define PA8                     8
+#define PA9                     9
+#define PA10                    10
+#define PA11                    11
+#define PA12                    12
+#define PA13                    13
+#define PA14                    14
+#define PA15                    15
+#define PB0                     PIN_A8
+#define PB1                     PIN_A9
+#define PB2                     18
+#define PB3                     19
+#define PB4                     20
+#define PB5                     21
+#define PB6                     22
+#define PB7                     23
+#define PB8                     24
+#define PB9                     25
+#define PB10                    26
+#define PB11                    27
+#define PB12                    28
+#define PB13                    29
+#define PB14                    30
+#define PB15                    31
+#define PC13                    32
+#define PC14                    33
+#define PC15                    34
+#define PD0                     35
+#define PD1                     36
+
+// Alternate pins number
+#define PA0_ALT1                (PA0  | ALT1)
+#define PA1_ALT1                (PA1  | ALT1)
+#define PA2_ALT1                (PA2  | ALT1)
+#define PA3_ALT1                (PA3  | ALT1)
+#define PA4_ALT1                (PA4  | ALT1)
+#define PA5_ALT1                (PA5  | ALT1)
+#define PA6_ALT1                (PA6  | ALT1)
+#define PA7_ALT1                (PA7  | ALT1)
+#define PA8_ALT1                (PA8  | ALT1)
+#define PA9_ALT1                (PA9  | ALT1)
+#define PA10_ALT1               (PA10 | ALT1)
+#define PA11_ALT1               (PA11 | ALT1)
+#define PA15_ALT1               (PA15 | ALT1)
+#define PB0_ALT1                (PB0  | ALT1)
+#define PB0_ALT2                (PB0  | ALT2)
+#define PB1_ALT1                (PB1  | ALT1)
+#define PB1_ALT2                (PB1  | ALT2)
+#define PB3_ALT1                (PB3  | ALT1)
+#define PB10_ALT1               (PB10 | ALT1)
+#define PB11_ALT1               (PB11 | ALT1)
+
+#define NUM_DIGITAL_PINS        37
+#define NUM_ANALOG_INPUTS       10
+// #define ADC_CTLR_ADCAL          
+#define ADC_RESOLUTION          12
+
+
+// On-board LED pin number
+#ifndef LED_BUILTIN
+  #define LED_BUILTIN           PNUM_NOT_DEFINED
+#endif
+
+
+
+// On-board user button
+#ifndef USER_BTN
+  #define USER_BTN              PNUM_NOT_DEFINED
+#endif
+
+// SPI definitions
+#ifndef PIN_SPI_SS
+  #define PIN_SPI_SS            PA4
+#endif
+#ifndef PIN_SPI_SS1
+  #define PIN_SPI_SS1           PA15
+#endif
+#ifndef PIN_SPI_SS2
+  #define PIN_SPI_SS2           PNUM_NOT_DEFINED
+#endif
+#ifndef PIN_SPI_SS3
+  #define PIN_SPI_SS3           PNUM_NOT_DEFINED
+#endif
+
+#ifndef PIN_SPI_MOSI
+  #define PIN_SPI_MOSI          PA7
+#endif
+#ifndef PIN_SPI_MISO
+  #define PIN_SPI_MISO          PA6
+#endif
+#ifndef PIN_SPI_SCK
+  #define PIN_SPI_SCK           PA5
+#endif
+
+// I2C definitions
+#ifndef PIN_WIRE_SDA
+  #define PIN_WIRE_SDA          PB7
+#endif
+#ifndef PIN_WIRE_SCL
+  #define PIN_WIRE_SCL          PB6
+#endif
+
+// Timer Definitions
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
+#ifndef TIMER_TONE
+  #define TIMER_TONE            TIM3
+#endif
+#ifndef TIMER_SERVO
+  #define TIMER_SERVO           TIM2
+#endif
+
+
+// UART Definitions
+#ifndef SERIAL_UART_INSTANCE
+  #define SERIAL_UART_INSTANCE  1
+#endif
+// Default pin used for generic 'Serial' instance
+// Mandatory for Firmata
+#ifndef PIN_SERIAL_RX
+  #define PIN_SERIAL_RX         PA10
+#endif
+#ifndef PIN_SERIAL_TX
+  #define PIN_SERIAL_TX         PA9
+#endif
+
+/*----------------------------------------------------------------------------
+ *        Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+  // These serial port names are intended to allow libraries and architecture-neutral
+  // sketches to automatically default to the correct port name for a particular type
+  // of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+  // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+  //
+  // SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
+  //
+  // SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
+  //
+  // SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
+  //
+  // SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
+  //
+  // SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
+  //                            pins are NOT connected to anything by default.
+  #ifndef SERIAL_PORT_MONITOR
+    #define SERIAL_PORT_MONITOR   Serial
+  #endif
+  #ifndef SERIAL_PORT_HARDWARE
+    #define SERIAL_PORT_HARDWARE  Serial
+  #endif
+#endif
+
+