[CVP] Remove unnecessary block splits in tests (NFC)
These are no longer necessary since D69686.
This commit is contained in:
Nikita Popov
parent
fe79061be2
commit
01bde7310b
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@ -280,14 +280,9 @@ next:
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define i1 @arg_attribute(i8* nonnull %a) {
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; CHECK-LABEL: @arg_attribute(
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i1 false
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;
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%cmp = icmp eq i8* %a, null
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br label %exit
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exit:
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ret i1 %cmp
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}
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@ -295,15 +290,10 @@ declare nonnull i8* @return_nonnull()
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define i1 @call_attribute() {
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; CHECK-LABEL: @call_attribute(
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; CHECK-NEXT: [[A:%.*]] = call i8* @return_nonnull()
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i1 false
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;
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%a = call i8* @return_nonnull()
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%cmp = icmp eq i8* %a, null
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br label %exit
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exit:
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ret i1 %cmp
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}
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@ -318,8 +308,6 @@ define i1 @umin(i32 %a, i32 %b) {
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; CHECK: b_guard:
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; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ult i32 [[A]], [[B]]
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; CHECK-NEXT: [[MIN:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 [[B]]
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret i1 false
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; CHECK: out:
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; CHECK-NEXT: ret i1 false
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@ -336,8 +324,6 @@ b_guard:
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%sel_cmp = icmp ult i32 %a, %b
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%min = select i1 %sel_cmp, i32 %a, i32 %b
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%res = icmp eq i32 %min, 7
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br label %next
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next:
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ret i1 %res
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out:
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ret i1 false
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@ -354,8 +340,6 @@ define i1 @smin(i32 %a, i32 %b) {
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; CHECK: b_guard:
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; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp sle i32 [[A]], [[B]]
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; CHECK-NEXT: [[MIN:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 [[B]]
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret i1 false
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; CHECK: out:
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; CHECK-NEXT: ret i1 false
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@ -372,8 +356,6 @@ b_guard:
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%sel_cmp = icmp sle i32 %a, %b
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%min = select i1 %sel_cmp, i32 %a, i32 %b
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%res = icmp eq i32 %min, 7
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br label %next
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next:
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ret i1 %res
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out:
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ret i1 false
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@ -390,8 +372,6 @@ define i1 @smax(i32 %a, i32 %b) {
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; CHECK: b_guard:
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; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp sge i32 [[A]], [[B]]
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; CHECK-NEXT: [[MAX:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 [[B]]
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret i1 false
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; CHECK: out:
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; CHECK-NEXT: ret i1 false
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@ -408,8 +388,6 @@ b_guard:
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%sel_cmp = icmp sge i32 %a, %b
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%max = select i1 %sel_cmp, i32 %a, i32 %b
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%res = icmp eq i32 %max, 7
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br label %next
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next:
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ret i1 %res
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out:
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ret i1 false
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@ -426,8 +404,6 @@ define i1 @umax(i32 %a, i32 %b) {
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; CHECK: b_guard:
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; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp uge i32 [[A]], [[B]]
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; CHECK-NEXT: [[MAX:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 [[B]]
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret i1 false
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; CHECK: out:
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; CHECK-NEXT: ret i1 false
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@ -444,8 +420,6 @@ b_guard:
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%sel_cmp = icmp uge i32 %a, %b
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%max = select i1 %sel_cmp, i32 %a, i32 %b
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%res = icmp eq i32 %max, 7
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br label %next
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next:
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ret i1 %res
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out:
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ret i1 false
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@ -460,8 +434,6 @@ define i1 @clamp_low1(i32 %a) {
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; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp eq i32 [[A]], 5
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], -1
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[SEL_CMP]], i32 5, i32 [[A]]
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret i1 false
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; CHECK: out:
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; CHECK-NEXT: ret i1 false
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@ -475,8 +447,6 @@ a_guard:
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%add = add i32 %a, -1
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%sel = select i1 %sel_cmp, i32 5, i32 %a
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%res = icmp eq i32 %sel, 4
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br label %next
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next:
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ret i1 %res
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out:
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ret i1 false
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@ -491,8 +461,6 @@ define i1 @clamp_low2(i32 %a) {
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; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ne i32 [[A]], 5
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], -1
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 5
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret i1 false
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; CHECK: out:
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; CHECK-NEXT: ret i1 false
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@ -506,8 +474,6 @@ a_guard:
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%add = add i32 %a, -1
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%sel = select i1 %sel_cmp, i32 %a, i32 5
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%res = icmp eq i32 %sel, 4
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br label %next
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next:
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ret i1 %res
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out:
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ret i1 false
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@ -522,8 +488,6 @@ define i1 @clamp_high1(i32 %a) {
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; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp eq i32 [[A]], 5
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[SEL_CMP]], i32 5, i32 [[A]]
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret i1 false
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; CHECK: out:
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; CHECK-NEXT: ret i1 false
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@ -537,8 +501,6 @@ a_guard:
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%add = add i32 %a, 1
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%sel = select i1 %sel_cmp, i32 5, i32 %a
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%res = icmp eq i32 %sel, 6
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br label %next
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next:
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ret i1 %res
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out:
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ret i1 false
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@ -553,8 +515,6 @@ define i1 @clamp_high2(i32 %a) {
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; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ne i32 [[A]], 5
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 5
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret i1 false
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; CHECK: out:
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; CHECK-NEXT: ret i1 false
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@ -568,8 +528,6 @@ a_guard:
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%add = add i32 %a, 1
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%sel = select i1 %sel_cmp, i32 %a, i32 5
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%res = icmp eq i32 %sel, 6
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br label %next
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next:
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ret i1 %res
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out:
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ret i1 false
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@ -585,8 +543,6 @@ define i1 @clamp_high3(i32 %a) {
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; CHECK-NEXT: [[SEL_CMP:%.*]] = icmp ne i32 [[A]], 5
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 100
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 5
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; CHECK-NEXT: br label [[NEXT:%.*]]
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; CHECK: next:
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; CHECK-NEXT: ret i1 false
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; CHECK: out:
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; CHECK-NEXT: ret i1 false
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@ -600,8 +556,6 @@ a_guard:
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%add = add i32 %a, 100
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%sel = select i1 %sel_cmp, i32 %a, i32 5
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%res = icmp eq i32 %sel, 105
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br label %next
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next:
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ret i1 %res
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out:
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ret i1 false
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@ -618,8 +572,6 @@ define void @abs1(i32 %a, i1* %p) {
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[A]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
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; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[A]]
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; CHECK-NEXT: br label [[SPLIT:%.*]]
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; CHECK: split:
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]], align 1
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; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[ABS]], 19
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]], align 1
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@ -640,9 +592,6 @@ guard:
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%sub = sub i32 0, %a
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%cmp = icmp slt i32 %a, 0
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%abs = select i1 %cmp, i32 %sub, i32 %a
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br label %split
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split:
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%c1 = icmp slt i32 %abs, 20
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store i1 %c1, i1* %p
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%c2 = icmp slt i32 %abs, 19
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@ -668,8 +617,6 @@ define void @abs2(i32 %a, i1* %p) {
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[A]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A]], 0
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; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[SUB]]
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; CHECK-NEXT: br label [[SPLIT:%.*]]
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; CHECK: split:
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]], align 1
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; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[ABS]], 19
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]], align 1
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@ -690,9 +637,6 @@ guard:
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%sub = sub i32 0, %a
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%cmp = icmp sge i32 %a, 0
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%abs = select i1 %cmp, i32 %a, i32 %sub
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br label %split
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split:
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%c1 = icmp slt i32 %abs, 20
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store i1 %c1, i1* %p
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%c2 = icmp slt i32 %abs, 19
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@ -718,8 +662,6 @@ define void @nabs1(i32 %a, i1* %p) {
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[A]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 0
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; CHECK-NEXT: [[NABS:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[A]]
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; CHECK-NEXT: br label [[SPLIT:%.*]]
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; CHECK: split:
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]], align 1
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; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[NABS]], -19
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]], align 1
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@ -740,9 +682,6 @@ guard:
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%sub = sub i32 0, %a
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%cmp = icmp sgt i32 %a, 0
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%nabs = select i1 %cmp, i32 %sub, i32 %a
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br label %split
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split:
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%c1 = icmp sgt i32 %nabs, -20
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store i1 %c1, i1* %p
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%c2 = icmp sgt i32 %nabs, -19
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@ -768,8 +707,6 @@ define void @nabs2(i32 %a, i1* %p) {
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[A]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
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; CHECK-NEXT: [[NABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[SUB]]
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; CHECK-NEXT: br label [[SPLIT:%.*]]
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; CHECK: split:
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]], align 1
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; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[NABS]], -19
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]], align 1
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@ -790,9 +727,6 @@ guard:
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%sub = sub i32 0, %a
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%cmp = icmp slt i32 %a, 0
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%nabs = select i1 %cmp, i32 %a, i32 %sub
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br label %split
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split:
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%c1 = icmp sgt i32 %nabs, -20
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store i1 %c1, i1* %p
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%c2 = icmp sgt i32 %nabs, -19
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@ -811,15 +745,11 @@ define i1 @zext_unknown(i8 %a) {
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; CHECK-LABEL: @zext_unknown(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A32:%.*]] = zext i8 [[A:%.*]] to i32
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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%a32 = zext i8 %a to i32
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%cmp = icmp sle i32 %a32, 256
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br label %exit
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exit:
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ret i1 %cmp
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}
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@ -828,16 +758,12 @@ define i1 @trunc_unknown(i32 %a) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A8:%.*]] = trunc i32 [[A:%.*]] to i8
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; CHECK-NEXT: [[A32:%.*]] = sext i8 [[A8]] to i32
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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%a8 = trunc i32 %a to i8
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%a32 = sext i8 %a8 to i32
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%cmp = icmp sle i32 %a32, 128
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br label %exit
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exit:
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ret i1 %cmp
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}
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@ -848,15 +774,11 @@ define i1 @bitcast_unknown(float %a) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A32:%.*]] = bitcast float [[A:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A32]], 128
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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entry:
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%a32 = bitcast float %a to i32
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%cmp = icmp sle i32 %a32, 128
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br label %exit
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exit:
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ret i1 %cmp
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}
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@ -865,15 +787,11 @@ define i1 @bitcast_unknown2(i8* %p) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[P64:%.*]] = ptrtoint i8* [[P:%.*]] to i64
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; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[P64]], 128
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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entry:
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%p64 = ptrtoint i8* %p to i64
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%cmp = icmp sle i64 %p64, 128
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br label %exit
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exit:
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ret i1 %cmp
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}
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@ -882,15 +800,11 @@ define i1 @and_unknown(i32 %a) {
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; CHECK-LABEL: @and_unknown(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 128
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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%and = and i32 %a, 128
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%cmp = icmp sle i32 %and, 128
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br label %exit
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exit:
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ret i1 %cmp
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}
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@ -898,15 +812,11 @@ define i1 @lshr_unknown(i32 %a) {
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; CHECK-LABEL: @lshr_unknown(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[A:%.*]], 30
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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%and = lshr i32 %a, 30
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%cmp = icmp sle i32 %and, 128
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br label %exit
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exit:
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ret i1 %cmp
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}
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@ -914,15 +824,11 @@ define i1 @urem_unknown(i32 %a) {
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; CHECK-LABEL: @urem_unknown(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[UREM:%.*]] = urem i32 [[A:%.*]], 30
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i1 true
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;
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entry:
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%urem = urem i32 %a, 30
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%cmp = icmp ult i32 %urem, 30
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br label %exit
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exit:
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ret i1 %cmp
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}
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@ -95,8 +95,6 @@ define i1 @test3(i32 %x, i32 %y) #0 {
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; CHECK-NEXT: br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]
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; CHECK: cont2:
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[X]], [[Y]]
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; CHECK-NEXT: br label [[CONT3:%.*]]
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; CHECK: cont3:
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; CHECK-NEXT: br label [[OUT]]
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; CHECK: out:
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; CHECK-NEXT: ret i1 true
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@ -111,14 +109,11 @@ cont1:
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cont2:
|
||||
%add = add i32 %x, %y
|
||||
br label %cont3
|
||||
|
||||
cont3:
|
||||
%cmp3 = icmp ult i32 %add, 25
|
||||
br label %out
|
||||
|
||||
out:
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont3 ]
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]
|
||||
ret i1 %ret
|
||||
}
|
||||
|
||||
|
|
@ -134,12 +129,10 @@ define i1 @test4(i32 %x, i32 %y) #0 {
|
|||
; CHECK-NEXT: br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]
|
||||
; CHECK: cont2:
|
||||
; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[X]], [[Y]]
|
||||
; CHECK-NEXT: br label [[CONT3:%.*]]
|
||||
; CHECK: cont3:
|
||||
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i32 [[ADD]], 15
|
||||
; CHECK-NEXT: br label [[OUT]]
|
||||
; CHECK: out:
|
||||
; CHECK-NEXT: [[RET:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ true, [[CONT1]] ], [ [[CMP3]], [[CONT3]] ]
|
||||
; CHECK-NEXT: [[RET:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ true, [[CONT1]] ], [ [[CMP3]], [[CONT2]] ]
|
||||
; CHECK-NEXT: ret i1 [[RET]]
|
||||
;
|
||||
entry:
|
||||
|
|
@ -152,14 +145,11 @@ cont1:
|
|||
|
||||
cont2:
|
||||
%add = add i32 %x, %y
|
||||
br label %cont3
|
||||
|
||||
cont3:
|
||||
%cmp3 = icmp ult i32 %add, 15
|
||||
br label %out
|
||||
|
||||
out:
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont3 ]
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]
|
||||
ret i1 %ret
|
||||
}
|
||||
|
||||
|
|
@ -175,8 +165,6 @@ define i1 @test5(i32 %x, i32 %y) #0 {
|
|||
; CHECK-NEXT: br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]
|
||||
; CHECK: cont2:
|
||||
; CHECK-NEXT: [[SHIFTED:%.*]] = shl nuw nsw i32 [[X]], [[Y]]
|
||||
; CHECK-NEXT: br label [[CONT3:%.*]]
|
||||
; CHECK: cont3:
|
||||
; CHECK-NEXT: br label [[OUT]]
|
||||
; CHECK: out:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -191,14 +179,11 @@ cont1:
|
|||
|
||||
cont2:
|
||||
%shifted = shl i32 %x, %y
|
||||
br label %cont3
|
||||
|
||||
cont3:
|
||||
%cmp3 = icmp ult i32 %shifted, 65536
|
||||
br label %out
|
||||
|
||||
out:
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont3 ]
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]
|
||||
ret i1 %ret
|
||||
}
|
||||
|
||||
|
|
@ -214,12 +199,10 @@ define i1 @test6(i32 %x, i32 %y) #0 {
|
|||
; CHECK-NEXT: br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]
|
||||
; CHECK: cont2:
|
||||
; CHECK-NEXT: [[SHIFTED:%.*]] = shl nuw nsw i32 [[X]], [[Y]]
|
||||
; CHECK-NEXT: br label [[CONT3:%.*]]
|
||||
; CHECK: cont3:
|
||||
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i32 [[SHIFTED]], 65536
|
||||
; CHECK-NEXT: br label [[OUT]]
|
||||
; CHECK: out:
|
||||
; CHECK-NEXT: [[RET:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ true, [[CONT1]] ], [ [[CMP3]], [[CONT3]] ]
|
||||
; CHECK-NEXT: [[RET:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ true, [[CONT1]] ], [ [[CMP3]], [[CONT2]] ]
|
||||
; CHECK-NEXT: ret i1 [[RET]]
|
||||
;
|
||||
entry:
|
||||
|
|
@ -232,14 +215,11 @@ cont1:
|
|||
|
||||
cont2:
|
||||
%shifted = shl i32 %x, %y
|
||||
br label %cont3
|
||||
|
||||
cont3:
|
||||
%cmp3 = icmp ult i32 %shifted, 65536
|
||||
br label %out
|
||||
|
||||
out:
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont3 ]
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]
|
||||
ret i1 %ret
|
||||
}
|
||||
|
||||
|
|
@ -252,12 +232,10 @@ define i1 @test7(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: br label [[CONT:%.*]]
|
||||
; CHECK: cont:
|
||||
; CHECK-NEXT: [[RES:%.*]] = icmp sge i32 [[ADD]], 0
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]
|
||||
; CHECK-NEXT: ret i1 [[IV]]
|
||||
;
|
||||
begin:
|
||||
|
|
@ -268,14 +246,11 @@ begin:
|
|||
|
||||
bb:
|
||||
%add = add i32 %a, %b
|
||||
br label %cont
|
||||
|
||||
cont:
|
||||
%res = icmp sge i32 %add, 0
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %cont ]
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %bb ]
|
||||
ret i1 %iv
|
||||
}
|
||||
|
||||
|
|
@ -288,8 +263,6 @@ define i1 @test8(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: br label [[CONT:%.*]]
|
||||
; CHECK: cont:
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -302,14 +275,11 @@ begin:
|
|||
|
||||
bb:
|
||||
%add = add nsw i32 %a, %b
|
||||
br label %cont
|
||||
|
||||
cont:
|
||||
%res = icmp sge i32 %add, 0
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %cont ]
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %bb ]
|
||||
ret i1 %iv
|
||||
}
|
||||
|
||||
|
|
@ -320,12 +290,10 @@ define i1 @test10(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A]], [[B:%.*]]
|
||||
; CHECK-NEXT: br label [[CONT:%.*]]
|
||||
; CHECK: cont:
|
||||
; CHECK-NEXT: [[RES:%.*]] = icmp uge i32 [[ADD]], -256
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]
|
||||
; CHECK-NEXT: ret i1 [[IV]]
|
||||
;
|
||||
begin:
|
||||
|
|
@ -334,14 +302,11 @@ begin:
|
|||
|
||||
bb:
|
||||
%add = add i32 %a, %b
|
||||
br label %cont
|
||||
|
||||
cont:
|
||||
%res = icmp uge i32 %add, 4294967040
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %cont ]
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %bb ]
|
||||
ret i1 %iv
|
||||
}
|
||||
|
||||
|
|
@ -352,8 +317,6 @@ define i1 @test11(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], [[B:%.*]]
|
||||
; CHECK-NEXT: br label [[CONT:%.*]]
|
||||
; CHECK: cont:
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -364,14 +327,11 @@ begin:
|
|||
|
||||
bb:
|
||||
%add = add nuw i32 %a, %b
|
||||
br label %cont
|
||||
|
||||
cont:
|
||||
%res = icmp uge i32 %add, 4294967040
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %cont ]
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %bb ]
|
||||
ret i1 %iv
|
||||
}
|
||||
|
||||
|
|
@ -415,12 +375,10 @@ define i1 @test14(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: br label [[CONT:%.*]]
|
||||
; CHECK: cont:
|
||||
; CHECK-NEXT: [[RES:%.*]] = icmp sge i32 [[SUB]], 0
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]
|
||||
; CHECK-NEXT: ret i1 [[IV]]
|
||||
;
|
||||
begin:
|
||||
|
|
@ -431,14 +389,11 @@ begin:
|
|||
|
||||
bb:
|
||||
%sub = sub i32 %a, %b
|
||||
br label %cont
|
||||
|
||||
cont:
|
||||
%res = icmp sge i32 %sub, 0
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %cont ]
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %bb ]
|
||||
ret i1 %iv
|
||||
}
|
||||
|
||||
|
|
@ -451,12 +406,10 @@ define i1 @test15(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: br label [[CONT:%.*]]
|
||||
; CHECK: cont:
|
||||
; CHECK-NEXT: [[RES:%.*]] = icmp sge i32 [[SUB]], 0
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]
|
||||
; CHECK-NEXT: ret i1 [[IV]]
|
||||
;
|
||||
begin:
|
||||
|
|
@ -467,14 +420,11 @@ begin:
|
|||
|
||||
bb:
|
||||
%sub = sub nsw i32 %a, %b
|
||||
br label %cont
|
||||
|
||||
cont:
|
||||
%res = icmp sge i32 %sub, 0
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %cont ]
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %bb ]
|
||||
ret i1 %iv
|
||||
}
|
||||
|
||||
|
|
@ -487,8 +437,6 @@ define i1 @test16(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: br label [[CONT:%.*]]
|
||||
; CHECK: cont:
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -501,14 +449,11 @@ begin:
|
|||
|
||||
bb:
|
||||
%sub = sub nuw i32 %a, %b
|
||||
br label %cont
|
||||
|
||||
cont:
|
||||
%res = icmp sge i32 %sub, 0
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %cont ]
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %bb ]
|
||||
ret i1 %iv
|
||||
}
|
||||
|
||||
|
|
@ -521,12 +466,10 @@ define i1 @test17(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: br label [[CONT:%.*]]
|
||||
; CHECK: cont:
|
||||
; CHECK-NEXT: [[RES:%.*]] = icmp sle i32 [[SUB]], 0
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]
|
||||
; CHECK-NEXT: ret i1 [[IV]]
|
||||
;
|
||||
begin:
|
||||
|
|
@ -537,14 +480,11 @@ begin:
|
|||
|
||||
bb:
|
||||
%sub = sub i32 %a, %b
|
||||
br label %cont
|
||||
|
||||
cont:
|
||||
%res = icmp sle i32 %sub, 0
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %cont ]
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %bb ]
|
||||
ret i1 %iv
|
||||
}
|
||||
|
||||
|
|
@ -557,12 +497,10 @@ define i1 @test18(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub nuw i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: br label [[CONT:%.*]]
|
||||
; CHECK: cont:
|
||||
; CHECK-NEXT: [[RES:%.*]] = icmp sle i32 [[SUB]], 0
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[BB]] ]
|
||||
; CHECK-NEXT: ret i1 [[IV]]
|
||||
;
|
||||
begin:
|
||||
|
|
@ -573,14 +511,11 @@ begin:
|
|||
|
||||
bb:
|
||||
%sub = sub nuw i32 %a, %b
|
||||
br label %cont
|
||||
|
||||
cont:
|
||||
%res = icmp sle i32 %sub, 0
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %cont ]
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %bb ]
|
||||
ret i1 %iv
|
||||
}
|
||||
|
||||
|
|
@ -593,8 +528,6 @@ define i1 @test19(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]
|
||||
; CHECK-NEXT: br label [[CONT:%.*]]
|
||||
; CHECK: cont:
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -607,14 +540,11 @@ begin:
|
|||
|
||||
bb:
|
||||
%sub = sub nsw i32 %a, %b
|
||||
br label %cont
|
||||
|
||||
cont:
|
||||
%res = icmp sle i32 %sub, 0
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %cont ]
|
||||
%iv = phi i1 [ true, %begin ], [ %res, %bb ]
|
||||
ret i1 %iv
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -11,17 +11,12 @@ declare void @use(i1)
|
|||
define void @test_umin(i32 %x) {
|
||||
; CHECK-LABEL: @test_umin(
|
||||
; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 10)
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: call void @use(i1 true)
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp ult i32 [[M]], 10
|
||||
; CHECK-NEXT: call void @use(i1 [[C2]])
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%m = call i32 @llvm.umin.i32(i32 %x, i32 10)
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp ule i32 %m, 10
|
||||
call void @use(i1 %c1)
|
||||
%c2 = icmp ult i32 %m, 10
|
||||
|
|
@ -32,17 +27,12 @@ split:
|
|||
define void @test_umax(i32 %x) {
|
||||
; CHECK-LABEL: @test_umax(
|
||||
; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 10)
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: call void @use(i1 true)
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp ugt i32 [[M]], 10
|
||||
; CHECK-NEXT: call void @use(i1 [[C2]])
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%m = call i32 @llvm.umax.i32(i32 %x, i32 10)
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp uge i32 %m, 10
|
||||
call void @use(i1 %c1)
|
||||
%c2 = icmp ugt i32 %m, 10
|
||||
|
|
@ -53,17 +43,12 @@ split:
|
|||
define void @test_smin(i32 %x) {
|
||||
; CHECK-LABEL: @test_smin(
|
||||
; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 10)
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: call void @use(i1 true)
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[M]], 10
|
||||
; CHECK-NEXT: call void @use(i1 [[C2]])
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%m = call i32 @llvm.smin.i32(i32 %x, i32 10)
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp sle i32 %m, 10
|
||||
call void @use(i1 %c1)
|
||||
%c2 = icmp slt i32 %m, 10
|
||||
|
|
@ -74,17 +59,12 @@ split:
|
|||
define void @test_smax(i32 %x) {
|
||||
; CHECK-LABEL: @test_smax(
|
||||
; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 10)
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: call void @use(i1 true)
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[M]], 10
|
||||
; CHECK-NEXT: call void @use(i1 [[C2]])
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%m = call i32 @llvm.smax.i32(i32 %x, i32 10)
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp sge i32 %m, 10
|
||||
call void @use(i1 %c1)
|
||||
%c2 = icmp sgt i32 %m, 10
|
||||
|
|
@ -94,10 +74,8 @@ split:
|
|||
|
||||
define void @test_abs1(i32* %p) {
|
||||
; CHECK-LABEL: @test_abs1(
|
||||
; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4, !range !0
|
||||
; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG0:!range !.*]]
|
||||
; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X]], i1 false)
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: call void @use(i1 true)
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp ult i32 [[A]], 15
|
||||
; CHECK-NEXT: call void @use(i1 [[C2]])
|
||||
|
|
@ -105,9 +83,6 @@ define void @test_abs1(i32* %p) {
|
|||
;
|
||||
%x = load i32, i32* %p, !range !{i32 -15, i32 10}
|
||||
%a = call i32 @llvm.abs.i32(i32 %x, i1 false)
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp ule i32 %a, 15
|
||||
call void @use(i1 %c1)
|
||||
%c2 = icmp ult i32 %a, 15
|
||||
|
|
@ -118,17 +93,12 @@ split:
|
|||
define void @test_abs2(i32 %x) {
|
||||
; CHECK-LABEL: @test_abs2(
|
||||
; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: call void @use(i1 true)
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp ult i32 [[A]], -2147483648
|
||||
; CHECK-NEXT: call void @use(i1 [[C2]])
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%a = call i32 @llvm.abs.i32(i32 %x, i1 false)
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp ule i32 %a, 2147483648
|
||||
call void @use(i1 %c1)
|
||||
%c2 = icmp ult i32 %a, 2147483648
|
||||
|
|
@ -139,17 +109,12 @@ split:
|
|||
define void @test_abs3(i32 %x) {
|
||||
; CHECK-LABEL: @test_abs3(
|
||||
; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: call void @use(i1 true)
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[A]], 0
|
||||
; CHECK-NEXT: call void @use(i1 [[C2]])
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
%a = call i32 @llvm.abs.i32(i32 %x, i1 true)
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp sge i32 %a, 0
|
||||
call void @use(i1 %c1)
|
||||
%c2 = icmp sgt i32 %a, 0
|
||||
|
|
|
|||
|
|
@ -13,12 +13,12 @@ define i1 @uadd_ov_false(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @uadd_ov_false(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[X:%.*]], i8 100)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp ugt i8 [[X]], -102
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -45,12 +45,12 @@ define i1 @uadd_ov_true(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @uadd_ov_true(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[X:%.*]], i8 100)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
|
||||
; CHECK: overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp ugt i8 [[X]], -100
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -77,12 +77,12 @@ define i1 @sadd_ov_false(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @sadd_ov_false(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[X:%.*]], i8 100)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp sgt i8 [[X]], 26
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -109,12 +109,12 @@ define i1 @sadd_ov_true(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @sadd_ov_true(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[X:%.*]], i8 100)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
|
||||
; CHECK: overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp sgt i8 [[X]], 28
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -141,12 +141,12 @@ define i1 @usub_ov_false(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @usub_ov_false(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[X:%.*]], i8 100)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp ult i8 [[X]], 101
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -173,12 +173,12 @@ define i1 @usub_ov_true(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @usub_ov_true(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[X:%.*]], i8 100)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
|
||||
; CHECK: overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp ult i8 [[X]], 99
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -205,12 +205,12 @@ define i1 @ssub_ov_false(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @ssub_ov_false(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[X:%.*]], i8 100)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp slt i8 [[X]], -27
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -237,12 +237,12 @@ define i1 @ssub_ov_true(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @ssub_ov_true(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[X:%.*]], i8 100)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
|
||||
; CHECK: overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp slt i8 [[X]], -29
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -269,12 +269,12 @@ define i1 @umul_ov_false(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @umul_ov_false(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[X:%.*]], i8 10)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp ugt i8 [[X]], 24
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -301,12 +301,12 @@ define i1 @umul_ov_true(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @umul_ov_true(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[X:%.*]], i8 10)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
|
||||
; CHECK: overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp ugt i8 [[X]], 26
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -334,12 +334,12 @@ define i1 @smul_ov_false_bound1(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @smul_ov_false_bound1(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[X:%.*]], i8 10)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp slt i8 [[X]], -11
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -366,12 +366,12 @@ define i1 @smul_ov_false_bound2(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @smul_ov_false_bound2(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[X:%.*]], i8 10)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp sgt i8 [[X]], 11
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -399,12 +399,12 @@ define i1 @smul_ov_true_bound1(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @smul_ov_true_bound1(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[X:%.*]], i8 10)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
|
||||
; CHECK: overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X]], -13
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -431,12 +431,12 @@ define i1 @smul_ov_true_bound2(i8 %x, i8* %px, i1* %pc) {
|
|||
; CHECK-LABEL: @smul_ov_true_bound2(
|
||||
; CHECK-NEXT: [[VAL_OV:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[X:%.*]], i8 10)
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]]
|
||||
; CHECK-NEXT: store i8 [[VAL]], i8* [[PX:%.*]], align 1
|
||||
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
|
||||
; CHECK-NEXT: br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
|
||||
; CHECK: overflow:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X]], 13
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -466,10 +466,8 @@ define i1 @uadd_val(i8 %x, i1* %pc) {
|
|||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp ugt i8 [[VAL]], 100
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -481,9 +479,6 @@ define i1 @uadd_val(i8 %x, i1* %pc) {
|
|||
|
||||
no_overflow:
|
||||
%val = extractvalue {i8, i1} %val_ov, 0
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp ugt i8 %val, 100
|
||||
store i1 %c1, i1* %pc
|
||||
%c2 = icmp uge i8 %val, 100
|
||||
|
|
@ -501,10 +496,8 @@ define i1 @sadd_val(i8 %x, i1* %pc) {
|
|||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp sgt i8 [[VAL]], -28
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -516,9 +509,6 @@ define i1 @sadd_val(i8 %x, i1* %pc) {
|
|||
|
||||
no_overflow:
|
||||
%val = extractvalue {i8, i1} %val_ov, 0
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp sgt i8 %val, -28
|
||||
store i1 %c1, i1* %pc
|
||||
%c2 = icmp sge i8 %val, -28
|
||||
|
|
@ -536,10 +526,8 @@ define i1 @usub_val(i8 %x, i1* %pc) {
|
|||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp ult i8 [[VAL]], -101
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -551,9 +539,6 @@ define i1 @usub_val(i8 %x, i1* %pc) {
|
|||
|
||||
no_overflow:
|
||||
%val = extractvalue {i8, i1} %val_ov, 0
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp ult i8 %val, 155
|
||||
store i1 %c1, i1* %pc
|
||||
%c2 = icmp ule i8 %val, 155
|
||||
|
|
@ -571,10 +556,8 @@ define i1 @ssub_val(i8 %x, i1* %pc) {
|
|||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp slt i8 [[VAL]], 27
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -586,9 +569,6 @@ define i1 @ssub_val(i8 %x, i1* %pc) {
|
|||
|
||||
no_overflow:
|
||||
%val = extractvalue {i8, i1} %val_ov, 0
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp slt i8 %val, 27
|
||||
store i1 %c1, i1* %pc
|
||||
%c2 = icmp sle i8 %val, 27
|
||||
|
|
@ -606,10 +586,8 @@ define i1 @umul_val(i8 %x, i1* %pc) {
|
|||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp ult i8 [[VAL]], -6
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -621,9 +599,6 @@ define i1 @umul_val(i8 %x, i1* %pc) {
|
|||
|
||||
no_overflow:
|
||||
%val = extractvalue {i8, i1} %val_ov, 0
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp ult i8 %val, 250
|
||||
store i1 %c1, i1* %pc
|
||||
%c2 = icmp ule i8 %val, 250
|
||||
|
|
@ -641,10 +616,8 @@ define i1 @smul_val_bound1(i8 %x, i1* %pc) {
|
|||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp slt i8 [[VAL]], 120
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -656,9 +629,6 @@ define i1 @smul_val_bound1(i8 %x, i1* %pc) {
|
|||
|
||||
no_overflow:
|
||||
%val = extractvalue {i8, i1} %val_ov, 0
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp slt i8 %val, 120
|
||||
store i1 %c1, i1* %pc
|
||||
%c2 = icmp sle i8 %val, 120
|
||||
|
|
@ -676,10 +646,8 @@ define i1 @smul_val_bound2(i8 %x, i1* %pc) {
|
|||
; CHECK-NEXT: br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
|
||||
; CHECK: no_overflow:
|
||||
; CHECK-NEXT: [[VAL:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 0
|
||||
; CHECK-NEXT: br label [[SPLIT:%.*]]
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp sgt i8 [[VAL]], -120
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]]
|
||||
; CHECK-NEXT: store i1 [[C1]], i1* [[PC:%.*]], align 1
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: trap:
|
||||
; CHECK-NEXT: call void @llvm.trap()
|
||||
|
|
@ -691,9 +659,6 @@ define i1 @smul_val_bound2(i8 %x, i1* %pc) {
|
|||
|
||||
no_overflow:
|
||||
%val = extractvalue {i8, i1} %val_ov, 0
|
||||
br label %split
|
||||
|
||||
split:
|
||||
%c1 = icmp sgt i8 %val, -120
|
||||
store i1 %c1, i1* %pc
|
||||
%c2 = icmp sge i8 %val, -120
|
||||
|
|
|
|||
|
|
@ -940,8 +940,6 @@ define i1 @sadd_and_cmp(i32 %x, i32 %y) #0 {
|
|||
; CHECK-NEXT: [[RES1:%.*]] = add nsw i32 [[X]], [[Y]]
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 undef, i1 false }, i32 [[RES1]], 0
|
||||
; CHECK-NEXT: [[ADD:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0
|
||||
; CHECK-NEXT: br label [[CONT3:%.*]]
|
||||
; CHECK: cont3:
|
||||
; CHECK-NEXT: br label [[OUT]]
|
||||
; CHECK: out:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -960,15 +958,12 @@ cont2:
|
|||
; x = [-9,10), y = [-9,10)
|
||||
%res = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %x, i32 %y)
|
||||
%add = extractvalue { i32, i1 } %res, 0
|
||||
br label %cont3
|
||||
|
||||
cont3:
|
||||
; add = [-18,19)
|
||||
%cmp3 = icmp slt i32 %add, 19
|
||||
br label %out
|
||||
|
||||
out:
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont3 ]
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]
|
||||
ret i1 %ret
|
||||
}
|
||||
|
||||
|
|
@ -985,8 +980,6 @@ define i1 @uadd_and_cmp(i32 %x, i32 %y) #0 {
|
|||
; CHECK-NEXT: [[RES1:%.*]] = add nuw nsw i32 [[X]], [[Y]]
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 undef, i1 false }, i32 [[RES1]], 0
|
||||
; CHECK-NEXT: [[ADD:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0
|
||||
; CHECK-NEXT: br label [[CONT3:%.*]]
|
||||
; CHECK: cont3:
|
||||
; CHECK-NEXT: br label [[OUT]]
|
||||
; CHECK: out:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -1002,14 +995,11 @@ cont1:
|
|||
cont2:
|
||||
%res = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %x, i32 %y)
|
||||
%add = extractvalue { i32, i1 } %res, 0
|
||||
br label %cont3
|
||||
|
||||
cont3:
|
||||
%cmp3 = icmp ult i32 %add, 19
|
||||
br label %out
|
||||
|
||||
out:
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont3 ]
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]
|
||||
ret i1 %ret
|
||||
}
|
||||
|
||||
|
|
@ -1026,8 +1016,6 @@ define i1 @ssub_and_cmp(i32 %x, i32 %y) #0 {
|
|||
; CHECK-NEXT: [[RES1:%.*]] = sub nuw nsw i32 [[OFFSET]], [[Y]]
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 undef, i1 false }, i32 [[RES1]], 0
|
||||
; CHECK-NEXT: [[SUB:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0
|
||||
; CHECK-NEXT: br label [[CONT3:%.*]]
|
||||
; CHECK: cont3:
|
||||
; CHECK-NEXT: br label [[OUT]]
|
||||
; CHECK: out:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -1045,14 +1033,11 @@ cont2:
|
|||
; x = [0,10), y = [0,10), offset = [9,19)
|
||||
%res = tail call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %offset, i32 %y)
|
||||
%sub = extractvalue { i32, i1 } %res, 0
|
||||
br label %cont3
|
||||
|
||||
cont3:
|
||||
%cmp3 = icmp ult i32 %sub, 19
|
||||
br label %out
|
||||
|
||||
out:
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont3 ]
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]
|
||||
ret i1 %ret
|
||||
}
|
||||
|
||||
|
|
@ -1069,8 +1054,6 @@ define i1 @usub_and_cmp(i32 %x, i32 %y) #0 {
|
|||
; CHECK-NEXT: [[RES1:%.*]] = sub nuw nsw i32 [[OFFSET]], [[Y]]
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 undef, i1 false }, i32 [[RES1]], 0
|
||||
; CHECK-NEXT: [[SUB:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0
|
||||
; CHECK-NEXT: br label [[CONT3:%.*]]
|
||||
; CHECK: cont3:
|
||||
; CHECK-NEXT: br label [[OUT]]
|
||||
; CHECK: out:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -1088,14 +1071,11 @@ cont2:
|
|||
; x = [0,10), y = [0,10), offset = [9,19)
|
||||
%res = tail call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %offset, i32 %y)
|
||||
%sub = extractvalue { i32, i1 } %res, 0
|
||||
br label %cont3
|
||||
|
||||
cont3:
|
||||
%cmp3 = icmp ult i32 %sub, 19
|
||||
br label %out
|
||||
|
||||
out:
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont3 ]
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]
|
||||
ret i1 %ret
|
||||
}
|
||||
|
||||
|
|
@ -1113,8 +1093,6 @@ define i1 @smul_and_cmp(i32 %x, i32 %y) #0 {
|
|||
; CHECK-NEXT: [[RES1:%.*]] = mul nsw i32 [[X]], [[Y]]
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 undef, i1 false }, i32 [[RES1]], 0
|
||||
; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0
|
||||
; CHECK-NEXT: br label [[CONT3:%.*]]
|
||||
; CHECK: cont3:
|
||||
; CHECK-NEXT: br label [[OUT]]
|
||||
; CHECK: out:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -1133,16 +1111,13 @@ cont2:
|
|||
; x = [-9,10), y = [-9,10)
|
||||
%res = tail call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %x, i32 %y)
|
||||
%mul = extractvalue { i32, i1 } %res, 0
|
||||
br label %cont3
|
||||
|
||||
cont3:
|
||||
%cmp3 = icmp sle i32 %mul, 81
|
||||
%cmp4 = icmp sge i32 %mul, -81
|
||||
%cmp5 = and i1 %cmp3, %cmp4
|
||||
br label %out
|
||||
|
||||
out:
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp5, %cont3 ]
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp5, %cont2 ]
|
||||
ret i1 %ret
|
||||
}
|
||||
|
||||
|
|
@ -1158,8 +1133,6 @@ define i1 @umul_and_cmp(i32 %x, i32 %y) #0 {
|
|||
; CHECK-NEXT: [[RES1:%.*]] = mul nuw nsw i32 [[X]], [[Y]]
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { i32, i1 } { i32 undef, i1 false }, i32 [[RES1]], 0
|
||||
; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0
|
||||
; CHECK-NEXT: br label [[CONT3:%.*]]
|
||||
; CHECK: cont3:
|
||||
; CHECK-NEXT: br label [[OUT]]
|
||||
; CHECK: out:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -1175,13 +1148,10 @@ cont1:
|
|||
cont2:
|
||||
%res = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %x, i32 %y)
|
||||
%mul = extractvalue { i32, i1 } %res, 0
|
||||
br label %cont3
|
||||
|
||||
cont3:
|
||||
%cmp3 = icmp ule i32 %mul, 9801
|
||||
br label %out
|
||||
|
||||
out:
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont3 ]
|
||||
%ret = phi i1 [ true, %entry], [ true, %cont1 ], [ %cmp3, %cont2 ]
|
||||
ret i1 %ret
|
||||
}
|
||||
|
|
|
|||
|
|
@ -104,13 +104,11 @@ if.end:
|
|||
|
||||
define i1 @test1(i32* %p, i1 %unknown) {
|
||||
; CHECK-LABEL: @test1(
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]]
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]], align 4
|
||||
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[PVAL]], 255
|
||||
; CHECK-NEXT: br i1 [[CMP1]], label [[NEXT:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: next:
|
||||
; CHECK-NEXT: [[MIN:%.*]] = select i1 [[UNKNOWN:%.*]], i32 [[PVAL]], i32 5
|
||||
; CHECK-NEXT: br label [[NEXT2:%.*]]
|
||||
; CHECK: next2:
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -121,9 +119,6 @@ define i1 @test1(i32* %p, i1 %unknown) {
|
|||
|
||||
next:
|
||||
%min = select i1 %unknown, i32 %pval, i32 5
|
||||
;; TODO: This pointless branch shouldn't be neccessary
|
||||
br label %next2
|
||||
next2:
|
||||
%res = icmp eq i32 %min, 255
|
||||
ret i1 %res
|
||||
|
||||
|
|
@ -134,13 +129,11 @@ exit:
|
|||
; Check that we take a conservative meet
|
||||
define i1 @test2(i32* %p, i32 %qval, i1 %unknown) {
|
||||
; CHECK-LABEL: @test2(
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]]
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]], align 4
|
||||
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[PVAL]], 255
|
||||
; CHECK-NEXT: br i1 [[CMP1]], label [[NEXT:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: next:
|
||||
; CHECK-NEXT: [[MIN:%.*]] = select i1 [[UNKNOWN:%.*]], i32 [[PVAL]], i32 [[QVAL:%.*]]
|
||||
; CHECK-NEXT: br label [[NEXT2:%.*]]
|
||||
; CHECK: next2:
|
||||
; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[MIN]], 255
|
||||
; CHECK-NEXT: ret i1 [[RES]]
|
||||
; CHECK: exit:
|
||||
|
|
@ -152,9 +145,6 @@ define i1 @test2(i32* %p, i32 %qval, i1 %unknown) {
|
|||
|
||||
next:
|
||||
%min = select i1 %unknown, i32 %pval, i32 %qval
|
||||
;; TODO: This pointless branch shouldn't be neccessary
|
||||
br label %next2
|
||||
next2:
|
||||
%res = icmp eq i32 %min, 255
|
||||
ret i1 %res
|
||||
|
||||
|
|
@ -165,13 +155,11 @@ exit:
|
|||
; Same as @test2, but for the opposite select input
|
||||
define i1 @test3(i32* %p, i32 %qval, i1 %unknown) {
|
||||
; CHECK-LABEL: @test3(
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]]
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]], align 4
|
||||
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[PVAL]], 255
|
||||
; CHECK-NEXT: br i1 [[CMP1]], label [[NEXT:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: next:
|
||||
; CHECK-NEXT: [[MIN:%.*]] = select i1 [[UNKNOWN:%.*]], i32 [[QVAL:%.*]], i32 [[PVAL]]
|
||||
; CHECK-NEXT: br label [[NEXT2:%.*]]
|
||||
; CHECK: next2:
|
||||
; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[MIN]], 255
|
||||
; CHECK-NEXT: ret i1 [[RES]]
|
||||
; CHECK: exit:
|
||||
|
|
@ -183,9 +171,6 @@ define i1 @test3(i32* %p, i32 %qval, i1 %unknown) {
|
|||
|
||||
next:
|
||||
%min = select i1 %unknown, i32 %qval, i32 %pval
|
||||
;; TODO: This pointless branch shouldn't be neccessary
|
||||
br label %next2
|
||||
next2:
|
||||
%res = icmp eq i32 %min, 255
|
||||
ret i1 %res
|
||||
|
||||
|
|
@ -199,13 +184,11 @@ exit:
|
|||
; and non-constants) are actually represented as constant-ranges.
|
||||
define i1 @test4(i32* %p, i32 %qval, i1 %unknown) {
|
||||
; CHECK-LABEL: @test4(
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]]
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]], align 4
|
||||
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[PVAL]], 255
|
||||
; CHECK-NEXT: br i1 [[CMP1]], label [[NEXT:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: next:
|
||||
; CHECK-NEXT: [[MIN:%.*]] = select i1 [[UNKNOWN:%.*]], double 1.000000e+00, double 0.000000e+00
|
||||
; CHECK-NEXT: br label [[NEXT2:%.*]]
|
||||
; CHECK: next2:
|
||||
; CHECK-NEXT: [[RES:%.*]] = fcmp oeq double [[MIN]], 3.000000e+02
|
||||
; CHECK-NEXT: ret i1 [[RES]]
|
||||
; CHECK: exit:
|
||||
|
|
@ -217,9 +200,6 @@ define i1 @test4(i32* %p, i32 %qval, i1 %unknown) {
|
|||
|
||||
next:
|
||||
%min = select i1 %unknown, double 1.0, double 0.0
|
||||
;; TODO: This pointless branch shouldn't be neccessary
|
||||
br label %next2
|
||||
next2:
|
||||
%res = fcmp oeq double %min, 300.0
|
||||
ret i1 %res
|
||||
|
||||
|
|
@ -232,14 +212,12 @@ exit:
|
|||
|
||||
define i1 @test5(i32* %p, i1 %unknown) {
|
||||
; CHECK-LABEL: @test5(
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]]
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]], align 4
|
||||
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[PVAL]], 255
|
||||
; CHECK-NEXT: br i1 [[CMP1]], label [[NEXT:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: next:
|
||||
; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[PVAL]], 0
|
||||
; CHECK-NEXT: [[MIN:%.*]] = select i1 [[COND]], i32 [[PVAL]], i32 5
|
||||
; CHECK-NEXT: br label [[NEXT2:%.*]]
|
||||
; CHECK: next2:
|
||||
; CHECK-NEXT: ret i1 false
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -251,9 +229,6 @@ define i1 @test5(i32* %p, i1 %unknown) {
|
|||
next:
|
||||
%cond = icmp sgt i32 %pval, 0
|
||||
%min = select i1 %cond, i32 %pval, i32 5
|
||||
;; TODO: This pointless branch shouldn't be neccessary
|
||||
br label %next2
|
||||
next2:
|
||||
%res = icmp eq i32 %min, -1
|
||||
ret i1 %res
|
||||
|
||||
|
|
@ -263,14 +238,12 @@ exit:
|
|||
|
||||
define i1 @test6(i32* %p, i1 %unknown) {
|
||||
; CHECK-LABEL: @test6(
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]]
|
||||
; CHECK-NEXT: [[PVAL:%.*]] = load i32, i32* [[P:%.*]], align 4
|
||||
; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[PVAL]], 255
|
||||
; CHECK-NEXT: br i1 [[CMP1]], label [[NEXT:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: next:
|
||||
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[PVAL]], 254
|
||||
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 [[PVAL]], i32 1
|
||||
; CHECK-NEXT: br label [[NEXT2:%.*]]
|
||||
; CHECK: next2:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret i1 true
|
||||
|
|
@ -282,9 +255,6 @@ define i1 @test6(i32* %p, i1 %unknown) {
|
|||
next:
|
||||
%cond = icmp ne i32 %pval, 254
|
||||
%sel = select i1 %cond, i32 %pval, i32 1
|
||||
;; TODO: This pointless branch shouldn't be neccessary
|
||||
br label %next2
|
||||
next2:
|
||||
%res = icmp slt i32 %sel, 254
|
||||
ret i1 %res
|
||||
|
||||
|
|
|
|||
|
|
@ -149,8 +149,6 @@ define i16 @test9_narrow(i16 %x, i16 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C0]])
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp ult i16 [[Y:%.*]], 128
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C1]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[REM1_LHS_TRUNC:%.*]] = trunc i16 [[X]] to i8
|
||||
; CHECK-NEXT: [[REM1_RHS_TRUNC:%.*]] = trunc i16 [[Y]] to i8
|
||||
; CHECK-NEXT: [[REM12:%.*]] = urem i8 [[REM1_LHS_TRUNC]], [[REM1_RHS_TRUNC]]
|
||||
|
|
@ -161,9 +159,7 @@ define i16 @test9_narrow(i16 %x, i16 %y) {
|
|||
call void @llvm.assume(i1 %c0)
|
||||
%c1 = icmp ult i16 %y, 128
|
||||
call void @llvm.assume(i1 %c1)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%rem = srem i16 %x, %y
|
||||
ret i16 %rem
|
||||
}
|
||||
|
|
@ -182,8 +178,6 @@ define i64 @test11_i15_i15(i64 %x, i64 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sge i64 [[Y]], -16384
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C3]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i64 [[X]] to i16
|
||||
; CHECK-NEXT: [[DIV_RHS_TRUNC:%.*]] = trunc i64 [[Y]] to i16
|
||||
; CHECK-NEXT: [[DIV1:%.*]] = srem i16 [[DIV_LHS_TRUNC]], [[DIV_RHS_TRUNC]]
|
||||
|
|
@ -200,9 +194,7 @@ entry:
|
|||
call void @llvm.assume(i1 %c2)
|
||||
%c3 = icmp sge i64 %y, -16384
|
||||
call void @llvm.assume(i1 %c3)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i64 %x, %y
|
||||
ret i64 %div
|
||||
}
|
||||
|
|
@ -220,8 +212,6 @@ define i64 @test12_i16_i16(i64 %x, i64 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sge i64 [[Y]], -32768
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C3]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i64 [[X]] to i32
|
||||
; CHECK-NEXT: [[DIV_RHS_TRUNC:%.*]] = trunc i64 [[Y]] to i32
|
||||
; CHECK-NEXT: [[DIV1:%.*]] = srem i32 [[DIV_LHS_TRUNC]], [[DIV_RHS_TRUNC]]
|
||||
|
|
@ -238,9 +228,7 @@ entry:
|
|||
call void @llvm.assume(i1 %c2)
|
||||
%c3 = icmp sge i64 %y, -32768
|
||||
call void @llvm.assume(i1 %c3)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i64 %x, %y
|
||||
ret i64 %div
|
||||
}
|
||||
|
|
@ -255,8 +243,6 @@ define i64 @test13_i16_u15(i64 %x, i64 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C1]])
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp ule i64 [[Y:%.*]], 32767
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i64 [[X]] to i16
|
||||
; CHECK-NEXT: [[DIV_RHS_TRUNC:%.*]] = trunc i64 [[Y]] to i16
|
||||
; CHECK-NEXT: [[DIV1:%.*]] = srem i16 [[DIV_LHS_TRUNC]], [[DIV_RHS_TRUNC]]
|
||||
|
|
@ -271,9 +257,7 @@ entry:
|
|||
|
||||
%c2 = icmp ule i64 %y, 32767
|
||||
call void @llvm.assume(i1 %c2)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i64 %x, %y
|
||||
ret i64 %div
|
||||
}
|
||||
|
|
@ -291,8 +275,6 @@ define i64 @test14_i16safe_i16(i64 %x, i64 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sge i64 [[Y]], -32768
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C3]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i64 [[X]] to i16
|
||||
; CHECK-NEXT: [[DIV_RHS_TRUNC:%.*]] = trunc i64 [[Y]] to i16
|
||||
; CHECK-NEXT: [[DIV1:%.*]] = srem i16 [[DIV_LHS_TRUNC]], [[DIV_RHS_TRUNC]]
|
||||
|
|
@ -309,9 +291,7 @@ entry:
|
|||
call void @llvm.assume(i1 %c2)
|
||||
%c3 = icmp sge i64 %y, -32768
|
||||
call void @llvm.assume(i1 %c3)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i64 %x, %y
|
||||
ret i64 %div
|
||||
}
|
||||
|
|
@ -326,8 +306,6 @@ define i64 @test15_i16safe_u15(i64 %x, i64 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C1]])
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp ule i64 [[Y:%.*]], 32767
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i64 [[X]] to i16
|
||||
; CHECK-NEXT: [[DIV_RHS_TRUNC:%.*]] = trunc i64 [[Y]] to i16
|
||||
; CHECK-NEXT: [[DIV1:%.*]] = srem i16 [[DIV_LHS_TRUNC]], [[DIV_RHS_TRUNC]]
|
||||
|
|
@ -342,9 +320,7 @@ entry:
|
|||
|
||||
%c2 = icmp ule i64 %y, 32767
|
||||
call void @llvm.assume(i1 %c2)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i64 %x, %y
|
||||
ret i64 %div
|
||||
}
|
||||
|
|
@ -361,8 +337,6 @@ define i64 @test16_i4_i4(i64 %x, i64 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sge i64 [[Y]], -4
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C3]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i64 [[X]] to i8
|
||||
; CHECK-NEXT: [[DIV_RHS_TRUNC:%.*]] = trunc i64 [[Y]] to i8
|
||||
; CHECK-NEXT: [[DIV1:%.*]] = srem i8 [[DIV_LHS_TRUNC]], [[DIV_RHS_TRUNC]]
|
||||
|
|
@ -379,9 +353,7 @@ entry:
|
|||
call void @llvm.assume(i1 %c2)
|
||||
%c3 = icmp sge i64 %y, -4
|
||||
call void @llvm.assume(i1 %c3)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i64 %x, %y
|
||||
ret i64 %div
|
||||
}
|
||||
|
|
@ -398,8 +370,6 @@ define i64 @test17_i9_i9(i64 %x, i64 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sge i64 [[Y]], -256
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C3]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i64 [[X]] to i16
|
||||
; CHECK-NEXT: [[DIV_RHS_TRUNC:%.*]] = trunc i64 [[Y]] to i16
|
||||
; CHECK-NEXT: [[DIV1:%.*]] = srem i16 [[DIV_LHS_TRUNC]], [[DIV_RHS_TRUNC]]
|
||||
|
|
@ -416,9 +386,7 @@ entry:
|
|||
call void @llvm.assume(i1 %c2)
|
||||
%c3 = icmp sge i64 %y, -256
|
||||
call void @llvm.assume(i1 %c3)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i64 %x, %y
|
||||
ret i64 %div
|
||||
}
|
||||
|
|
@ -435,8 +403,6 @@ define i9 @test18_i9_i9(i9 %x, i9 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sge i9 [[Y]], -256
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C3]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV:%.*]] = srem i9 [[X]], [[Y]]
|
||||
; CHECK-NEXT: ret i9 [[DIV]]
|
||||
;
|
||||
|
|
@ -450,9 +416,7 @@ entry:
|
|||
call void @llvm.assume(i1 %c2)
|
||||
%c3 = icmp sge i9 %y, -256
|
||||
call void @llvm.assume(i1 %c3)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i9 %x, %y
|
||||
ret i9 %div
|
||||
}
|
||||
|
|
@ -467,8 +431,6 @@ define i10 @test19_i10_i10(i10 %x, i10 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sge i10 [[Y]], -256
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C3]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV:%.*]] = srem i10 [[X]], [[Y]]
|
||||
; CHECK-NEXT: ret i10 [[DIV]]
|
||||
;
|
||||
|
|
@ -482,9 +444,7 @@ entry:
|
|||
call void @llvm.assume(i1 %c2)
|
||||
%c3 = icmp sge i10 %y, -256
|
||||
call void @llvm.assume(i1 %c3)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i10 %x, %y
|
||||
ret i10 %div
|
||||
}
|
||||
|
|
@ -501,8 +461,6 @@ define i64 @test20_i16_i18(i64 %x, i64 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sge i64 [[Y]], -65536
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C3]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i64 [[X]] to i32
|
||||
; CHECK-NEXT: [[DIV_RHS_TRUNC:%.*]] = trunc i64 [[Y]] to i32
|
||||
; CHECK-NEXT: [[DIV1:%.*]] = srem i32 [[DIV_LHS_TRUNC]], [[DIV_RHS_TRUNC]]
|
||||
|
|
@ -519,9 +477,7 @@ entry:
|
|||
call void @llvm.assume(i1 %c2)
|
||||
%c3 = icmp sge i64 %y, -65536
|
||||
call void @llvm.assume(i1 %c3)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i64 %x, %y
|
||||
ret i64 %div
|
||||
}
|
||||
|
|
@ -536,8 +492,6 @@ define i64 @test21_i18_i16(i64 %x, i64 %y) {
|
|||
; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sge i64 [[Y]], -16384
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[C3]])
|
||||
; CHECK-NEXT: br label [[END:%.*]]
|
||||
; CHECK: end:
|
||||
; CHECK-NEXT: [[DIV_LHS_TRUNC:%.*]] = trunc i64 [[X]] to i32
|
||||
; CHECK-NEXT: [[DIV_RHS_TRUNC:%.*]] = trunc i64 [[Y]] to i32
|
||||
; CHECK-NEXT: [[DIV1:%.*]] = srem i32 [[DIV_LHS_TRUNC]], [[DIV_RHS_TRUNC]]
|
||||
|
|
@ -554,9 +508,7 @@ entry:
|
|||
call void @llvm.assume(i1 %c2)
|
||||
%c3 = icmp sge i64 %y, -16384
|
||||
call void @llvm.assume(i1 %c3)
|
||||
br label %end
|
||||
|
||||
end:
|
||||
%div = srem i64 %x, %y
|
||||
ret i64 %div
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue