[X86] rotate-extract-vector.ll - use avx512bw+avx512vl target for more useful codegen checks
This is a much more realistic target than just avx512bw, which has never existed as a real world cpu target
This commit is contained in:
Simon Pilgrim
parent
6c11aebd30
commit
15bc3f81bf
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@ -1,6 +1,6 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X64
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
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; Check that under certain conditions we can factor out a rotate
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; from the following idioms:
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@ -13,9 +13,7 @@ define <4 x i32> @vroll_v4i32_extract_shl(<4 x i32> %i) {
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; CHECK-LABEL: vroll_v4i32_extract_shl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpslld $3, %xmm0, %xmm0
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; CHECK-NEXT: vprold $7, %zmm0, %zmm0
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; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: vprold $7, %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%lhs_mul = shl <4 x i32> %i, <i32 3, i32 3, i32 3, i32 3>
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%rhs_mul = shl <4 x i32> %i, <i32 10, i32 10, i32 10, i32 10>
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@ -28,8 +26,7 @@ define <4 x i64> @vrolq_v4i64_extract_shrl(<4 x i64> %i) nounwind {
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; CHECK-LABEL: vrolq_v4i64_extract_shrl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpsrlq $5, %ymm0, %ymm0
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; CHECK-NEXT: vprolq $29, %zmm0, %zmm0
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; CHECK-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
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; CHECK-NEXT: vprolq $29, %ymm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%lhs_div = lshr <4 x i64> %i, <i64 40, i64 40, i64 40, i64 40>
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%rhs_div = lshr <4 x i64> %i, <i64 5, i64 5, i64 5, i64 5>
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@ -39,13 +36,17 @@ define <4 x i64> @vrolq_v4i64_extract_shrl(<4 x i64> %i) nounwind {
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}
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define <8 x i32> @vroll_extract_mul(<8 x i32> %i) nounwind {
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; CHECK-LABEL: vroll_extract_mul:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpbroadcastd {{.*#+}} ymm1 = [10,10,10,10,10,10,10,10]
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; CHECK-NEXT: vpmulld %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: vprold $6, %zmm0, %zmm0
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; CHECK-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
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; CHECK-NEXT: ret{{[l|q]}}
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; X86-LABEL: vroll_extract_mul:
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; X86: # %bb.0:
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; X86-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %ymm0, %ymm0
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; X86-NEXT: vprold $6, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: vroll_extract_mul:
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; X64: # %bb.0:
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; X64-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0
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; X64-NEXT: vprold $6, %ymm0, %ymm0
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; X64-NEXT: retq
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%lhs_mul = mul <8 x i32> %i, <i32 640, i32 640, i32 640, i32 640, i32 640, i32 640, i32 640, i32 640>
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%rhs_mul = mul <8 x i32> %i, <i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10>
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%rhs_shift = lshr <8 x i32> %rhs_mul, <i32 26, i32 26, i32 26, i32 26, i32 26, i32 26, i32 26, i32 26>
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@ -75,10 +76,8 @@ define <2 x i64> @vrolq_extract_udiv(<2 x i64> %i) nounwind {
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; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
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; X86-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
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; X86-NEXT: vpinsrd $3, %edx, %xmm0, %xmm0
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; X86-NEXT: vprolq $57, %zmm0, %zmm0
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; X86-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
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; X86-NEXT: vprolq $57, %xmm0, %xmm0
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; X86-NEXT: addl $32, %esp
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; X86-NEXT: vzeroupper
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; X86-NEXT: retl
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;
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; X64-LABEL: vrolq_extract_udiv:
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@ -92,9 +91,7 @@ define <2 x i64> @vrolq_extract_udiv(<2 x i64> %i) nounwind {
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; X64-NEXT: vmovq %rdx, %xmm0
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; X64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; X64-NEXT: vpsrlq $1, %xmm0, %xmm0
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; X64-NEXT: vprolq $57, %zmm0, %zmm0
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; X64-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
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; X64-NEXT: vzeroupper
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; X64-NEXT: vprolq $57, %xmm0, %xmm0
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; X64-NEXT: retq
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%lhs_div = udiv <2 x i64> %i, <i64 3, i64 3>
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%rhs_div = udiv <2 x i64> %i, <i64 384, i64 384>
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@ -106,20 +103,16 @@ define <2 x i64> @vrolq_extract_udiv(<2 x i64> %i) nounwind {
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define <4 x i32> @vrolw_extract_mul_with_mask(<4 x i32> %i) nounwind {
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; X86-LABEL: vrolw_extract_mul_with_mask:
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; X86: # %bb.0:
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; X86-NEXT: vpbroadcastd {{.*#+}} xmm1 = [9,9,9,9]
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; X86-NEXT: vpmulld %xmm1, %xmm0, %xmm0
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; X86-NEXT: vprold $7, %zmm0, %zmm0
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; X86-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}{1to4}, %xmm0, %xmm0
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; X86-NEXT: vprold $7, %xmm0, %xmm0
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; X86-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
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; X86-NEXT: vzeroupper
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; X86-NEXT: retl
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;
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; X64-LABEL: vrolw_extract_mul_with_mask:
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; X64: # %bb.0:
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; X64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [9,9,9,9]
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; X64-NEXT: vpmulld %xmm1, %xmm0, %xmm0
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; X64-NEXT: vprold $7, %zmm0, %zmm0
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; X64-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
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; X64-NEXT: vprold $7, %xmm0, %xmm0
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; X64-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; X64-NEXT: vzeroupper
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; X64-NEXT: retq
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%lhs_mul = mul <4 x i32> %i, <i32 1152, i32 1152, i32 1152, i32 1152>
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%rhs_mul = mul <4 x i32> %i, <i32 9, i32 9, i32 9, i32 9>
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@ -170,14 +163,19 @@ define <4 x i64> @no_extract_shl(<4 x i64> %i) nounwind {
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; Result would overshift
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define <4 x i32> @no_extract_shrl(<4 x i32> %i) nounwind {
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; CHECK-LABEL: no_extract_shrl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpslld $25, %xmm0, %xmm1
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; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm2 = [4026531840,4026531840,4026531840,4026531840]
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; CHECK-NEXT: vpand %xmm2, %xmm1, %xmm1
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; CHECK-NEXT: vpsrld $9, %xmm0, %xmm0
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; CHECK-NEXT: vpor %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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; X86-LABEL: no_extract_shrl:
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; X86: # %bb.0:
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; X86-NEXT: vpsrld $9, %xmm0, %xmm1
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; X86-NEXT: vpslld $25, %xmm0, %xmm0
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; X86-NEXT: vpternlogd $236, {{\.?LCPI[0-9]+_[0-9]+}}{1to4}, %xmm1, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: no_extract_shrl:
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; X64: # %bb.0:
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; X64-NEXT: vpsrld $9, %xmm0, %xmm1
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; X64-NEXT: vpslld $25, %xmm0, %xmm0
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; X64-NEXT: vpternlogd $236, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm0
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; X64-NEXT: retq
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%lhs_div = lshr <4 x i32> %i, <i32 3, i32 3, i32 3, i32 3>
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%rhs_div = lshr <4 x i32> %i, <i32 9, i32 9, i32 9, i32 9>
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%lhs_shift = shl <4 x i32> %lhs_div, <i32 28, i32 28, i32 28, i32 28>
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@ -187,15 +185,21 @@ define <4 x i32> @no_extract_shrl(<4 x i32> %i) nounwind {
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; Can factor 512 from 1536, but result is 3 instead of 9
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define <8 x i32> @no_extract_mul(<8 x i32> %i) nounwind {
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; CHECK-LABEL: no_extract_mul:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpbroadcastd {{.*#+}} ymm1 = [1536,1536,1536,1536,1536,1536,1536,1536]
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; CHECK-NEXT: vpmulld %ymm1, %ymm0, %ymm1
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; CHECK-NEXT: vpbroadcastd {{.*#+}} ymm2 = [9,9,9,9,9,9,9,9]
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; CHECK-NEXT: vpmulld %ymm2, %ymm0, %ymm0
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; CHECK-NEXT: vpsrld $23, %ymm0, %ymm0
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; CHECK-NEXT: vpor %ymm0, %ymm1, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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; X86-LABEL: no_extract_mul:
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; X86: # %bb.0:
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; X86-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %ymm0, %ymm1
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; X86-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %ymm0, %ymm0
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; X86-NEXT: vpsrld $23, %ymm0, %ymm0
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; X86-NEXT: vpor %ymm0, %ymm1, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: no_extract_mul:
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; X64: # %bb.0:
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; X64-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm1
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; X64-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0
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; X64-NEXT: vpsrld $23, %ymm0, %ymm0
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; X64-NEXT: vpor %ymm0, %ymm1, %ymm0
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; X64-NEXT: retq
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%lhs_mul = mul <8 x i32> %i, <i32 1536, i32 1536, i32 1536, i32 1536, i32 1536, i32 1536, i32 1536, i32 1536>
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%rhs_mul = mul <8 x i32> %i, <i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9>
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%rhs_shift = lshr <8 x i32> %rhs_mul, <i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23, i32 23>
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@ -243,8 +247,7 @@ define <2 x i64> @no_extract_udiv(<2 x i64> %i) nounwind {
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; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
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; X86-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
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; X86-NEXT: vpinsrd $3, %edx, %xmm0, %xmm0
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; X86-NEXT: vmovdqu {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 # 16-byte Reload
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; X86-NEXT: vpsllq $56, %xmm1, %xmm1
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; X86-NEXT: vpsllq $56, {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 # 16-byte Folded Reload
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; X86-NEXT: vpor %xmm0, %xmm1, %xmm0
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; X86-NEXT: addl $48, %esp
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; X86-NEXT: retl
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@ -285,10 +288,7 @@ define <2 x i64> @no_extract_udiv(<2 x i64> %i) nounwind {
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define <4 x i32> @extract_add_1(<4 x i32> %i) nounwind {
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; CHECK-LABEL: extract_add_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
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; CHECK-NEXT: vprold $1, %zmm0, %zmm0
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; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: vprold $1, %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%ii = add <4 x i32> %i, %i
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%rhs = lshr <4 x i32> %i, <i32 31, i32 31, i32 31, i32 31>
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@ -299,10 +299,7 @@ define <4 x i32> @extract_add_1(<4 x i32> %i) nounwind {
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define <4 x i32> @extract_add_1_comut(<4 x i32> %i) nounwind {
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; CHECK-LABEL: extract_add_1_comut:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
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; CHECK-NEXT: vprold $1, %zmm0, %zmm0
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; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: vprold $1, %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%ii = add <4 x i32> %i, %i
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%lhs = lshr <4 x i32> %i, <i32 31, i32 31, i32 31, i32 31>
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