parent
7af0432c10
commit
1c6e20aab6
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@ -9,7 +9,7 @@
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//
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// we can now use code like this:
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//
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// M = BuildMI(X86::ADDrr8).addReg(argVal1).addReg(argVal2);
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// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
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//
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//===----------------------------------------------------------------------===//
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@ -27,23 +27,30 @@ struct MachineInstrBuilder {
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///
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operator MachineInstr*() const { return MI; }
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/// addReg - Add a new register operand...
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/// addReg - Add a new virtual register operand...
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///
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MachineInstrBuilder &addReg(int RegNo) {
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MI->addRegOperand(RegNo);
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return *this;
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}
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/// addReg - Add an LLVM value that is to be used as a register...x
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///
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MachineInstrBuilder &addReg(Value *V, bool isDef = false, bool isDNU = false){
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MI->addRegOperand(V, isDef, isDNU);
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return *this;
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}
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/// addPCDisp - Add an LLVM value to be treated as a PC relative
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/// displacement...
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///
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MachineInstrBuilder &addPCDisp(Value *V) {
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MI->addPCDispOperand(V);
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return *this;
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}
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/// addMReg - Add a machine register operand...
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///
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MachineInstrBuilder &addMReg(int Reg, bool isDef=false) {
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MI->addMachineRegOperand(Reg, isDef);
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return *this;
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