[AArch64][GlobalISel] Check if G_SELECT has been optimized when folding binops
`TryFoldBinOpIntoSelect` didn't have a check for `Optimized`, meaning you could end up folding twice. (e.g. a select with a G_ADD on the true side, and a G_SUB on the false side) Add in the missing `if` and a test.
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@ -1033,8 +1033,11 @@ AArch64InstructionSelector::emitSelect(Register Dst, Register True,
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// By default, we'll try and emit a CSEL.
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unsigned Opc = Is32Bit ? AArch64::CSELWr : AArch64::CSELXr;
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bool Optimized = false;
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auto TryFoldBinOpIntoSelect = [&Opc, Is32Bit, &CC, &MRI](Register &Reg,
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bool Invert) {
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auto TryFoldBinOpIntoSelect = [&Opc, Is32Bit, &CC, &MRI,
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&Optimized](Register &Reg, bool Invert) {
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if (Optimized)
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return false;
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// Attempt to fold:
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//
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// %sub = G_SUB 0, %x
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@ -650,3 +650,35 @@ body: |
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%select:gpr(s32) = G_SELECT %cond(s1), %add, %f
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$w0 = COPY %select(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: binop_dont_optimize_twice
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1, $w2
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; CHECK-LABEL: name: binop_dont_optimize_twice
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; CHECK: liveins: $w0, $w1, $w2
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; CHECK: %reg0:gpr32 = COPY $w0
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; CHECK: %reg1:gpr32 = COPY $w1
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; CHECK: %reg2:gpr32 = COPY $w2
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; CHECK: %xor:gpr32 = ORNWrr $wzr, %reg1
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; CHECK: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri %reg0, 0, implicit-def $nzcv
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; CHECK: %select:gpr32 = CSNEGWr %xor, %reg2, 1, implicit $nzcv
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; CHECK: $w0 = COPY %select
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; CHECK: RET_ReallyLR implicit $w0
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%reg0:gpr(s32) = COPY $w0
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%reg1:gpr(s32) = COPY $w1
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%reg2:gpr(s32) = COPY $w2
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%cond:gpr(s1) = G_TRUNC %reg0(s32)
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%f:gpr(s32) = COPY $w2
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%negative_one:gpr(s32) = G_CONSTANT i32 -1
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%xor:gpr(s32) = G_XOR %reg1(s32), %negative_one
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%zero:gpr(s32) = G_CONSTANT i32 0
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%sub:gpr(s32) = G_SUB %zero(s32), %reg2
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%select:gpr(s32) = G_SELECT %cond(s1), %xor, %sub
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$w0 = COPY %select(s32)
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RET_ReallyLR implicit $w0
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