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[AVX-512] Remove masked 128/256-bit builtins for vpmaddwd and vpmaddubsw. Replace with unmasked builtins and select. 

llvm-svn: 285516
This commit is contained in:
Craig Topper 2016-10-30 07:11:34 +00:00
parent b7781a95fd
commit 312ff9d19d
3 changed files with 49 additions and 54 deletions
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4
clang/include/clang/Basic/BuiltinsX86.def
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@ -1314,10 +1314,6 @@ TARGET_BUILTIN(__builtin_ia32_reduceps128_mask, "V4fV4fIiV4fUc", "", "avx512vl,a
TARGET_BUILTIN(__builtin_ia32_reduceps256_mask, "V8fV8fIiV8fUc", "", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_reducesd_mask, "V2dV2dV2dV2dUcIiIi", "", "avx512dq")
TARGET_BUILTIN(__builtin_ia32_reducess_mask, "V4fV4fV4fV4fUcIiIi", "", "avx512dq")
TARGET_BUILTIN(__builtin_ia32_pmaddubsw128_mask, "V8sV16cV16cV8sUc", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaddubsw256_mask, "V16sV32cV32cV16sUs", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaddwd128_mask, "V4iV8sV8sV4iUc", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaddwd256_mask, "V8iV16sV16sV8iUc", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmovswb128_mask, "V16cV8sV16cUc", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmovswb256_mask, "V16cV16sV16cUs", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmovuswb128_mask, "V16cV8sV16cUc", "", "avx512vl,avx512bw")

59
clang/lib/Headers/avx512vlbwintrin.h
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@ -1665,68 +1665,59 @@ _mm256_maskz_permutex2var_epi16 (__mmask16 __U, __m256i __A,
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mask_maddubs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {
return (__m128i) __builtin_ia32_pmaddubsw128_mask ((__v16qi) __X,
(__v16qi) __Y,
(__v8hi) __W,
(__mmask8) __U);
return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
(__v8hi)_mm_maddubs_epi16(__X, __Y),
(__v8hi)__W);
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_maskz_maddubs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {
return (__m128i) __builtin_ia32_pmaddubsw128_mask ((__v16qi) __X,
(__v16qi) __Y,
(__v8hi) _mm_setzero_si128(),
(__mmask8) __U);
return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
(__v8hi)_mm_maddubs_epi16(__X, __Y),
(__v8hi)_mm_setzero_si128());
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X,
__m256i __Y) {
return (__m256i) __builtin_ia32_pmaddubsw256_mask ((__v32qi) __X,
(__v32qi) __Y,
(__v16hi) __W,
(__mmask16) __U);
return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
(__v16hi)_mm256_maddubs_epi16(__X, __Y),
(__v16hi)__W);
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_maskz_maddubs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {
return (__m256i) __builtin_ia32_pmaddubsw256_mask ((__v32qi) __X,
(__v32qi) __Y,
(__v16hi) _mm256_setzero_si256(),
(__mmask16) __U);
return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
(__v16hi)_mm256_maddubs_epi16(__X, __Y),
(__v16hi)_mm256_setzero_si256());
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mask_madd_epi16 (__m128i __W, __mmask8 __U, __m128i __A,
__m128i __B) {
return (__m128i) __builtin_ia32_pmaddwd128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v4si) __W,
(__mmask8) __U);
_mm_mask_madd_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
(__v4si)_mm_madd_epi16(__A, __B),
(__v4si)__W);
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_maskz_madd_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
return (__m128i) __builtin_ia32_pmaddwd128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v4si) _mm_setzero_si128(),
(__mmask8) __U);
return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
(__v4si)_mm_madd_epi16(__A, __B),
(__v4si)_mm_setzero_si128());
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_mask_madd_epi16(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
return (__m256i) __builtin_ia32_pmaddwd256_mask ((__v16hi) __A,
(__v16hi) __B,
(__v8si) __W,
(__mmask8) __U);
return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
(__v8si)_mm256_madd_epi16(__A, __B),
(__v8si)__W);
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_maskz_madd_epi16(__mmask8 __U, __m256i __A, __m256i __B) {
return (__m256i) __builtin_ia32_pmaddwd256_mask ((__v16hi) __A,
(__v16hi) __B,
(__v8si) _mm256_setzero_si256(),
(__mmask8) __U);
return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
(__v8si)_mm256_madd_epi16(__A, __B),
(__v8si)_mm256_setzero_si256());
}
static __inline__ __m128i __DEFAULT_FN_ATTRS

24
clang/test/CodeGen/avx512vlbw-builtins.c
View File

@ -1590,49 +1590,57 @@ __m256i test_mm256_maskz_permutex2var_epi16(__mmask16 __U, __m256i __A,
}
__m128i test_mm_mask_maddubs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {
// CHECK-LABEL: @test_mm_mask_maddubs_epi16
// CHECK: @llvm.x86.avx512.mask.pmaddubs.w.128
// CHECK: @llvm.x86.ssse3.pmadd.ub.sw
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
return _mm_mask_maddubs_epi16(__W, __U, __X, __Y);
}
__m128i test_mm_maskz_maddubs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {
// CHECK-LABEL: @test_mm_maskz_maddubs_epi16
// CHECK: @llvm.x86.avx512.mask.pmaddubs.w.128
// CHECK: @llvm.x86.ssse3.pmadd.ub.sw
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
return _mm_maskz_maddubs_epi16(__U, __X, __Y);
}
__m256i test_mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X, __m256i __Y) {
// CHECK-LABEL: @test_mm256_mask_maddubs_epi16
// CHECK: @llvm.x86.avx512.mask.pmaddubs.w.256
// CHECK: @llvm.x86.avx2.pmadd.ub.sw
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
return _mm256_mask_maddubs_epi16(__W, __U, __X, __Y);
}
__m256i test_mm256_maskz_maddubs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {
// CHECK-LABEL: @test_mm256_maskz_maddubs_epi16
// CHECK: @llvm.x86.avx512.mask.pmaddubs.w.256
// CHECK: @llvm.x86.avx2.pmadd.ub.sw
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
return _mm256_maskz_maddubs_epi16(__U, __X, __Y);
}
__m128i test_mm_mask_madd_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_mask_madd_epi16
// CHECK: @llvm.x86.avx512.mask.pmaddw.d.128
// CHECK: @llvm.x86.sse2.pmadd.wd
// CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}}
return _mm_mask_madd_epi16(__W, __U, __A, __B);
}
__m128i test_mm_maskz_madd_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_maskz_madd_epi16
// CHECK: @llvm.x86.avx512.mask.pmaddw.d.128
// CHECK: @llvm.x86.sse2.pmadd.wd
// CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}}
return _mm_maskz_madd_epi16(__U, __A, __B);
}
__m256i test_mm256_mask_madd_epi16(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_mask_madd_epi16
// CHECK: @llvm.x86.avx512.mask.pmaddw.d.256
// CHECK: @llvm.x86.avx2.pmadd.wd
// CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}}
return _mm256_mask_madd_epi16(__W, __U, __A, __B);
}
__m256i test_mm256_maskz_madd_epi16(__mmask8 __U, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_maskz_madd_epi16
// CHECK: @llvm.x86.avx512.mask.pmaddw.d.256
// CHECK: @llvm.x86.avx2.pmadd.wd
// CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}}
return _mm256_maskz_madd_epi16(__U, __A, __B);
}