OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity

[AggressiveInstCombine][Test] Add test for assumptions

This commit is contained in:
Anton Afanasyev 2021-09-02 01:00:37 +03:00
parent 8c0a1940c1
commit 388b7a1502
1 changed files with 79 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

79
llvm/test/Transforms/AggressiveInstCombine/trunc_assume.ll Normal file
View File

@ -0,0 +1,79 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -aggressive-instcombine -S | FileCheck %s
define i16 @trunc_shl(i16 %x, i16 %y) {
; CHECK-LABEL: @trunc_shl(
; CHECK-NEXT: [[CMP0:%.*]] = icmp ult i16 [[Y:%.*]], 16
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP0]])
; CHECK-NEXT: [[ZEXTX:%.*]] = zext i16 [[X:%.*]] to i32
; CHECK-NEXT: [[ZEXTY:%.*]] = zext i16 [[Y]] to i32
; CHECK-NEXT: [[I0:%.*]] = shl i32 [[ZEXTX]], [[ZEXTY]]
; CHECK-NEXT: [[R:%.*]] = trunc i32 [[I0]] to i16
; CHECK-NEXT: ret i16 [[R]]
;
%cmp0 = icmp ult i16 %y, 16
call void @llvm.assume(i1 %cmp0)
%zextx = zext i16 %x to i32
%zexty = zext i16 %y to i32
%i0 = shl i32 %zextx, %zexty
%r = trunc i32 %i0 to i16
ret i16 %r
}
define i16 @trunc_lshr(i16 %x, i16 %y) {
; CHECK-LABEL: @trunc_lshr(
; CHECK-NEXT: [[CMP0:%.*]] = icmp ult i16 [[X:%.*]], 0
; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i16 [[Y:%.*]], 16
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP0]])
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP1]])
; CHECK-NEXT: [[ZEXTX:%.*]] = zext i16 [[X]] to i32
; CHECK-NEXT: [[ZEXTY:%.*]] = zext i16 [[Y]] to i32
; CHECK-NEXT: [[I0:%.*]] = lshr i32 [[ZEXTX]], [[ZEXTY]]
; CHECK-NEXT: [[R:%.*]] = trunc i32 [[I0]] to i16
; CHECK-NEXT: ret i16 [[R]]
;
%cmp0 = icmp ult i16 %x, 65536
%cmp1 = icmp ult i16 %y, 16
call void @llvm.assume(i1 %cmp0)
call void @llvm.assume(i1 %cmp1)
%zextx = zext i16 %x to i32
%zexty = zext i16 %y to i32
%i0 = lshr i32 %zextx, %zexty
%r = trunc i32 %i0 to i16
ret i16 %r
}
define i16 @trunc_ashr(i16 %x, i16 %y) {
; CHECK-LABEL: @trunc_ashr(
; CHECK-NEXT: [[CMP0:%.*]] = icmp slt i16 [[X:%.*]], 32767
; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i16 [[X]], -32768
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i16 [[Y:%.*]], 16
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP0]])
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP1]])
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP2]])
; CHECK-NEXT: [[ZEXTX:%.*]] = sext i16 [[X]] to i32
; CHECK-NEXT: [[ZEXTY:%.*]] = sext i16 [[Y]] to i32
; CHECK-NEXT: [[I0:%.*]] = ashr i32 [[ZEXTX]], [[ZEXTY]]
; CHECK-NEXT: [[R:%.*]] = trunc i32 [[I0]] to i16
; CHECK-NEXT: ret i16 [[R]]
;
%cmp0 = icmp slt i16 %x, 32767
%cmp1 = icmp sge i16 %x, -32768
%cmp2 = icmp ult i16 %y, 16
call void @llvm.assume(i1 %cmp0)
call void @llvm.assume(i1 %cmp1)
call void @llvm.assume(i1 %cmp2)
%zextx = sext i16 %x to i32
%zexty = sext i16 %y to i32
%i0 = ashr i32 %zextx, %zexty
%r = trunc i32 %i0 to i16
ret i16 %r
}
declare void @llvm.assume(i1)