[AMDGPU][MC] Corrected encoding of V_MQSAD_U32_U8 for CI
Corrected encoding of V_MQSAD_U32_U8 for CI See bug 32552: https://bugs.llvm.org//show_bug.cgi?id=32552 Reviewers: vpykhtin Differential Revision: https://reviews.llvm.org/D31810 llvm-svn: 300070
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@ -402,7 +402,7 @@ multiclass VOP3be_Real_ci<bits<9> op> {
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defm V_MQSAD_U16_U8 : VOP3_Real_ci <0x172>;
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defm V_QSAD_PK_U16_U8 : VOP3_Real_ci <0x172>;
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defm V_MQSAD_U32_U8 : VOP3_Real_ci <0x174>;
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defm V_MQSAD_U32_U8 : VOP3_Real_ci <0x175>;
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defm V_MAD_U64_U32 : VOP3be_Real_ci <0x176>;
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defm V_MAD_I64_I32 : VOP3be_Real_ci <0x177>;
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@ -386,7 +386,7 @@ v_mad_f32 v9, 0.5, v5, -v8
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// VI: v_mad_f32 v9, 0.5, v5, -v8 ; encoding: [0x09,0x00,0xc1,0xd1,0xf0,0x0a,0x22,0x84]
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v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3]
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// CI: v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3] ; encoding: [0x00,0x00,0xe8,0xd2,0x02,0x08,0x02,0x04]
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// CI: v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3] ; encoding: [0x00,0x00,0xea,0xd2,0x02,0x08,0x02,0x04]
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// VI: v_mqsad_u32_u8 v[0:3], s[2:3], v4, v[0:3] ; encoding: [0x00,0x00,0xe7,0xd1,0x02,0x08,0x02,0x04]
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// NOSI: error: instruction not supported on this GPU
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