From 49e354bcb6caf6c9aa8d62f3e3d3734fa9a2bc41 Mon Sep 17 00:00:00 2001
From: Cameron Zwarich <zwarich@apple.com>
Date: Wed, 16 Mar 2011 20:15:44 +0000
Subject: [PATCH] Add a test for i1 zeroext arguments on x86-64. We currently
 generate code that conforms to the ABI, but DAGCombine could in theory
 recognize the sequence of zext asserts and truncates and generate incorrect
 code.

llvm-svn: 127754
---
 llvm/test/CodeGen/X86/bool-args-zext.ll | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/bool-args-zext.ll

diff --git a/llvm/test/CodeGen/X86/bool-args-zext.ll b/llvm/test/CodeGen/X86/bool-args-zext.ll
new file mode 100644
index 000000000000..67168d4bf04f
--- /dev/null
+++ b/llvm/test/CodeGen/X86/bool-args-zext.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; CHECK: @bar1
+; CHECK: movzbl
+; CHECK: callq
+define void @bar1(i1 zeroext %v1) nounwind ssp {
+entry:
+  %conv = zext i1 %v1 to i32
+  %call = tail call i32 (...)* @foo(i32 %conv) nounwind
+  ret void
+}
+
+; CHECK: @bar2
+; CHECK-NOT: movzbl
+; CHECK: callq
+define void @bar2(i8 zeroext %v1) nounwind ssp {
+entry:
+  %conv = zext i8 %v1 to i32
+  %call = tail call i32 (...)* @foo(i32 %conv) nounwind
+  ret void
+}
+
+declare i32 @foo(...)