let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean
llvm-svn: 25040
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@ -44,12 +44,12 @@ def invX : SDNodeXForm<imm, [{
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def immUExt8 : PatLeaf<(imm), [{
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// immUExt8 predicate - True if the immediate fits in a 8-bit zero extended
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// field. Used by instructions like 'addi'.
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return (unsigned long)N->getValue() == (unsigned char)N->getValue();
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return (uint64_t)N->getValue() == (uint8_t)N->getValue();
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}]>;
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def immUExt8inv : PatLeaf<(imm), [{
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// immUExt8inv predicate - True if the inverted immediate fits in a 8-bit zero extended
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// field. Used by instructions like 'ornoti'.
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return (unsigned long)~N->getValue() == (unsigned char)~N->getValue();
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return (uint64_t)~N->getValue() == (uint8_t)~N->getValue();
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}], invX>;
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def immSExt16 : PatLeaf<(imm), [{
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// immSExt16 predicate - True if the immediate fits in a 16-bit sign extended
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