[ELF] Don't relax R_X86_64_GOTPCRELX if addend != -4
clang may produce `movl x@GOTPCREL+4(%rip), %eax` when loading the high 32 bits
of the address of a global variable in -fpic/-fpie mode.
If assembled by GNU as, the fixup emits an R_X86_64_GOTPCRELX with an
addend != -4. The instruction loads from the GOT entry with an offset
and thus it is incorrect to relax the instruction.
If assembled by the integrated assembler, we emit R_X86_64_GOTPCREL for
relocations that definitely cannot be relaxed (D92114), so this patch is not
needed.
This patch disables the relaxation, which is compatible with the implementation in GNU ld
("Add R_X86_64_[REX_]GOTPCRELX support to gas and ld").
Reviewed By: grimar, jhenderson
Differential Revision: https://reviews.llvm.org/D91993
This commit is contained in:
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@ -730,7 +730,12 @@ void X86_64::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
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RelExpr X86_64::adjustGotPcExpr(RelType type, int64_t addend,
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RelExpr X86_64::adjustGotPcExpr(RelType type, int64_t addend,
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const uint8_t *loc) const {
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const uint8_t *loc) const {
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if (type != R_X86_64_GOTPCRELX && type != R_X86_64_REX_GOTPCRELX)
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// Only R_X86_64_[REX_]GOTPCRELX can be relaxed. GNU as may emit GOTPCRELX
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// with addend != -4. Such an instruction does not load the full GOT entry, so
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// we cannot relax the relocation. E.g. movl x@GOTPCREL+4(%rip), %rax
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// (addend=0) loads the high 32 bits of the GOT entry.
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if ((type != R_X86_64_GOTPCRELX && type != R_X86_64_REX_GOTPCRELX) ||
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addend != -4)
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return R_GOT_PC;
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return R_GOT_PC;
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const uint8_t op = loc[-2];
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const uint8_t op = loc[-2];
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const uint8_t modRm = loc[-1];
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const uint8_t modRm = loc[-1];
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@ -0,0 +1,30 @@
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# REQUIRES: x86
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# RUN: llvm-mc -filetype=obj -triple=x86_64 %s -o %t.o
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# RUN: ld.lld %t.o -o %t
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# RUN: llvm-objdump -s -d %t | FileCheck %s
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# CHECK: Contents of section .got:
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# CHECK-NEXT: {{^}} [[#%x,ADDR:]] {{.*}} 00000000
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# CHECK: leal {{.*}}(%rip), %eax # {{.*}} <foo>
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# CHECK-NEXT: movl {{.*}}(%rip), %eax # [[#ADDR+4]]
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# CHECK-NEXT: movq {{.*}}(%rip), %rax # [[#ADDR+1]]
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## movl foo@GOTPCREL(%rip), %eax
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movl 0(%rip), %eax
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.reloc .-4, R_X86_64_GOTPCRELX, foo-4
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## The instruction has an offset (addend!=-4). It is incorrect to relax movl to leal.
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## movl foo@GOTPCREL+4(%rip), %eax
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movl 0(%rip), %eax
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.reloc .-4, R_X86_64_GOTPCRELX, foo
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## This does not make sense because it loads one byte past the GOT entry.
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## It is just to demonstrate the behavior.
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## movq foo@GOTPCREL+1(%rip), %rax
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movq 0(%rip), %rax
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.reloc .-4, R_X86_64_REX_GOTPCRELX, foo-3
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.globl foo
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foo:
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nop
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