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Prepare unit tests for update to ISL 0.16 

ISL 0.16 will change how sets are printed which breaks 117 unit tests
that text-compare printed sets. This patch re-formats most of these unit
tests using a script and small manual editing on top of that. When
actually updating ISL, most work is done by just re-running the script
to adapt to the changed output.

Some tests that compare IR and tests with single CHECK-lines that can be
easily updated manually are not included here.

The re-format script will also be committed afterwards. The per-test
formatter invocation command lines options will not be added in the near
future because it is ad hoc and would overwrite the manual edits.
Ideally it also shouldn't be required anymore because ISL's set printing
has become more stable in 0.16.

Differential Revision: http://reviews.llvm.org/D16095

llvm-svn: 257851
This commit is contained in:
Michael Kruse 2016-01-15 00:48:42 +00:00
parent 81e2e9ef86
commit 5a9a65e43f
105 changed files with 2652 additions and 2494 deletions
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30
polly/test/DependenceInfo/computeout.ll
View File

@ -50,22 +50,16 @@ exit.3:
ret void ret void
} }
; VALUE: region: 'S1 => exit.3' in function 'sequential_writes': ; VALUE: RAW dependences:
; VALUE: RAW dependences: ; VALUE-NEXT: { }
; VALUE: { } ; VALUE-NEXT: WAR dependences:
; VALUE: WAR dependences: ; VALUE-NEXT: { }
; VALUE: { } ; VALUE-NEXT: WAW dependences:
; VALUE: WAW dependences: ; VALUE-NEXT: { Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0; Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0; Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 10 }
; VALUE: {
; VALUE: Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0;
; VALUE: Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0;
; VALUE: Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 10
; VALUE: }
; TIMEOUT: region: 'S1 => exit.3' in function 'sequential_writes': ; TIMEOUT: RAW dependences:
; TIMEOUT: RAW dependences: ; TIMEOUT-NEXT: n/a
; TIMEOUT: n/a ; TIMEOUT-NEXT: WAR dependences:
; TIMEOUT: WAR dependences: ; TIMEOUT-NEXT: n/a
; TIMEOUT: n/a ; TIMEOUT-NEXT: WAW dependences:
; TIMEOUT: WAW dependences: ; TIMEOUT-NEXT: n/a
; TIMEOUT: n/a

25
polly/test/DependenceInfo/do_pluto_matmult.ll
View File

@ -64,17 +64,16 @@ do.end45: ; preds = %do.cond42
ret void ret void
} }
; VALUE: RAW dependences: ; VALUE: RAW dependences:
; VALUE: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, 1 + i2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 <= 34 and i2 >= 0 } ; VALUE-NEXT: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, 1 + i2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 <= 34 and i2 >= 0 }
; VALUE: WAR dependences: ; VALUE-NEXT: WAR dependences:
; VALUE: { } ; VALUE-NEXT: { }
; VALUE: WAW dependences: ; VALUE-NEXT: WAW dependences:
; VALUE: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, 1 + i2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 <= 34 and i2 >= 0 } ; VALUE-NEXT: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, 1 + i2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 <= 34 and i2 >= 0 }
; MEMORY: RAW dependences:
; MEMORY: RAW dependences: ; MEMORY-NEXT: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 and o2 >= 0 }
; MEMORY: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 and o2 >= 0 } ; MEMORY-NEXT: WAR dependences:
; MEMORY: WAR dependences: ; MEMORY-NEXT: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 and o2 >= 0 }
; MEMORY: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 and o2 >= 0 } ; MEMORY-NEXT: WAW dependences:
; MEMORY: WAW dependences: ; MEMORY-NEXT: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 and o2 >= 0 }
; MEMORY: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, o2] : i0 <= 35 and i0 >= 0 and i1 <= 35 and i1 >= 0 and i2 >= 0 and o2 >= 1 + i2 and o2 <= 35 and o2 >= 0 }

16
polly/test/DependenceInfo/reduction_complex_location.ll
View File

@ -1,13 +1,13 @@
; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAR dependences: ; CHECK-NEXT: WAR dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAW dependences: ; CHECK-NEXT: WAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: Reduction dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK: { Stmt_for_body3[i0, i1] -> Stmt_for_body3[2 + i0, -1 + i1] : i0 <= 97 and i0 >= 0 and i1 <= 99 and i1 >= 1 } ; CHECK-NEXT: { Stmt_for_body3[i0, i1] -> Stmt_for_body3[2 + i0, -1 + i1] : i0 <= 97 and i0 >= 0 and i1 <= 99 and i1 >= 1 }
; ;
; void f(int *sum) { ; void f(int *sum) {
; for (int i = 0; i < 100; i++) ; for (int i = 0; i < 100; i++)

16
polly/test/DependenceInfo/reduction_dependences_equal_non_reduction_dependences.ll
View File

@ -3,14 +3,14 @@
; This loopnest contains a reduction which imposes the same dependences as the ; This loopnest contains a reduction which imposes the same dependences as the
; accesses to the array A. We need to ensure we keep the dependences of A. ; accesses to the array A. We need to ensure we keep the dependences of A.
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK: { Stmt_for_body[i0] -> Stmt_for_body[1 + i0] : i0 >= 0 and i0 <= 1022 } ; CHECK-NEXT: { Stmt_for_body[i0] -> Stmt_for_body[1 + i0] : i0 >= 0 and i0 <= 1022 }
; CHECK: WAR dependences: ; CHECK-NEXT: WAR dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAW dependences: ; CHECK-NEXT: WAW dependences:
; CHECK: { Stmt_for_body[i0] -> Stmt_for_body[1 + i0] : i0 <= 1022 and i0 >= 0 } ; CHECK-NEXT: { Stmt_for_body[i0] -> Stmt_for_body[1 + i0] : i0 <= 1022 and i0 >= 0 }
; CHECK: Reduction dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK: { Stmt_for_body[i0] -> Stmt_for_body[1 + i0] : i0 <= 1022 and i0 >= 0 } ; CHECK-NEXT: { Stmt_for_body[i0] -> Stmt_for_body[1 + i0] : i0 <= 1022 and i0 >= 0 }
; ;
; ;
; void AandSum(int *restrict sum, int *restrict A) { ; void AandSum(int *restrict sum, int *restrict A) {

17
polly/test/DependenceInfo/reduction_mixed_reduction_and_non_reduction_dependences.ll
View File

@ -1,14 +1,13 @@
; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK-DAG: Stmt_for_body3[i0, i1] -> Stmt_for_body3[i0 + i1, o1] : i1 <= 1023 - i0 and i1 >= 0 and i1 <= 1 and i0 >= 0 and o1 <= 511 and o1 >= 1 ; CHECK-NEXT: { Stmt_for_body3[i0, i1] -> Stmt_for_body3[i0 + i1, o1] : i1 <= 1023 - i0 and i1 >= 0 and i1 <= 1 and i0 >= 0 and o1 <= 511 and o1 >= 1 }
; CHECK: WAR dependences: ; CHECK-NEXT: WAR dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAW dependences: ; CHECK-NEXT: WAW dependences:
; CHECK-DAG: Stmt_for_body3[i0, i1] -> Stmt_for_body3[1 + i0, -1 + i1] : i0 <= 1022 and i0 >= 0 and i1 <= 511 and i1 >= 2 ; CHECK-NEXT: { Stmt_for_body3[i0, i1] -> Stmt_for_body3[1 + i0, -1 + i1] : i0 <= 1022 and i0 >= 0 and i1 <= 511 and i1 >= 2; Stmt_for_body3[i0, 2] -> Stmt_for_body3[2 + i0, 0] : i0 <= 1021 and i0 >= 0 }
; CHECK-DAG: Stmt_for_body3[i0, 2] -> Stmt_for_body3[2 + i0, 0] : i0 <= 1021 and i0 >= 0 ; CHECK-NEXT: Reduction dependences:
; CHECK: Reduction dependences: ; CHECK-NEXT: { Stmt_for_body3[i0, 1] -> Stmt_for_body3[1 + i0, 0] : i0 <= 1022 and i0 >= 0 }
; CHECK: { Stmt_for_body3[i0, 1] -> Stmt_for_body3[1 + i0, 0] : i0 <= 1022 and i0 >= 0 }
; ;
; void f(int *sum) { ; void f(int *sum) {
; for (int i = 0; i < 1024; i++) ; for (int i = 0; i < 1024; i++)

4
polly/test/DependenceInfo/reduction_multiple_loops_array_sum.ll
View File

@ -2,8 +2,8 @@
; ;
; Verify that only the inner reduction like accesses cause reduction dependences ; Verify that only the inner reduction like accesses cause reduction dependences
; ;
; CHECK: Reduction dependences: ; CHECK: Reduction dependences:
; CHECK: { Stmt_for_body3[i0, i1] -> Stmt_for_body3[i0, 1 + i1] : i0 <= 99 and i0 >= 0 and i1 <= 98 and i1 >= 0 } ; CHECK-NEXT: { Stmt_for_body3[i0, i1] -> Stmt_for_body3[i0, 1 + i1] : i0 <= 99 and i0 >= 0 and i1 <= 98 and i1 >= 0 }
; ;
; void f(int * restrict A, int * restrict sum) { ; void f(int * restrict A, int * restrict sum) {
; int i, j, k; ; int i, j, k;

17
polly/test/DependenceInfo/reduction_multiple_loops_array_sum_2.ll
View File

@ -1,14 +1,13 @@
; RUN: opt %loadPolly -polly-dependences -analyze -basicaa < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze -basicaa < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAR dependences: ; CHECK-NEXT: WAR dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAW dependences: ; CHECK-NEXT: WAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: Reduction dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK-DAG: Stmt_for_body3[i0, i1] -> Stmt_for_body3[i0, 1 + i1] : i0 <= 99 and i0 >= 0 and i1 <= 98 and i1 >= 0 ; CHECK-NEXT: { Stmt_for_body3[i0, i1] -> Stmt_for_body3[i0, 1 + i1] : i0 <= 99 and i0 >= 0 and i1 <= 98 and i1 >= 0; Stmt_for_body3[i0, 99] -> Stmt_for_body3[1 + i0, 0] : i0 <= 98 and i0 >= 0 }
; CHECK-DAG: Stmt_for_body3[i0, 99] -> Stmt_for_body3[1 + i0, 0] : i0 <= 98 and i0 >= 0
; ;
; int f(int * restrict A, int * restrict sum) { ; int f(int * restrict A, int * restrict sum) {
; int i, j, k; ; int i, j, k;

4
polly/test/DependenceInfo/reduction_multiple_loops_array_sum_3.ll
View File

@ -1,7 +1,7 @@
; RUN: opt %loadPolly -polly-dependences -analyze -basicaa < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze -basicaa < %s | FileCheck %s
; ;
; CHECK: Reduction dependences: ; CHECK: Reduction dependences:
; CHECK: { Stmt_for_inc[i0, i1] -> Stmt_for_inc[i0, 1 + i1] : i0 <= 99 and i0 >= 0 and i1 <= 98 and i1 >= 0 } ; CHECK-NEXT: { Stmt_for_inc[i0, i1] -> Stmt_for_inc[i0, 1 + i1] : i0 <= 99 and i0 >= 0 and i1 <= 98 and i1 >= 0 }
; ;
; int f(int * __restrict__ A) { ; int f(int * __restrict__ A) {
; int i, j, sum = 0; ; int i, j, sum = 0;

17
polly/test/DependenceInfo/reduction_multiple_reductions.ll
View File

@ -2,15 +2,14 @@
; ;
; Verify we do not have dependences between the if and the else clause ; Verify we do not have dependences between the if and the else clause
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAR dependences: ; CHECK-NEXT: WAR dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAW dependences: ; CHECK-NEXT: WAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: Reduction dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK-DAG: Stmt_if_then[i0] -> Stmt_if_then[1 + i0] : i0 <= 510 and i0 >= 0 ; CHECK-NEXT: { Stmt_if_else[i0] -> Stmt_if_else[1 + i0] : i0 <= 1022 and i0 >= 512; Stmt_if_then[i0] -> Stmt_if_then[1 + i0] : i0 <= 510 and i0 >= 0 }
; CHECK-DAG: Stmt_if_else[i0] -> Stmt_if_else[1 + i0] : i0 <= 1022 and i0 >= 512
; ;
; void f(int *restrict sum, int *restrict prod) { ; void f(int *restrict sum, int *restrict prod) {
; for (int i = 0; i < 1024; i++) ; for (int i = 0; i < 1024; i++)

32
polly/test/DependenceInfo/reduction_multiple_reductions_2.ll
View File

@ -1,24 +1,22 @@
; RUN: opt %loadPolly -basicaa -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -basicaa -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ;
; CHECK-DAG: Stmt_S2[i0, i1] -> Stmt_S3[i0] : i0 <= 1023 and i0 >= 0 and i1 <= 1023 and i1 >= 0
; CHECK-DAG: Stmt_S3[i0] -> Stmt_S0[1 + i0] : i0 <= 1022 and i0 >= 0
; CHECK-DAG: Stmt_S0[i0] -> Stmt_S1[i0, o1] : i0 <= 1023 and i0 >= 0 and o1 <= 1023 and o1 >= 0
; These are the important RAW dependences, as they need to originate/end in only one iteration: ; These are the important RAW dependences, as they need to originate/end in only one iteration:
; CHECK-DAG: Stmt_S1[i0, 1023] -> Stmt_S2[i0, o1] : i0 <= 1023 and i0 >= 0 and o1 <= 1023 and o1 >= 0 ; Stmt_S1[i0, 1023] -> Stmt_S2[i0, o1]
; CHECK-DAG: Stmt_S1[i0, i1] -> Stmt_S2[i0, 0] : i0 <= 1023 and i0 >= 0 and i1 <= 1022 and i1 >= 0 ; Stmt_S1[i0, i1] -> Stmt_S2[i0, 0]
; CHECK: WAR dependences: ;
; CHECK: { }
; CHECK: WAW dependences:
; CHECK-DAG: Stmt_S2[i0, i1] -> Stmt_S3[i0] : i0 <= 1023 and i0 >= 0 and i1 <= 1023 and i1 >= 0
; CHECK-DAG: Stmt_S3[i0] -> Stmt_S0[1 + i0] : i0 <= 1022 and i0 >= 0
; CHECK-DAG: Stmt_S0[i0] -> Stmt_S1[i0, o1] : i0 <= 1023 and i0 >= 0 and o1 <= 1023 and o1 >= 0
; These are the important WAW dependences, as they need to originate/end in only one iteration: ; These are the important WAW dependences, as they need to originate/end in only one iteration:
; CHECK-DAG: Stmt_S1[i0, 1023] -> Stmt_S2[i0, o1] : i0 <= 1023 and i0 >= 0 and o1 <= 1023 and o1 >= 0 ; Stmt_S1[i0, 1023] -> Stmt_S2[i0, o1]
; CHECK-DAG: Stmt_S1[i0, i1] -> Stmt_S2[i0, 0] : i0 <= 1023 and i0 >= 0 and i1 <= 1022 and i1 >= 0 ; Stmt_S1[i0, i1] -> Stmt_S2[i0, 0]
; CHECK: Reduction dependences: ;
; CHECK-DAG: Stmt_S1[i0, i1] -> Stmt_S1[i0, 1 + i1] : i0 <= 1023 and i0 >= 0 and i1 <= 1022 and i1 >= 0 ; CHECK: RAW dependences:
; CHECK-DAG: Stmt_S2[i0, i1] -> Stmt_S2[i0, 1 + i1] : i0 <= 1023 and i0 >= 0 and i1 <= 1022 and i1 >= 0 ; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S1[i0, o1] : i0 <= 1023 and i0 >= 0 and o1 <= 1023 and o1 >= 0; Stmt_S2[i0, i1] -> Stmt_S3[i0] : i0 <= 1023 and i0 >= 0 and i1 <= 1023 and i1 >= 0; Stmt_S3[i0] -> Stmt_S0[1 + i0] : i0 <= 1022 and i0 >= 0; Stmt_S1[i0, 1023] -> Stmt_S2[i0, o1] : i0 <= 1023 and i0 >= 0 and o1 <= 1023 and o1 >= 0; Stmt_S1[i0, i1] -> Stmt_S2[i0, 0] : i0 <= 1023 and i0 >= 0 and i1 <= 1022 and i1 >= 0 }
; CHECK-NEXT: WAR dependences:
; CHECK-NEXT: { }
; CHECK-NEXT: WAW dependences:
; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S1[i0, o1] : i0 <= 1023 and i0 >= 0 and o1 <= 1023 and o1 >= 0; Stmt_S2[i0, i1] -> Stmt_S3[i0] : i0 <= 1023 and i0 >= 0 and i1 <= 1023 and i1 >= 0; Stmt_S3[i0] -> Stmt_S0[1 + i0] : i0 <= 1022 and i0 >= 0; Stmt_S1[i0, 1023] -> Stmt_S2[i0, o1] : i0 <= 1023 and i0 >= 0 and o1 <= 1023 and o1 >= 0; Stmt_S1[i0, i1] -> Stmt_S2[i0, 0] : i0 <= 1023 and i0 >= 0 and i1 <= 1022 and i1 >= 0 }
; CHECK-NEXT: Reduction dependences:
; CHECK-NEXT: { Stmt_S1[i0, i1] -> Stmt_S1[i0, 1 + i1] : i0 <= 1023 and i0 >= 0 and i1 <= 1022 and i1 >= 0; Stmt_S2[i0, i1] -> Stmt_S2[i0, 1 + i1] : i0 <= 1023 and i0 >= 0 and i1 <= 1022 and i1 >= 0 }
; ;
; void f(int *restrict red) { ; void f(int *restrict red) {
; for (int j = 0; j < 1024; j++) { ; for (int j = 0; j < 1024; j++) {

4
polly/test/DependenceInfo/reduction_partially_escaping_intermediate_in_other_stmt.ll
View File

@ -1,7 +1,7 @@
; RUN: opt %loadPolly -polly-dependences -analyze -basicaa < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze -basicaa < %s | FileCheck %s
; ;
; CHECK: Reduction dependences: ; CHECK: Reduction dependences:
; CHECK: [N] -> { Stmt_for_body3[i0, i1] -> Stmt_for_body3[i0, 1 + i1] : i0 <= 1023 and i0 >= 0 and i1 <= 1022 and i1 >= 0 and i1 >= 1024 - N + i0 } ; CHECK-NEXT: [N] -> { Stmt_for_body3[i0, i1] -> Stmt_for_body3[i0, 1 + i1] : i0 <= 1023 and i0 >= 0 and i1 <= 1022 and i1 >= 0 and i1 >= 1024 - N + i0 }
; ;
; void f(int N, int * restrict sums, int * restrict escape) { ; void f(int N, int * restrict sums, int * restrict escape) {
; for (int i = 0; i < 1024; i++) { ; for (int i = 0; i < 1024; i++) {

17
polly/test/DependenceInfo/reduction_privatization_deps.ll
View File

@ -1,16 +1,13 @@
; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK-DAG: Stmt_S0[i0] -> Stmt_S1[o0, i0 - o0] : i0 <= 1023 and o0 >= 0 and o0 <= i0 ; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S1[o0, i0 - o0] : i0 <= 1023 and o0 >= 0 and o0 <= i0; Stmt_S1[i0, i1] -> Stmt_S2[-1 + i0 + i1] : i1 <= 1023 and i1 >= 0 and i1 >= 1 - i0 and i0 >= 0 and i0 <= 1023 and i1 <= 1024 - i0 }
; CHECK-DAG: Stmt_S1[i0, i1] -> Stmt_S2[-1 + i0 + i1] : i1 <= 1023 and i1 >= 0 and i1 >= 1 - i0 and i0 >= 0 and i0 <= 1023 and i1 <= 1024 - i0 ; CHECK-NEXT: WAR dependences:
; CHECK: WAR dependences: ; CHECK-NEXT: { Stmt_S2[i0] -> Stmt_S2[1 + i0] : i0 <= 1022 and i0 >= 0; Stmt_S1[i0, i1] -> Stmt_S2[i0 + i1] : i1 <= 1023 - i0 and i1 >= 0 and i1 >= 1 - i0 and i0 >= 0 }
; CHECK-DAG: Stmt_S2[i0] -> Stmt_S2[1 + i0] : i0 <= 1022 and i0 >= 0 ; CHECK-NEXT: WAW dependences:
; CHECK-DAG: Stmt_S1[i0, i1] -> Stmt_S2[i0 + i1] : i1 <= 1023 - i0 and i1 >= 0 and i1 >= 1 - i0 and i0 >= 0 } ; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S1[o0, i0 - o0] : i0 <= 1023 and o0 >= 0 and o0 <= i0; Stmt_S1[0, 0] -> Stmt_S2[0] }
; CHECK: WAW dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK-DAG: Stmt_S0[i0] -> Stmt_S1[o0, i0 - o0] : i0 <= 1023 and o0 >= 0 and o0 <= i0 ; CHECK-NEXT: { Stmt_S1[i0, i1] -> Stmt_S1[1 + i0, -1 + i1] : i0 <= 1022 and i0 >= 0 and i1 <= 1023 and i1 >= 1 }
; CHECK-DAG: Stmt_S1[0, 0] -> Stmt_S2[0]
; CHECK: Reduction dependences:
; CHECK-DAG: Stmt_S1[i0, i1] -> Stmt_S1[1 + i0, -1 + i1] : i0 <= 1022 and i0 >= 0 and i1 <= 1023 and i1 >= 1
; ;
; void f(int *sum) { ; void f(int *sum) {
; for (int i = 0; i < 1024; i++) ; for (int i = 0; i < 1024; i++)

18
polly/test/DependenceInfo/reduction_privatization_deps_2.ll
View File

@ -3,16 +3,14 @@
; We have privatization dependences from a textually later statement to a ; We have privatization dependences from a textually later statement to a
; textually earlier one, but the dependences still go forward in time. ; textually earlier one, but the dependences still go forward in time.
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK-DAG: Stmt_S3[i0] -> Stmt_S2[1 + i0, o1] : i0 <= 97 and i0 >= 0 and o1 <= 99 and o1 >= 0 ; CHECK-NEXT: { Stmt_S3[i0] -> Stmt_S2[1 + i0, o1] : i0 <= 97 and i0 >= 0 and o1 <= 99 and o1 >= 0; Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 98 and i0 >= 0 }
; CHECK-DAG: Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 98 and i0 >= 0 ; CHECK-NEXT: WAR dependences:
; CHECK: WAR dependences: ; CHECK-NEXT: { }
; CHECK: { } ; CHECK-NEXT: WAW dependences:
; CHECK: WAW dependences: ; CHECK-NEXT: { Stmt_S3[i0] -> Stmt_S2[1 + i0, o1] : i0 <= 97 and i0 >= 0 and o1 <= 99 and o1 >= 0; Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 98 and i0 >= 0 }
; CHECK-DAG: Stmt_S3[i0] -> Stmt_S2[1 + i0, o1] : i0 <= 97 and i0 >= 0 and o1 <= 99 and o1 >= 0 ; CHECK-NEXT: Reduction dependences:
; CHECK-DAG: Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 98 and i0 >= 0 ; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S2[i0, 1 + i1] : i0 <= 98 and i0 >= 0 and i1 <= 98 and i1 >= 0 }
; CHECK: Reduction dependences:
; CHECK: { Stmt_S2[i0, i1] -> Stmt_S2[i0, 1 + i1] : i0 <= 98 and i0 >= 0 and i1 <= 98 and i1 >= 0 }
; ;
; void f(int *sum) { ; void f(int *sum) {
; int i, j; ; int i, j;

21
polly/test/DependenceInfo/reduction_privatization_deps_3.ll
View File

@ -1,18 +1,13 @@
; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK-DAG: Stmt_S2[i0, i1] -> Stmt_S3[o0] : o0 <= 1 and i1 <= 1 - i0 and o0 <= 1 + i0 - i1 and o0 >= 1 - i1 ; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S3[o0] : o0 <= 1 and i1 <= 1 - i0 and o0 <= 1 + i0 - i1 and o0 >= 1 - i1; Stmt_S3[i0] -> Stmt_S2[o0, 1 - i0] : i0 <= 1 and i0 >= 0 and o0 >= 1 + i0 and o0 <= 98; Stmt_S1[i0] -> Stmt_S3[2 + i0] : i0 <= 96 and i0 >= 0 }
; CHECK-DAG: Stmt_S3[i0] -> Stmt_S2[o0, 1 - i0] : i0 <= 1 and i0 >= 0 and o0 >= 1 + i0 and o0 <= 98 ; CHECK-NEXT: WAR dependences:
; CHECK-DAG: Stmt_S1[i0] -> Stmt_S3[2 + i0] : i0 <= 96 and i0 >= 0 ; CHECK-NEXT: { }
; CHECK: WAR dependences: ; CHECK-NEXT: WAW dependences:
; CHECK: { } ; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S3[o0] : o0 <= 1 and i1 <= 1 - i0 and o0 <= 1 + i0 - i1 and o0 >= 1 - i1; Stmt_S3[i0] -> Stmt_S2[o0, 1 - i0] : i0 <= 1 and i0 >= 0 and o0 >= 1 + i0 and o0 <= 98; Stmt_S1[i0] -> Stmt_S3[2 + i0] : i0 <= 96 and i0 >= 0 }
; CHECK: WAW dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK-DAG: Stmt_S2[i0, i1] -> Stmt_S3[o0] : o0 <= 1 and i1 <= 1 - i0 and o0 <= 1 + i0 - i1 and o0 >= 1 - i1 ; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S2[1 + i0, i1] : i0 <= 97 and i0 >= 0 and i1 <= 98 - i0 and i1 >= 0 and i1 >= 2 - i0; Stmt_S2[0, 0] -> Stmt_S2[1, 0] }
; CHECK-DAG: Stmt_S3[i0] -> Stmt_S2[o0, 1 - i0] : i0 <= 1 and i0 >= 0 and o0 >= 1 + i0 and o0 <= 98
; CHECK-DAG: Stmt_S1[i0] -> Stmt_S3[2 + i0] : i0 <= 96 and i0 >= 0
; CHECK: Reduction dependences:
; CHECK-DAG: Stmt_S2[i0, i1] -> Stmt_S2[1 + i0, i1] : i0 <= 97 and i0 >= 0 and i1 <= 98 - i0 and i1 >= 0 and i1 >= 2 - i0
; CHECK-DAG: Stmt_S2[0, 0] -> Stmt_S2[1, 0]
; ;
; void f(int *sum) { ; void f(int *sum) {
; int i, j; ; int i, j;

22
polly/test/DependenceInfo/reduction_privatization_deps_4.ll
View File

@ -1,19 +1,13 @@
; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK-DAG: Stmt_S2[i0, i1] -> Stmt_S1[i1] : i0 >= 0 and i1 >= 1 + i0 and i1 <= 98 ; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S1[i1] : i0 >= 0 and i1 >= 1 + i0 and i1 <= 98; Stmt_S1[i0] -> Stmt_S2[i0, i0] : i0 <= 98 and i0 >= 0; Stmt_S2[i0, i0] -> Stmt_S3[i0] : i0 <= 98 and i0 >= 0; Stmt_S3[i0] -> Stmt_S2[o0, i0] : i0 >= 0 and o0 >= 1 + i0 and o0 <= 98 }
; CHECK-DAG: Stmt_S1[i0] -> Stmt_S2[i0, i0] : i0 <= 98 and i0 >= 0 ; CHECK-NEXT: WAR dependences:
; CHECK-DAG: Stmt_S2[i0, i0] -> Stmt_S3[i0] : i0 <= 98 and i0 >= 0 ; CHECK-NEXT: { }
; CHECK-DAG: Stmt_S3[i0] -> Stmt_S2[o0, i0] : i0 >= 0 and o0 >= 1 + i0 and o0 <= 98 ; CHECK-NEXT: WAW dependences:
; CHECK: WAR dependences: ; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S1[i1] : i0 >= 0 and i1 >= 1 + i0 and i1 <= 98; Stmt_S1[i0] -> Stmt_S2[i0, i0] : i0 <= 98 and i0 >= 0; Stmt_S2[i0, i0] -> Stmt_S3[i0] : i0 <= 98 and i0 >= 0; Stmt_S3[i0] -> Stmt_S2[o0, i0] : i0 >= 0 and o0 >= 1 + i0 and o0 <= 98 }
; CHECK-DAG: { } ; CHECK-NEXT: Reduction dependences:
; CHECK: WAW dependences: ; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S2[1 + i0, i1] : (i0 >= 0 and i1 >= 2 + i0 and i1 <= 99) or (i0 <= 97 and i1 >= 0 and i1 <= -1 + i0) }
; CHECK-DAG: Stmt_S2[i0, i1] -> Stmt_S1[i1] : i0 >= 0 and i1 >= 1 + i0 and i1 <= 98
; CHECK-DAG: Stmt_S1[i0] -> Stmt_S2[i0, i0] : i0 <= 98 and i0 >= 0
; CHECK-DAG: Stmt_S2[i0, i0] -> Stmt_S3[i0] : i0 <= 98 and i0 >= 0
; CHECK-DAG: Stmt_S3[i0] -> Stmt_S2[o0, i0] : i0 >= 0 and o0 >= 1 + i0 and o0 <= 98
; CHECK: Reduction dependences:
; CHECK-DAG: { Stmt_S2[i0, i1] -> Stmt_S2[1 + i0, i1] : (i0 >= 0 and i1 >= 2 + i0 and i1 <= 99) or (i0 <= 97 and i1 >= 0 and i1 <= -1 + i0) }
; ;
; void f(int *sum) { ; void f(int *sum) {
; for (int i = 0; i < 99; i++) { ; for (int i = 0; i < 99; i++) {

18
polly/test/DependenceInfo/reduction_privatization_deps_5.ll
View File

@ -1,15 +1,13 @@
; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK-DAG: Stmt_S2[i0, 0] -> Stmt_S1[1 + i0, 0] : i0 <= 97 and i0 >= 0 ; CHECK-NEXT: { Stmt_S2[i0, 0] -> Stmt_S1[1 + i0, 0] : i0 <= 97 and i0 >= 0; Stmt_S1[i0, 0] -> Stmt_S2[i0, 0] : i0 <= 98 and i0 >= 0 }
; CHECK-DAG: Stmt_S1[i0, 0] -> Stmt_S2[i0, 0] : i0 <= 98 and i0 >= 0 ; CHECK-NEXT: WAR dependences:
; CHECK: WAR dependences: ; CHECK-NEXT: { }
; CHECK-DAG: { } ; CHECK-NEXT: WAW dependences:
; CHECK: WAW dependences: ; CHECK-NEXT: { Stmt_S2[i0, 0] -> Stmt_S1[1 + i0, 0] : i0 <= 97 and i0 >= 0; Stmt_S1[i0, 0] -> Stmt_S2[i0, 0] : i0 <= 98 and i0 >= 0 }
; CHECK-DAG: Stmt_S2[i0, 0] -> Stmt_S1[1 + i0, 0] : i0 <= 97 and i0 >= 0 ; CHECK-NEXT: Reduction dependences:
; CHECK-DAG: Stmt_S1[i0, 0] -> Stmt_S2[i0, 0] : i0 <= 98 and i0 >= 0 ; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S2[1 + i0, i1] : i0 <= 97 and i0 >= 0 and i1 <= 99 and i1 >= 1 }
; CHECK: Reduction dependences:
; CHECK-DAG: { Stmt_S2[i0, i1] -> Stmt_S2[1 + i0, i1] : i0 <= 97 and i0 >= 0 and i1 <= 99 and i1 >= 1 }
; ;
; void f(int *sum) { ; void f(int *sum) {
; for (int i = 0; i < 99; i++) { ; for (int i = 0; i < 99; i++) {

16
polly/test/DependenceInfo/reduction_simple_iv.ll
View File

@ -1,13 +1,13 @@
; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAR dependences: ; CHECK-NEXT: WAR dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAW dependences: ; CHECK-NEXT: WAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: Reduction dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK: { Stmt_for_cond[i0] -> Stmt_for_cond[1 + i0] : i0 <= 99 and i0 >= 0 } ; CHECK-NEXT: { Stmt_for_cond[i0] -> Stmt_for_cond[1 + i0] : i0 <= 99 and i0 >= 0 }
; ;
; void f(int* sum) { ; void f(int* sum) {
; for (int i = 0; i <= 100; i++) ; for (int i = 0; i <= 100; i++)

115
polly/test/DependenceInfo/reduction_simple_iv_debug_wrapped_dependences.ll
View File

@ -2,60 +2,67 @@
; ;
; REQUIRES: asserts ; REQUIRES: asserts
; ;
; CHECK: Read: { [Stmt_for_cond[i0] -> MemRef_sum[0]] -> MemRef_sum[0] : ; CHECK: Read: { [Stmt_for_cond[i0] -> MemRef_sum[0{{\]\]}} -> MemRef_sum[0] : i0 <= 100 and i0 >= 0 }
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Write: { [Stmt_for_cond[i0] -> MemRef_sum[0{{\]\]}} -> MemRef_sum[0] : i0 <= 100 and i0 >= 0 }
; CHECK-DAG: and ; CHECK-NEXT: MayWrite: { }
; CHECK-DAG: i0 <= 100 ;
; CHECK: } ; CHECK: Wrapped Dependences:
; CHECK: Write: { [Stmt_for_cond[i0] -> MemRef_sum[0]] -> MemRef_sum[0] : ; CHECK-NEXT: RAW dependences:
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: { [Stmt_for_cond[i0] -> MemRef_sum[0{{\]\]}} -> [Stmt_for_cond[1 + i0] -> MemRef_sum[0{{\]\]}} : i0 <= 99 and i0 >= 0 }
; CHECK-DAG: and ; CHECK-NEXT: WAR dependences:
; CHECK-DAG: i0 <= 100 ; CHECK-NEXT: { }
; CHECK: } ; CHECK-NEXT: WAW dependences:
; CHECK: Wrapped Dependences: ; CHECK-NEXT: { [Stmt_for_cond[i0] -> MemRef_sum[0{{\]\]}} -> [Stmt_for_cond[1 + i0] -> MemRef_sum[0{{\]\]}} : i0 <= 99 and i0 >= 0 }
; CHECK: RAW dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK: { [Stmt_for_cond[i0] -> MemRef_sum[0]] -> [Stmt_for_cond[1 + i0] -> MemRef_sum[0]] : i0 <= 99 and i0 >= 0 } ; CHECK-NEXT: n/a
; CHECK: WAR dependences: ;
; CHECK: { } ; CHECK: Final Wrapped Dependences:
; CHECK: WAW dependences: ; CHECK-NEXT: RAW dependences:
; CHECK: { [Stmt_for_cond[i0] -> MemRef_sum[0]] -> [Stmt_for_cond[1 + i0] -> MemRef_sum[0]] : i0 <= 99 and i0 >= 0 } ; CHECK-NEXT: { }
; CHECK: Reduction dependences: ; CHECK-NEXT: WAR dependences:
; CHECK: n/a ; CHECK-NEXT: { }
; CHECK: Final Wrapped Dependences: ; CHECK-NEXT: WAW dependences:
; CHECK: RAW dependences: ; CHECK-NEXT: { }
; CHECK: { } ; CHECK-NEXT: Reduction dependences:
; CHECK: WAR dependences: ; CHECK-NEXT: { [Stmt_for_cond[i0] -> MemRef_sum[0{{\]\]}} -> [Stmt_for_cond[1 + i0] -> MemRef_sum[0{{\]\]}} : i0 <= 99 and i0 >= 0 }
; CHECK: { } ;
; CHECK: WAW dependences: ; CHECK: Zipped Dependences:
; CHECK: { } ; CHECK-NEXT: RAW dependences:
; CHECK: Reduction dependences: ; CHECK-NEXT: { }
; CHECK: { [Stmt_for_cond[i0] -> MemRef_sum[0]] -> [Stmt_for_cond[1 + i0] -> MemRef_sum[0]] : i0 <= 99 and i0 >= 0 } ; CHECK-NEXT: WAR dependences:
; CHECK: Zipped Dependences: ; CHECK-NEXT: { }
; CHECK: RAW dependences: ; CHECK-NEXT: WAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAR dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK: { } ; CHECK-NEXT: { [Stmt_for_cond[i0] -> Stmt_for_cond[1 + i0{{\]\]}} -> [MemRef_sum[0] -> MemRef_sum[0{{\]\]}} : i0 <= 99 and i0 >= 0 }
; CHECK: WAW dependences: ;
; CHECK: { } ; CHECK: Unwrapped Dependences:
; CHECK: Reduction dependences: ; CHECK-NEXT: RAW dependences:
; CHECK: { [Stmt_for_cond[i0] -> Stmt_for_cond[1 + i0]] -> [MemRef_sum[0] -> MemRef_sum[0]] : i0 <= 99 and i0 >= 0 } ; CHECK-NEXT: { }
; CHECK: Unwrapped Dependences: ; CHECK-NEXT: WAR dependences:
; CHECK: RAW dependences: ; CHECK-NEXT: { }
; CHECK: { } ; CHECK-NEXT: WAW dependences:
; CHECK: WAR dependences: ; CHECK-NEXT: { }
; CHECK: { } ; CHECK-NEXT: Reduction dependences:
; CHECK: WAW dependences: ; CHECK-NEXT: { Stmt_for_cond[i0] -> Stmt_for_cond[1 + i0] : i0 <= 99 and i0 >= 0 }
; CHECK: { } ;
; CHECK: Reduction dependences: ; CHECK: RAW dependences:
; CHECK: { Stmt_for_cond[i0] -> Stmt_for_cond[1 + i0] : i0 <= 99 and i0 >= 0 } ; CHECK-NEXT: { }
; CHECK: RAW dependences: ; CHECK-NEXT: WAR dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAR dependences: ; CHECK-NEXT: WAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAW dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK: { } ; CHECK-NEXT: { Stmt_for_cond[i0] -> Stmt_for_cond[1 + i0] : i0 <= 99 and i0 >= 0 }
; CHECK: Reduction dependences: ;
; CHECK: { Stmt_for_cond[i0] -> Stmt_for_cond[1 + i0] : i0 <= 99 and i0 >= 0 } ; CHECK: RAW dependences:
; CHECK-NEXT: { }
; CHECK-NEXT: WAR dependences:
; CHECK-NEXT: { }
; CHECK-NEXT: WAW dependences:
; CHECK-NEXT: { }
; CHECK-NEXT: Reduction dependences:
; CHECK-NEXT: { Stmt_for_cond[i0] -> Stmt_for_cond[1 + i0] : i0 <= 99 and i0 >= 0 }
; ;
; void f(int* sum) { ; void f(int* sum) {
; for (int i = 0; i <= 100; i++) ; for (int i = 0; i <= 100; i++)

18
polly/test/DependenceInfo/reduction_simple_privatization_deps_2.ll
View File

@ -1,17 +1,13 @@
; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK-DAG: Stmt_S1[i0, i1] -> Stmt_S2[i0] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 ; CHECK-NEXT: { Stmt_S2[i0] -> Stmt_S0[1 + i0] : i0 <= 98 and i0 >= 0; Stmt_S0[i0] -> Stmt_S1[i0, o1] : i0 <= 99 and i0 >= 0 and o1 <= 99 and o1 >= 0; Stmt_S1[i0, i1] -> Stmt_S2[i0] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 }
; CHECK-DAG: Stmt_S0[i0] -> Stmt_S1[i0, o1] : i0 <= 99 and i0 >= 0 and o1 <= 99 and o1 >= 0 ; CHECK-NEXT: WAR dependences:
; CHECK-DAG: Stmt_S2[i0] -> Stmt_S0[1 + i0] : i0 <= 98 and i0 >= 0 ; CHECK-NEXT: { }
; CHECK: WAR dependences: ; CHECK-NEXT: WAW dependences:
; CHECK-DAG: { } ; CHECK-NEXT: { Stmt_S2[i0] -> Stmt_S0[1 + i0] : i0 <= 98 and i0 >= 0; Stmt_S0[i0] -> Stmt_S1[i0, o1] : i0 <= 99 and i0 >= 0 and o1 <= 99 and o1 >= 0; Stmt_S1[i0, i1] -> Stmt_S2[i0] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 }
; CHECK: WAW dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK-DAG: Stmt_S1[i0, i1] -> Stmt_S2[i0] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 ; CHECK-NEXT: { Stmt_S1[i0, i1] -> Stmt_S1[i0, 1 + i1] : i0 <= 99 and i0 >= 0 and i1 <= 98 and i1 >= 0 }
; CHECK-DAG: Stmt_S0[i0] -> Stmt_S1[i0, o1] : i0 <= 99 and i0 >= 0 and o1 <= 99 and o1 >= 0
; CHECK-DAG: Stmt_S2[i0] -> Stmt_S0[1 + i0] : i0 <= 98 and i0 >= 0
; CHECK: Reduction dependences:
; CHECK-DAG: Stmt_S1[i0, i1] -> Stmt_S1[i0, 1 + i1] : i0 <= 99 and i0 >= 0 and i1 <= 98 and i1 >= 0
; ;
; void f(int *sum) { ; void f(int *sum) {
; for (int i = 0; i < 100; i++) { ; for (int i = 0; i < 100; i++) {

16
polly/test/DependenceInfo/reduction_simple_privatization_deps_w_parameter.ll
View File

@ -1,15 +1,13 @@
; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK-DAG: Stmt_S0[] -> Stmt_S1[o0] : N >= 11 and o0 <= 1023 and o0 >= 0 ; CHECK-NEXT: [N] -> { Stmt_S0[] -> Stmt_S1[o0] : N >= 11 and o0 <= 1023 and o0 >= 0; Stmt_S1[i0] -> Stmt_S2[] : N >= 11 and i0 <= 1023 and i0 >= 0 }
; CHECK-DAG: Stmt_S1[i0] -> Stmt_S2[] : N >= 11 and i0 <= 1023 and i0 >= 0 ; CHECK-NEXT: WAR dependences:
; CHECK: WAR dependences: ; CHECK-NEXT: [N] -> { }
; CHECK: [N] -> { } ; CHECK-NEXT: WAW dependences:
; CHECK: WAW dependences: ; CHECK-NEXT: [N] -> { Stmt_S0[] -> Stmt_S1[o0] : N >= 11 and o0 <= 1023 and o0 >= 0; Stmt_S1[i0] -> Stmt_S2[] : N >= 11 and i0 <= 1023 and i0 >= 0 }
; CHECK-DAG: Stmt_S0[] -> Stmt_S1[o0] : N >= 11 and o0 <= 1023 and o0 >= 0 ; CHECK-NEXT: Reduction dependences:
; CHECK-DAG: Stmt_S1[i0] -> Stmt_S2[] : N >= 11 and i0 <= 1023 and i0 >= 0 ; CHECK-NEXT: [N] -> { Stmt_S1[i0] -> Stmt_S1[1 + i0] : N >= 11 and i0 <= 1022 and i0 >= 0 }
; CHECK: Reduction dependences:
; CHECK: Stmt_S1[i0] -> Stmt_S1[1 + i0] : N >= 11 and i0 <= 1022 and i0 >= 0
; ;
; void f(int *sum, int N) { ; void f(int *sum, int N) {
; if (N >= 10) { ; if (N >= 10) {

16
polly/test/DependenceInfo/reduction_two_reductions_different_rloops.ll
View File

@ -1,13 +1,13 @@
; RUN: opt %loadPolly -basicaa -polly-dependences -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -basicaa -polly-dependences -analyze < %s | FileCheck %s
; ;
; CHECK: RAW dependences: ; CHECK: RAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAR dependences: ; CHECK-NEXT: WAR dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: WAW dependences: ; CHECK-NEXT: WAW dependences:
; CHECK: { } ; CHECK-NEXT: { }
; CHECK: Reduction dependences: ; CHECK-NEXT: Reduction dependences:
; CHECK-DAG: Stmt_for_body3[i0, i1] -> Stmt_for_body3[o0, 1 + i0 + i1 - o0] : o0 <= 1 + i0 and o0 >= i0 and o0 <= 1023 and i0 >= 0 and i1 >= 0 and o0 >= -1022 + i0 + i1 ; CHECK-NEXT: { Stmt_for_body3[i0, i1] -> Stmt_for_body3[o0, 1 + i0 + i1 - o0] : o0 <= 1 + i0 and o0 >= i0 and o0 <= 1023 and i0 >= 0 and i1 >= 0 and o0 >= -1022 + i0 + i1 }
; ;
; void f(int *restrict A, int *restrict B, int *restrict Values) { ; void f(int *restrict A, int *restrict B, int *restrict Values) {
; for (int i = 0; i < 1024; i++) { ; for (int i = 0; i < 1024; i++) {

168
polly/test/DependenceInfo/sequential_loops.ll
View File

@ -1,5 +1,70 @@
; RUN: opt -S %loadPolly -basicaa -polly-dependences -analyze -polly-dependences-analysis-type=value-based < %s | FileCheck %s -check-prefix=VALUE ; RUN: opt -S %loadPolly -basicaa -polly-dependences -analyze -polly-dependences-analysis-type=value-based < %s | FileCheck %s -check-prefix=VALUE
; RUN: opt -S %loadPolly -basicaa -polly-dependences -analyze -polly-dependences-analysis-type=memory-based < %s | FileCheck %s -check-prefix=MEMORY ; RUN: opt -S %loadPolly -basicaa -polly-dependences -analyze -polly-dependences-analysis-type=memory-based < %s | FileCheck %s -check-prefix=MEMORY
; VALUE-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'sequential_writes':
; VALUE-NEXT: RAW dependences:
; VALUE-NEXT: { }
; VALUE-NEXT: WAR dependences:
; VALUE-NEXT: { }
; VALUE-NEXT: WAW dependences:
; VALUE-NEXT: { Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0; Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0; Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 10 }
;
; VALUE-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'read_after_writes':
; VALUE-NEXT: RAW dependences:
; VALUE-NEXT: { Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0; Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 10 }
; VALUE-NEXT: WAR dependences:
; VALUE-NEXT: { }
; VALUE-NEXT: WAW dependences:
; VALUE-NEXT: { Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0 }
;
; VALUE-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'write_after_read':
; VALUE-NEXT: RAW dependences:
; VALUE-NEXT: { }
; VALUE-NEXT: WAR dependences:
; VALUE-NEXT: { Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0; Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 10 }
; VALUE-NEXT: WAW dependences:
; VALUE-NEXT: { Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0 }
;
; VALUE-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.2' in function 'parametric_offset':
; VALUE-NEXT: RAW dependences:
; VALUE-NEXT: [p] -> { Stmt_S1[i0] -> Stmt_S2[-p + i0] : i0 <= 9 + p and i0 >= p and i0 <= 99 and i0 >= 0 }
; VALUE-NEXT: WAR dependences:
; VALUE-NEXT: [p] -> { }
; VALUE-NEXT: WAW dependences:
; VALUE-NEXT: [p] -> { }
; MEMORY-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'sequential_writes':
; MEMORY-NEXT: RAW dependences:
; MEMORY-NEXT: { }
; MEMORY-NEXT: WAR dependences:
; MEMORY-NEXT: { }
; MEMORY-NEXT: WAW dependences:
; MEMORY-NEXT: { Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0; Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0; Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 0 }
;
; MEMORY-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'read_after_writes':
; MEMORY-NEXT: RAW dependences:
; MEMORY-NEXT: { Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0; Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 0 }
; MEMORY-NEXT: WAR dependences:
; MEMORY-NEXT: { }
; MEMORY-NEXT: WAW dependences:
; MEMORY-NEXT: { Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0 }
;
; MEMORY-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'write_after_read':
; MEMORY-NEXT: RAW dependences:
; MEMORY-NEXT: { }
; MEMORY-NEXT: WAR dependences:
; MEMORY-NEXT: { Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0; Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 0 }
; MEMORY-NEXT: WAW dependences:
; MEMORY-NEXT: { Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0 }
;
; MEMORY-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.2' in function 'parametric_offset':
; MEMORY-NEXT: RAW dependences:
; MEMORY-NEXT: [p] -> { Stmt_S1[i0] -> Stmt_S2[-p + i0] : i0 >= p and i0 <= 99 and i0 >= 0 and i0 <= 9 + p }
; MEMORY-NEXT: WAR dependences:
; MEMORY-NEXT: [p] -> { }
; MEMORY-NEXT: WAW dependences:
; MEMORY-NEXT: [p] -> { }
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
; for(i = 0; i < 100; i++ ) ; for(i = 0; i < 100; i++ )
@ -50,29 +115,6 @@ exit.3:
ret void ret void
} }
; VALUE-LABEL: region: 'S1 => exit.3' in function 'sequential_writes':
; VALUE: RAW dependences:
; VALUE: { }
; VALUE: WAR dependences:
; VALUE: { }
; VALUE: WAW dependences:
; VALUE: {
; VALUE: Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0;
; VALUE: Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0;
; VALUE: Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 10
; VALUE: }
; MEMORY-LABEL: region: 'S1 => exit.3' in function 'sequential_writes':
; MEMORY: RAW dependences:
; MEMORY: { }
; MEMORY: WAR dependences:
; MEMORY: { }
; MEMORY: WAW dependences:
; MEMORY: {
; MEMORY: Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0;
; MEMORY: Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0;
; MEMORY: Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 0
; MEMORY: }
; for(i = 0; i < 100; i++ ) ; for(i = 0; i < 100; i++ )
; S1: A[i] = 2; ; S1: A[i] = 2;
@ -125,31 +167,6 @@ exit.3:
ret void ret void
} }
; VALUE-LABEL: region: 'S1 => exit.3' in function 'read_after_writes':
; VALUE: RAW dependences:
; VALUE: {
; VALUE: Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0;
; VALUE: Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 10
; VALUE: }
; VALUE: WAR dependences:
; VALUE: { }
; VALUE: WAW dependences:
; VALUE: {
; VALUE: Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0
; VALUE: }
; MEMORY-LABEL: region: 'S1 => exit.3' in function 'read_after_writes':
; MEMORY: RAW dependences:
; MEMORY: {
; MEMORY: Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0;
; MEMORY: Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 0
; MEMORY: }
; MEMORY: WAR dependences:
; MEMORY: { }
; MEMORY: WAW dependences:
; MEMORY: {
; MEMORY: Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0
; MEMORY: }
; for(i = 0; i < 100; i++ ) ; for(i = 0; i < 100; i++ )
; S1: B[i] = A[i]; ; S1: B[i] = A[i];
@ -202,33 +219,6 @@ exit.3:
ret void ret void
} }
; VALUE-LABEL: region: 'S1 => exit.3' in function 'write_after_read':
; VALUE: RAW dependences:
; VALUE: {
; VALUE: }
; VALUE: WAR dependences:
; VALUE: {
; VALUE: Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0;
; VALUE: Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 10
; VALUE: }
; VALUE: WAW dependences:
; VALUE: {
; VALUE: Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0
; VALUE: }
; MEMORY-LABEL: region: 'S1 => exit.3' in function 'write_after_read':
; MEMORY: RAW dependences:
; MEMORY: {
; MEMORY: }
; MEMORY: WAR dependences:
; MEMORY: {
; MEMORY: Stmt_S1[i0] -> Stmt_S2[i0] : i0 <= 9 and i0 >= 0;
; MEMORY: Stmt_S1[i0] -> Stmt_S3[i0] : i0 <= 99 and i0 >= 0
; MEMORY: }
; MEMORY: WAW dependences:
; MEMORY: {
; MEMORY: Stmt_S2[i0] -> Stmt_S3[i0] : i0 <= 9 and i0 >= 0
; MEMORY: }
; for(i = 0; i < 100; i++ ) ; for(i = 0; i < 100; i++ )
; S1: A[i] = 10 ; S1: A[i] = 10
@ -268,31 +258,3 @@ exit.2:
ret void ret void
} }
; VALUE: region: 'S1 => exit.2' in function 'parametric_offset':
; VALUE: RAW dependences:
; VALUE: [p] -> {
; VALUE: Stmt_S1[i0] -> Stmt_S2[-p + i0] :
; VALUE-DAG: i0 >= p
; VALUE-DAG: i0 <= 9 + p
; VALUE-DAG: i0 <= 99
; VALUE-DAG: i0 >= 0
; VALUE: }
; VALUE: WAR dependences:
; VALUE: [p] -> {
; VALUE: }
; VALUE: WAW dependences:
; VALUE: [p] -> {
; VALUE: }
; MEMORY: region: 'S1 => exit.2' in function 'parametric_offset':
; MEMORY: RAW dependences:
; MEMORY: [p] -> {
; MEMORY: Stmt_S1[i0] -> Stmt_S2[-p + i0] :
; MEMORY: i0 >= p and i0 <= 99 and i0 >= 0 and i0 <= 9 + p
; MEMORY: }
; MEMORY: WAR dependences:
; MEMORY: [p] -> {
; MEMORY: }
; MEMORY: WAW dependences:
; MEMORY: [p] -> {
; MEMORY: }

38
polly/test/ScheduleOptimizer/full_partial_tile_separation.ll
View File

@ -1,23 +1,23 @@
; RUN: opt -S %loadPolly -polly-vectorizer=stripmine -polly-opt-isl -polly-ast -analyze < %s | FileCheck %s ; RUN: opt -S %loadPolly -polly-vectorizer=stripmine -polly-opt-isl -polly-ast -analyze < %s | FileCheck %s
; CHECK: // 1st level tiling - Tiles ; CHECK: // 1st level tiling - Tiles
; CHECK: #pragma known-parallel ; CHECK-NEXT: #pragma known-parallel
; CHECK: for (int c0 = 0; c0 <= floord(ni - 1, 32); c0 += 1) ; CHECK-NEXT: for (int c0 = 0; c0 <= floord(ni - 1, 32); c0 += 1)
; CHECK: for (int c1 = 0; c1 <= floord(nj - 1, 32); c1 += 1) ; CHECK-NEXT: for (int c1 = 0; c1 <= floord(nj - 1, 32); c1 += 1)
; CHECK: for (int c2 = 0; c2 <= floord(nk - 1, 32); c2 += 1) { ; CHECK-NEXT: for (int c2 = 0; c2 <= floord(nk - 1, 32); c2 += 1) {
; CHECK: // 1st level tiling - Points ; CHECK-NEXT: // 1st level tiling - Points
; CHECK: for (int c3 = 0; c3 <= min(31, ni - 32 * c0 - 1); c3 += 1) { ; CHECK-NEXT: for (int c3 = 0; c3 <= min(31, ni - 32 * c0 - 1); c3 += 1) {
; CHECK: for (int c4 = 0; c4 <= min(7, -8 * c1 + nj / 4 - 1); c4 += 1) ; CHECK-NEXT: for (int c4 = 0; c4 <= min(7, -8 * c1 + nj / 4 - 1); c4 += 1)
; CHECK: for (int c5 = 0; c5 <= min(31, nk - 32 * c2 - 1); c5 += 1) ; CHECK-NEXT: for (int c5 = 0; c5 <= min(31, nk - 32 * c2 - 1); c5 += 1)
; CHECK: #pragma simd ; CHECK-NEXT: #pragma simd
; CHECK: for (int c6 = 0; c6 <= 3; c6 += 1) ; CHECK-NEXT: for (int c6 = 0; c6 <= 3; c6 += 1)
; CHECK: Stmt_for_body_6(32 * c0 + c3, 32 * c1 + 4 * c4 + c6, 32 * c2 + c5); ; CHECK-NEXT: Stmt_for_body_6(32 * c0 + c3, 32 * c1 + 4 * c4 + c6, 32 * c2 + c5);
; CHECK: if (32 * c1 + 31 >= nj) ; CHECK-NEXT: if (32 * c1 + 31 >= nj)
; CHECK: for (int c5 = 0; c5 <= min(31, nk - 32 * c2 - 1); c5 += 1) ; CHECK-NEXT: for (int c5 = 0; c5 <= min(31, nk - 32 * c2 - 1); c5 += 1)
; CHECK: #pragma simd ; CHECK-NEXT: #pragma simd
; CHECK: for (int c6 = 0; c6 < nj % 4; c6 += 1) ; CHECK-NEXT: for (int c6 = 0; c6 < nj % 4; c6 += 1)
; CHECK: Stmt_for_body_6(32 * c0 + c3, -((nj - 1) % 4) + nj + c6 - 1, 32 * c2 + c5); ; CHECK-NEXT: Stmt_for_body_6(32 * c0 + c3, -((nj - 1) % 4) + nj + c6 - 1, 32 * c2 + c5);
; CHECK: } ; CHECK-NEXT: }
; CHECK: } ; CHECK-NEXT: }
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define void @kernel_gemm(i32 %ni, i32 %nj, i32 %nk, double %alpha, double %beta, [1024 x double]* %C, [1024 x double]* %A, [1024 x double]* %B) #0 { define void @kernel_gemm(i32 %ni, i32 %nj, i32 %nk, double %alpha, double %beta, [1024 x double]* %C, [1024 x double]* %A, [1024 x double]* %B) #0 {

29
polly/test/ScopInfo/20111108-Parameter-not-detected.ll
View File

@ -50,15 +50,22 @@ for.end7: ; preds = %for.cond
ret i32 0 ret i32 0
} }
; CHECK: Context: ; CHECK: p0: {0,+,1}<%for.cond>
; CHECK: p0: {0,+,1}<%for.cond> ;
; CHECK: Statements {
; CHECK: Domain := ; CHECK-NEXT: Stmt_if_then
; CHECK: [p_0] -> { Stmt_if_then[i0] : ; CHECK-NEXT: Domain :=
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: [p_0] -> { Stmt_if_then[i0] : i0 <= 1022 and i0 >= 0 and i0 >= 999 - p_0 };
; CHECK-DAG: and ; CHECK-NEXT: Schedule :=
; CHECK-DAG: i0 <= 1022 ; CHECK-NEXT: [p_0] -> { Stmt_if_then[i0] -> [0, i0] };
; CHECK-DAG: and ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: i0 >= 999 - p_0 ; CHECK-NEXT: [p_0] -> { Stmt_if_then[i0] -> MemRef_A[i0] };
; CHECK: } ; CHECK-NEXT: Stmt_for_inc5
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [p_0] -> { Stmt_for_inc5[] };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [p_0] -> { Stmt_for_inc5[] -> [1, 0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [p_0] -> { Stmt_for_inc5[] -> MemRef_indvar_out_next[] };
; CHECK-NEXT: }

26
polly/test/ScopInfo/NonAffine/div_domain.ll
View File

@ -8,12 +8,26 @@
; } ; }
; } ; }
; ;
; CHECK: Stmt_for_body ; CHECK: Statements {
; CHECK: Domain := ; CHECK-NEXT: Stmt_for_body
; CHECK: { Stmt_for_body[i0] : i0 <= 15 and i0 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Stmt_if_then ; CHECK-NEXT: { Stmt_for_body[i0] : i0 <= 15 and i0 >= 0 };
; CHECK: Domain := ; CHECK-NEXT: Schedule :=
; CHECK: { Stmt_if_then[i0] : i0 <= 7 and i0 >= 6 }; ; CHECK-NEXT: { Stmt_for_body[i0] -> [i0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_if_then
; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_if_then[i0] : i0 <= 7 and i0 >= 6 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_if_then[i0] -> [i0, 1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_if_then[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_if_then[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
; ;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

60
polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_1.ll
View File

@ -7,32 +7,40 @@
; RUN: -polly-allow-nonaffine-branches -polly-allow-nonaffine-loops=true \ ; RUN: -polly-allow-nonaffine-branches -polly-allow-nonaffine-loops=true \
; RUN: -analyze < %s | FileCheck %s -check-prefix=PROFIT ; RUN: -analyze < %s | FileCheck %s -check-prefix=PROFIT
; ;
; SCALAR: Function: f ; SCALAR: Function: f
; SCALAR: Region: %bb1---%bb13 ; SCALAR-NEXT: Region: %bb1---%bb13
; SCALAR: Max Loop Depth: 1 ; SCALAR-NEXT: Max Loop Depth: 1
; SCALAR: Context: ; SCALAR-NEXT: Invariant Accesses: {
; SCALAR: { : } ; SCALAR-NEXT: }
; SCALAR: Assumed Context: ; SCALAR-NEXT: Context:
; SCALAR: { : } ; SCALAR-NEXT: { : }
; SCALAR: Alias Groups (0): ; SCALAR-NEXT: Assumed Context:
; SCALAR: n/a ; SCALAR-NEXT: { : }
; SCALAR: Statements { ; SCALAR-NEXT: Boundary Context:
; SCALAR: Stmt_bb3__TO__bb11 ; SCALAR-NEXT: { : }
; SCALAR: Domain := ; SCALAR-NEXT: Arrays {
; SCALAR: { Stmt_bb3__TO__bb11[i0] : ; SCALAR-NEXT: i32 MemRef_C[*]; // Element size 4
; SCALAR-DAG: i0 >= 0 ; SCALAR-NEXT: i32 MemRef_A[*]; // Element size 4
; SCALAR-DAG: and ; SCALAR-NEXT: }
; SCALAR-DAG: i0 <= 1023 ; SCALAR-NEXT: Arrays (Bounds as pw_affs) {
; SCALAR: } ; SCALAR-NEXT: i32 MemRef_C[*]; // Element size 4
; SCALAR: Schedule := ; SCALAR-NEXT: i32 MemRef_A[*]; // Element size 4
; SCALAR: { Stmt_bb3__TO__bb11[i0] -> [i0] }; ; SCALAR-NEXT: }
; SCALAR: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; SCALAR-NEXT: Alias Groups (0):
; SCALAR: { Stmt_bb3__TO__bb11[i0] -> MemRef_C[i0] }; ; SCALAR-NEXT: n/a
; SCALAR: ReadAccess := [Reduction Type: +] [Scalar: 0] ; SCALAR-NEXT: Statements {
; SCALAR: { Stmt_bb3__TO__bb11[i0] -> MemRef_A[o0] : o0 <= 2147483645 and o0 >= -2147483648 }; ; SCALAR-NEXT: Stmt_bb3__TO__bb11
; SCALAR: MayWriteAccess := [Reduction Type: +] [Scalar: 0] ; SCALAR-NEXT: Domain :=
; SCALAR: { Stmt_bb3__TO__bb11[i0] -> MemRef_A[o0] : o0 <= 2147483645 and o0 >= -2147483648 }; ; SCALAR-NEXT: { Stmt_bb3__TO__bb11[i0] : i0 <= 1023 and i0 >= 0 };
; SCALAR: } ; SCALAR-NEXT: Schedule :=
; SCALAR-NEXT: { Stmt_bb3__TO__bb11[i0] -> [i0] };
; SCALAR-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; SCALAR-NEXT: { Stmt_bb3__TO__bb11[i0] -> MemRef_C[i0] };
; SCALAR-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; SCALAR-NEXT: { Stmt_bb3__TO__bb11[i0] -> MemRef_A[o0] : o0 <= 2147483645 and o0 >= -2147483648 };
; SCALAR-NEXT: MayWriteAccess := [Reduction Type: +] [Scalar: 0]
; SCALAR-NEXT: { Stmt_bb3__TO__bb11[i0] -> MemRef_A[o0] : o0 <= 2147483645 and o0 >= -2147483648 };
; SCALAR-NEXT: }
; PROFIT-NOT: Statements ; PROFIT-NOT: Statements
; ;

152
polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_2.ll
View File

@ -15,72 +15,92 @@
; innermost loop in the whole loop nest and model A[k] as a non-affine ; innermost loop in the whole loop nest and model A[k] as a non-affine
; access. ; access.
; ;
; INNERMOST: Function: f ; INNERMOST: Function: f
; INNERMOST: Region: %bb15---%bb13 ; INNERMOST-NEXT: Region: %bb15---%bb13
; INNERMOST: Max Loop Depth: 1 ; INNERMOST-NEXT: Max Loop Depth: 1
; INNERMOST: p0: {0,+,{0,+,1}<nuw><nsw><%bb11>}<nuw><nsw><%bb13> ; INNERMOST-NEXT: Invariant Accesses: {
; INNERMOST: p1: {0,+,4}<nuw><nsw><%bb11> ; INNERMOST-NEXT: }
; INNERMOST: p2: {0,+,4}<nuw><nsw><%bb13> ; INNERMOST-NEXT: Context:
; INNERMOST: p3: {0,+,{0,+,4}<nuw><nsw><%bb11>}<%bb13> ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { : p_0 >= 0 and p_0 <= 1048576 and p_1 >= 0 and p_1 <= 4096 and p_2 >= 0 and p_2 <= 4096 and p_3 >= 0 and p_3 <= 4194304 }
; INNERMOST: Alias Groups (0): ; INNERMOST-NEXT: Assumed Context:
; INNERMOST: n/a ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { : }
; INNERMOST: Statements { ; INNERMOST-NEXT: Boundary Context:
; INNERMOST: Stmt_bb16 ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { : }
; INNERMOST: Domain := ; INNERMOST-NEXT: p0: {0,+,{0,+,1}<nuw><nsw><%bb11>}<nuw><nsw><%bb13>
; INNERMOST: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] : i0 <= 1023 - p_0 and i0 >= 0 } ; INNERMOST-NEXT: p1: {0,+,4}<nuw><nsw><%bb11>
; INNERMOST: Schedule := ; INNERMOST-NEXT: p2: {0,+,4}<nuw><nsw><%bb13>
; INNERMOST: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] -> [0, i0] } ; INNERMOST-NEXT: p3: {0,+,{0,+,4}<nuw><nsw><%bb11>}<%bb13>
; INNERMOST: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; INNERMOST-NEXT: Arrays {
; INNERMOST: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_1 }; ; INNERMOST-NEXT: i32 MemRef_A[*]; // Element size 4
; INNERMOST: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; INNERMOST-NEXT: i64 MemRef_indvars_iv_next6; // Element size 8
; INNERMOST: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_2 }; ; INNERMOST-NEXT: i64 MemRef_indvars_iv_next4; // Element size 8
; INNERMOST: ReadAccess := [Reduction Type: +] [Scalar: 0] ; INNERMOST-NEXT: }
; INNERMOST: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_3 + 4i0 }; ; INNERMOST-NEXT: Arrays (Bounds as pw_affs) {
; INNERMOST: MustWriteAccess := [Reduction Type: +] [Scalar: 0] ; INNERMOST-NEXT: i32 MemRef_A[*]; // Element size 4
; INNERMOST: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_3 + 4i0 }; ; INNERMOST-NEXT: i64 MemRef_indvars_iv_next6; // Element size 8
; INNERMOST: Stmt_bb26 ; INNERMOST-NEXT: i64 MemRef_indvars_iv_next4; // Element size 8
; INNERMOST: Domain := ; INNERMOST-NEXT: }
; INNERMOST: [p_0, p_1, p_2, p_3] -> { Stmt_bb26[] : p_0 <= 1024 }; ; INNERMOST-NEXT: Alias Groups (0):
; INNERMOST: Schedule := ; INNERMOST-NEXT: n/a
; INNERMOST: [p_0, p_1, p_2, p_3] -> { Stmt_bb26[] -> [1, 0] }; ; INNERMOST-NEXT: Statements {
; INNERMOST: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; INNERMOST-NEXT: Stmt_bb16
; INNERMOST: [p_0, p_1, p_2, p_3] -> { Stmt_bb26[] -> MemRef_indvars_iv_next6[] }; ; INNERMOST-NEXT: Domain :=
; INNERMOST: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] : i0 <= 1023 - p_0 and i0 >= 0 };
; INNERMOST: [p_0, p_1, p_2, p_3] -> { Stmt_bb26[] -> MemRef_indvars_iv_next4[] }; ; INNERMOST-NEXT: Schedule :=
; INNERMOST: } ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] -> [0, i0] };
; ; INNERMOST-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL: Function: f ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_1 };
; ALL: Region: %bb11---%bb29 ; INNERMOST-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL: Max Loop Depth: 2 ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_2 };
; ALL: Context: ; INNERMOST-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; ALL: { : } ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_3 + 4i0 };
; ALL: Assumed Context: ; INNERMOST-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; ALL: { : } ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_3 + 4i0 };
; ALL: Alias Groups (0): ; INNERMOST-NEXT: Stmt_bb26
; ALL: n/a ; INNERMOST-NEXT: Domain :=
; ALL: Statements { ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { Stmt_bb26[] : p_0 <= 1024 };
; ALL: Stmt_bb15__TO__bb25 ; INNERMOST-NEXT: Schedule :=
; ALL: Domain := ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { Stmt_bb26[] -> [1, 0] };
; ALL: { Stmt_bb15__TO__bb25[i0, i1] : ; INNERMOST-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; ALL-DAG: i0 >= 0 ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { Stmt_bb26[] -> MemRef_indvars_iv_next6[] };
; ALL-DAG: and ; INNERMOST-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; ALL-DAG: i0 <= 1023 ; INNERMOST-NEXT: [p_0, p_1, p_2, p_3] -> { Stmt_bb26[] -> MemRef_indvars_iv_next4[] };
; ALL-DAG: and ; INNERMOST-NEXT: }
; ALL-DAG: i1 >= 0
; ALL-DAG: and ; ALL: Function: f
; ALL-DAG: i1 <= 1023 ; ALL-NEXT: Region: %bb11---%bb29
; ALL: } ; ALL-NEXT: Max Loop Depth: 2
; ALL: Schedule := ; ALL-NEXT: Invariant Accesses: {
; ALL: { Stmt_bb15__TO__bb25[i0, i1] -> [i0, i1] }; ; ALL-NEXT: }
; ALL: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: Context:
; ALL: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[i0] }; ; ALL-NEXT: { : }
; ALL: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: Assumed Context:
; ALL: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[i1] }; ; ALL-NEXT: { : }
; ALL: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: Boundary Context:
; ALL: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[o0] : o0 <= 2305843009213693949 and o0 >= 0 }; ; ALL-NEXT: { : }
; ALL: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: Arrays {
; ALL: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[o0] : o0 <= 2305843009213693949 and o0 >= 0 }; ; ALL-NEXT: i32 MemRef_A[*]; // Element size 4
; ALL: } ; ALL-NEXT: }
; ALL-NEXT: Arrays (Bounds as pw_affs) {
; ALL-NEXT: i32 MemRef_A[*]; // Element size 4
; ALL-NEXT: }
; ALL-NEXT: Alias Groups (0):
; ALL-NEXT: n/a
; ALL-NEXT: Statements {
; ALL-NEXT: Stmt_bb15__TO__bb25
; ALL-NEXT: Domain :=
; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] : i0 <= 1023 and i0 >= 0 and i1 <= 1023 and i1 >= 0 };
; ALL-NEXT: Schedule :=
; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] -> [i0, i1] };
; ALL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[i0] };
; ALL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[i1] };
; ALL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[o0] : o0 <= 2305843009213693949 and o0 >= 0 };
; ALL-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[o0] : o0 <= 2305843009213693949 and o0 >= 0 };
; ALL-NEXT: }
; ;
; void f(int *A) { ; void f(int *A) {
; for (int i = 0; i < 1024; i++) ; for (int i = 0; i < 1024; i++)

170
polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_3.ll
View File

@ -14,91 +14,91 @@
; innermost loop in the whole loop nest and model A[k] as a non-affine ; innermost loop in the whole loop nest and model A[k] as a non-affine
; access. ; access.
; ;
; INNERMOST: Function: f ; INNERMOST: Function: f
; INNERMOST: Region: %bb15---%bb13 ; INNERMOST-NEXT: Region: %bb15---%bb13
; INNERMOST: Max Loop Depth: 1 ; INNERMOST-NEXT: Max Loop Depth: 1
; INNERMOST: Context: ; INNERMOST-NEXT: Invariant Accesses: {
; INNERMOST: [p_0, p_1, p_2] -> { : ; INNERMOST-NEXT: }
; INNERMOST-DAG: p_0 >= 0 ; INNERMOST-NEXT: Context:
; INNERMOST-DAG: and ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { : p_0 >= 0 and p_0 <= 2147483647 and p_1 >= 0 and p_1 <= 4096 and p_2 >= 0 and p_2 <= 4096 }
; INNERMOST-DAG: p_0 <= 2147483647 ; INNERMOST-NEXT: Assumed Context:
; INNERMOST-DAG: and ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { : }
; INNERMOST-DAG: p_1 >= 0 ; INNERMOST-NEXT: Boundary Context:
; INNERMOST-DAG: and ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { : }
; INNERMOST-DAG: p_1 <= 4096 ; INNERMOST-NEXT: p0: {0,+,{0,+,1}<nuw><nsw><%bb11>}<nuw><nsw><%bb13>
; INNERMOST-DAG: and ; INNERMOST-NEXT: p1: {0,+,4}<nuw><nsw><%bb11>
; INNERMOST-DAG: p_2 >= 0 ; INNERMOST-NEXT: p2: {0,+,4}<nuw><nsw><%bb13>
; INNERMOST-DAG: and ; INNERMOST-NEXT: Arrays {
; INNERMOST-DAG: p_2 <= 4096 ; INNERMOST-NEXT: i32 MemRef_A[*]; // Element size 4
; INNERMOST: } ; INNERMOST-NEXT: i64 MemRef_indvars_iv_next6; // Element size 8
; INNERMOST: Assumed Context: ; INNERMOST-NEXT: i32 MemRef_indvars_iv_next4; // Element size 4
; INNERMOST: [p_0, p_1, p_2] -> { : } ; INNERMOST-NEXT: }
; INNERMOST: p0: {0,+,{0,+,1}<nuw><nsw><%bb11>}<nuw><nsw><%bb13> ; INNERMOST-NEXT: Arrays (Bounds as pw_affs) {
; INNERMOST: p1: {0,+,4}<nuw><nsw><%bb11> ; INNERMOST-NEXT: i32 MemRef_A[*]; // Element size 4
; INNERMOST: p2: {0,+,4}<nuw><nsw><%bb13> ; INNERMOST-NEXT: i64 MemRef_indvars_iv_next6; // Element size 8
; INNERMOST: Alias Groups (0): ; INNERMOST-NEXT: i32 MemRef_indvars_iv_next4; // Element size 4
; INNERMOST: n/a ; INNERMOST-NEXT: }
; INNERMOST: Statements { ; INNERMOST-NEXT: Alias Groups (0):
; INNERMOST: Stmt_bb16 ; INNERMOST-NEXT: n/a
; INNERMOST: Domain := ; INNERMOST-NEXT: Statements {
; INNERMOST: [p_0, p_1, p_2] -> { Stmt_bb16[i0] : ; INNERMOST-NEXT: Stmt_bb16
; INNERMOST-DAG: i0 >= 0 ; INNERMOST-NEXT: Domain :=
; INNERMOST-DAG: and ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { Stmt_bb16[i0] : i0 >= 0 and i0 <= -1 + p_0 };
; INNERMOST-DAG: i0 <= -1 + p_0 ; INNERMOST-NEXT: Schedule :=
; INNERMOST-DAG: }; ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { Stmt_bb16[i0] -> [0, i0] };
; INNERMOST: Schedule := ; INNERMOST-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; INNERMOST: [p_0, p_1, p_2] -> { Stmt_bb16[i0] -> [0, i0] }; ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_1 };
; INNERMOST: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; INNERMOST-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; INNERMOST: [p_0, p_1, p_2] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_1 }; ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_2 };
; INNERMOST: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; INNERMOST-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; INNERMOST: [p_0, p_1, p_2] -> { Stmt_bb16[i0] -> MemRef_A[o0] : 4o0 = p_2 }; ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { Stmt_bb16[i0] -> MemRef_A[i0] };
; INNERMOST: ReadAccess := [Reduction Type: +] [Scalar: 0] ; INNERMOST-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; INNERMOST: [p_0, p_1, p_2] -> { Stmt_bb16[i0] -> MemRef_A[i0] }; ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { Stmt_bb16[i0] -> MemRef_A[i0] };
; INNERMOST: MustWriteAccess := [Reduction Type: +] [Scalar: 0] ; INNERMOST-NEXT: Stmt_bb26
; INNERMOST: [p_0, p_1, p_2] -> { Stmt_bb16[i0] -> MemRef_A[i0] }; ; INNERMOST-NEXT: Domain :=
; INNERMOST: Stmt_bb26 ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { Stmt_bb26[] : p_0 >= 0 };
; INNERMOST: Domain := ; INNERMOST-NEXT: Schedule :=
; INNERMOST: [p_0, p_1, p_2] -> { Stmt_bb26[] : p_0 >= 0 }; ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { Stmt_bb26[] -> [1, 0] };
; INNERMOST: Schedule := ; INNERMOST-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; INNERMOST: [p_0, p_1, p_2] -> { Stmt_bb26[] -> [1, 0] }; ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { Stmt_bb26[] -> MemRef_indvars_iv_next6[] };
; INNERMOST: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; INNERMOST-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; INNERMOST: [p_0, p_1, p_2] -> { Stmt_bb26[] -> MemRef_indvars_iv_next6[] }; ; INNERMOST-NEXT: [p_0, p_1, p_2] -> { Stmt_bb26[] -> MemRef_indvars_iv_next4[] };
; INNERMOST: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; INNERMOST-NEXT: }
; INNERMOST: [p_0, p_1, p_2] -> { Stmt_bb26[] -> MemRef_indvars_iv_next4[] };
; INNERMOST: } ; ALL: Function: f
; ; ALL-NEXT: Region: %bb11---%bb29
; ALL: Function: f ; ALL-NEXT: Max Loop Depth: 2
; ALL: Region: %bb11---%bb29 ; ALL-NEXT: Invariant Accesses: {
; ALL: Max Loop Depth: 2 ; ALL-NEXT: }
; ALL: Context: ; ALL-NEXT: Context:
; ALL: { : } ; ALL-NEXT: { : }
; ALL: Assumed Context: ; ALL-NEXT: Assumed Context:
; ALL: { : } ; ALL-NEXT: { : }
; ALL: Alias Groups (0): ; ALL-NEXT: Boundary Context:
; ALL: n/a ; ALL-NEXT: { : }
; ALL: Statements { ; ALL-NEXT: Arrays {
; ALL: Stmt_bb15__TO__bb25 ; ALL-NEXT: i32 MemRef_A[*]; // Element size 4
; ALL: Domain := ; ALL-NEXT: }
; ALL: { Stmt_bb15__TO__bb25[i0, i1] : ; ALL-NEXT: Arrays (Bounds as pw_affs) {
; ALL-DAG: i0 >= 0 ; ALL-NEXT: i32 MemRef_A[*]; // Element size 4
; ALL-DAG: and ; ALL-NEXT: }
; ALL-DAG: i0 <= 1023 ; ALL-NEXT: Alias Groups (0):
; ALL-DAG: and ; ALL-NEXT: n/a
; ALL-DAG: i1 >= 0 ; ALL-NEXT: Statements {
; ALL-DAG: and ; ALL-NEXT: Stmt_bb15__TO__bb25
; ALL-DAG: i1 <= 1023 ; ALL-NEXT: Domain :=
; ALL: } ; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] : i0 <= 1023 and i0 >= 0 and i1 <= 1023 and i1 >= 0 };
; ALL: Schedule := ; ALL-NEXT: Schedule :=
; ALL: { Stmt_bb15__TO__bb25[i0, i1] -> [i0, i1] }; ; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] -> [i0, i1] };
; ALL: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[i0] }; ; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[i0] };
; ALL: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[i1] }; ; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[i1] };
; ALL: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[o0] : o0 <= 4294967293 and o0 >= 0 }; ; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[o0] : o0 <= 4294967293 and o0 >= 0 };
; ALL: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[o0] : o0 <= 4294967293 and o0 >= 0 }; ; ALL-NEXT: { Stmt_bb15__TO__bb25[i0, i1] -> MemRef_A[o0] : o0 <= 4294967293 and o0 >= 0 };
; ALL: } ; ALL-NEXT: }
; ;
; void f(int *A) { ; void f(int *A) {
; for (int i = 0; i < 1024; i++) ; for (int i = 0; i < 1024; i++)

15
polly/test/ScopInfo/NonAffine/non_affine_access_with_range_2.ll
View File

@ -6,10 +6,17 @@
; A[i * j]++; ; A[i * j]++;
; } ; }
; ;
; CHECK: ReadAccess := [Reduction Type: +] [Scalar: 0] ; CHECK: Statements {
; CHECK: { Stmt_bb7[i0, i1] -> MemRef_A[o0] : o0 <= 2046 and o0 >= 0 }; ; CHECK-NEXT: Stmt_bb7
; CHECK: MayWriteAccess := [Reduction Type: +] [Scalar: 0] ; CHECK-NEXT: Domain :=
; CHECK: { Stmt_bb7[i0, i1] -> MemRef_A[o0] : o0 <= 2046 and o0 >= 0 }; ; CHECK-NEXT: { Stmt_bb7[i0, i1] : i0 <= 127 and i0 >= 0 and i1 <= 15 and i1 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_bb7[i0, i1] -> [i0, i1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb7[i0, i1] -> MemRef_A[o0] : o0 <= 2046 and o0 >= 0 };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb7[i0, i1] -> MemRef_A[o0] : o0 <= 2046 and o0 >= 0 };
; CHECK-NEXT: }
; ;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

17
polly/test/ScopInfo/NonAffine/non_affine_but_sdiv.ll
View File

@ -1,9 +1,18 @@
; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
; ;
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK: Statements {
; CHECK: [N] -> { Stmt_for_body[i0] -> MemRef_A[o0] : 5o0 >= -4 + N + 5i0 and 5o0 <= N + 5i0 }; ; CHECK-NEXT: Stmt_for_body
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: Domain :=
; CHECK: [N] -> { Stmt_for_body[i0] -> MemRef_A[o0] : 5o0 <= 4 - N + 5i0 and 5o0 >= -N + 5i0 }; ; CHECK-NEXT: [N] -> { Stmt_for_body[i0] : i0 >= 0 and i0 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] -> [i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] -> MemRef_A[o0] : 5o0 >= -4 + N + 5i0 and 5o0 <= N + 5i0 };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] -> MemRef_A[o0] : 5o0 <= 4 - N + 5i0 and 5o0 >= -N + 5i0 };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
; ;
; void f(int *A, int N) { ; void f(int *A, int N) {
; for (int i = 0; i < N; i++) ; for (int i = 0; i < N; i++)

41
polly/test/ScopInfo/NonAffine/non_affine_but_srem.ll
View File

@ -6,29 +6,36 @@
; A[n % 42] += 1; ; A[n % 42] += 1;
; } ; }
; ;
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [n] -> { Stmt_bb2[i0] -> MemRef_A[o0] :
; CHECK: exists (e0 = floor((-n + o0)/42):
; CHECK: 42e0 = -n + o0 and o0 <= 41 and o0 >= 0) };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [n] -> { Stmt_bb2[i0] -> MemRef_A[o0] :
; CHECK: exists (e0 = floor((-n + o0)/42):
; CHECK: 42e0 = -n + o0 and o0 <= 41 and o0 >= 0) };
; ;
; void neg(float *A, long n) { ; void neg(float *A, long n) {
; for (long i = 0; i < 100; i++) ; for (long i = 0; i < 100; i++)
; A[n % (-42)] += 1; ; A[n % (-42)] += 1;
; } ; }
; CHECK: Statements {
; CHECK-NEXT: Stmt_bb2
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [n] -> { Stmt_bb2[i0] : i0 <= 99 and i0 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [n] -> { Stmt_bb2[i0] -> [i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_bb2[i0] -> MemRef_A[o0] : exists (e0 = floor((-n + o0)/42): 42e0 = -n + o0 and o0 <= 41 and o0 >= 0) };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_bb2[i0] -> MemRef_A[o0] : exists (e0 = floor((-n + o0)/42): 42e0 = -n + o0 and o0 <= 41 and o0 >= 0) };
; CHECK-NEXT: }
; ;
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK: Statements {
; CHECK: [n] -> { Stmt_bb2[i0] -> MemRef_A[o0] : ; CHECK-NEXT: Stmt_bb2
; CHECK: exists (e0 = floor((-n + o0)/42): ; CHECK-NEXT: Domain :=
; CHECK: 42e0 = -n + o0 and o0 <= 41 and o0 >= 0) }; ; CHECK-NEXT: [n] -> { Stmt_bb2[i0] : i0 <= 99 and i0 >= 0 };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: Schedule :=
; CHECK: [n] -> { Stmt_bb2[i0] -> MemRef_A[o0] : ; CHECK-NEXT: [n] -> { Stmt_bb2[i0] -> [i0] };
; CHECK: exists (e0 = floor((-n + o0)/42): ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: 42e0 = -n + o0 and o0 <= 41 and o0 >= 0) }; ; CHECK-NEXT: [n] -> { Stmt_bb2[i0] -> MemRef_A[o0] : exists (e0 = floor((-n + o0)/42): 42e0 = -n + o0 and o0 <= 41 and o0 >= 0) };
; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_bb2[i0] -> MemRef_A[o0] : exists (e0 = floor((-n + o0)/42): 42e0 = -n + o0 and o0 <= 41 and o0 >= 0) };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @pos(float* %A, i64 %n) { define void @pos(float* %A, i64 %n) {

58
polly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_affine_loop.ll
View File

@ -20,32 +20,38 @@
; ;
; INNERMOST-NOT: Function: f ; INNERMOST-NOT: Function: f
; ;
; ALL: Function: f ; ALL: Function: f
; ALL: Region: %bb3---%bb19 ; ALL-NEXT: Region: %bb3---%bb19
; ALL: Max Loop Depth: 1 ; ALL-NEXT: Max Loop Depth: 1
; ALL: Context: ; ALL-NEXT: Invariant Accesses: {
; ALL: { : } ; ALL-NEXT: }
; ALL: Assumed Context: ; ALL-NEXT: Context:
; ALL: { : } ; ALL-NEXT: { : }
; ALL: Alias Groups (0): ; ALL-NEXT: Assumed Context:
; ALL: n/a ; ALL-NEXT: { : }
; ALL: Statements { ; ALL-NEXT: Boundary Context:
; ALL: Stmt_bb4__TO__bb17 ; ALL-NEXT: { : }
; ALL: Domain := ; ALL-NEXT: Arrays {
; ALL: { Stmt_bb4__TO__bb17[i0] : ; ALL-NEXT: i32 MemRef_A[*]; // Element size 4
; ALL-DAG: i0 >= 0 ; ALL-NEXT: }
; ALL-DAG: and ; ALL-NEXT: Arrays (Bounds as pw_affs) {
; ALL-DAG: i0 <= 1023 ; ALL-NEXT: i32 MemRef_A[*]; // Element size 4
; ALL: } ; ALL-NEXT: }
; ALL: Schedule := ; ALL-NEXT: Alias Groups (0):
; ALL: { Stmt_bb4__TO__bb17[i0] -> [i0] }; ; ALL-NEXT: n/a
; ALL: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: Statements {
; ALL: { Stmt_bb4__TO__bb17[i0] -> MemRef_A[i0] }; ; ALL-NEXT: Stmt_bb4__TO__bb17
; ALL: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: Domain :=
; ALL: { Stmt_bb4__TO__bb17[i0] -> MemRef_A[o0] : o0 <= 2147483645 and o0 >= 0 }; ; ALL-NEXT: { Stmt_bb4__TO__bb17[i0] : i0 <= 1023 and i0 >= 0 };
; ALL: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: Schedule :=
; ALL: { Stmt_bb4__TO__bb17[i0] -> MemRef_A[o0] : o0 <= 2147483645 and o0 >= 0 }; ; ALL-NEXT: { Stmt_bb4__TO__bb17[i0] -> [i0] };
; ALL: } ; ALL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL-NEXT: { Stmt_bb4__TO__bb17[i0] -> MemRef_A[i0] };
; ALL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL-NEXT: { Stmt_bb4__TO__bb17[i0] -> MemRef_A[o0] : o0 <= 2147483645 and o0 >= 0 };
; ALL-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL-NEXT: { Stmt_bb4__TO__bb17[i0] -> MemRef_A[o0] : o0 <= 2147483645 and o0 >= 0 };
; ALL-NEXT: }
; ;
; void f(int *A, int N) { ; void f(int *A, int N) {
; for (int i = 0; i < 1024; i++) ; for (int i = 0; i < 1024; i++)

58
polly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_non_affine_loop.ll
View File

@ -24,32 +24,38 @@
; ;
; INNERMOST-NOT: Function: f ; INNERMOST-NOT: Function: f
; ;
; ALL: Function: f ; ALL: Function: f
; ALL: Region: %bb3---%bb20 ; ALL-NEXT: Region: %bb3---%bb20
; ALL: Max Loop Depth: 1 ; ALL-NEXT: Max Loop Depth: 1
; ALL: Context: ; ALL-NEXT: Invariant Accesses: {
; ALL: { : } ; ALL-NEXT: }
; ALL: Assumed Context: ; ALL-NEXT: Context:
; ALL: { : } ; ALL-NEXT: { : }
; ALL: Alias Groups (0): ; ALL-NEXT: Assumed Context:
; ALL: n/a ; ALL-NEXT: { : }
; ALL: Statements { ; ALL-NEXT: Boundary Context:
; ALL: Stmt_bb4__TO__bb18 ; ALL-NEXT: { : }
; ALL: Domain := ; ALL-NEXT: Arrays {
; ALL: { Stmt_bb4__TO__bb18[i0] : ; ALL-NEXT: i32 MemRef_A[*]; // Element size 4
; ALL-DAG: i0 >= 0 ; ALL-NEXT: }
; ALL-DAG: and ; ALL-NEXT: Arrays (Bounds as pw_affs) {
; ALL-DAG: i0 <= 1023 ; ALL-NEXT: i32 MemRef_A[*]; // Element size 4
; ALL: } ; ALL-NEXT: }
; ALL: Schedule := ; ALL-NEXT: Alias Groups (0):
; ALL: { Stmt_bb4__TO__bb18[i0] -> [i0] }; ; ALL-NEXT: n/a
; ALL: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: Statements {
; ALL: { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] }; ; ALL-NEXT: Stmt_bb4__TO__bb18
; ALL: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: Domain :=
; ALL: { Stmt_bb4__TO__bb18[i0] -> MemRef_A[o0] : o0 <= 2199023254526 and o0 >= 0 }; ; ALL-NEXT: { Stmt_bb4__TO__bb18[i0] : i0 <= 1023 and i0 >= 0 };
; ALL: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; ALL-NEXT: Schedule :=
; ALL: { Stmt_bb4__TO__bb18[i0] -> MemRef_A[o0] : o0 <= 2199023254526 and o0 >= 0 }; ; ALL-NEXT: { Stmt_bb4__TO__bb18[i0] -> [i0] };
; ALL: } ; ALL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL-NEXT: { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] };
; ALL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL-NEXT: { Stmt_bb4__TO__bb18[i0] -> MemRef_A[o0] : o0 <= 2199023254526 and o0 >= 0 };
; ALL-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; ALL-NEXT: { Stmt_bb4__TO__bb18[i0] -> MemRef_A[o0] : o0 <= 2199023254526 and o0 >= 0 };
; ALL-NEXT: }
; ;
; PROFIT-NOT: Statements ; PROFIT-NOT: Statements
; ;

56
polly/test/ScopInfo/NonAffine/non_affine_float_compare.ll
View File

@ -7,28 +7,40 @@
; A[i]++; ; A[i]++;
; } ; }
; ;
; CHECK: Function: f ; CHECK: Function: f
; CHECK: Region: %bb1---%bb14 ; CHECK-NEXT: Region: %bb1---%bb14
; CHECK: Max Loop Depth: 1 ; CHECK-NEXT: Max Loop Depth: 1
; CHECK: Statements { ; CHECK-NEXT: Invariant Accesses: {
; CHECK: Stmt_bb2__TO__bb12 ; CHECK-NEXT: }
; CHECK: Domain := ; CHECK-NEXT: Context:
; CHECK: { Stmt_bb2__TO__bb12[i0] : ; CHECK-NEXT: { : }
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Assumed Context:
; CHECK-DAG: and ; CHECK-NEXT: { : }
; CHECK-DAG: i0 <= 1023 ; CHECK-NEXT: Boundary Context:
; CHECK: } ; CHECK-NEXT: { : }
; CHECK: Schedule := ; CHECK-NEXT: Arrays {
; CHECK: { Stmt_bb2__TO__bb12[i0] -> [i0] }; ; CHECK-NEXT: float MemRef_A[*]; // Element size 4
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: }
; CHECK: { Stmt_bb2__TO__bb12[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: Arrays (Bounds as pw_affs) {
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: float MemRef_A[*]; // Element size 4
; CHECK: { Stmt_bb2__TO__bb12[i0] -> MemRef_A[-1 + i0] }; ; CHECK-NEXT: }
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: Alias Groups (0):
; CHECK: { Stmt_bb2__TO__bb12[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: n/a
; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: Statements {
; CHECK: { Stmt_bb2__TO__bb12[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: Stmt_bb2__TO__bb12
; CHECK: } ; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_bb2__TO__bb12[i0] : i0 <= 1023 and i0 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_bb2__TO__bb12[i0] -> [i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2__TO__bb12[i0] -> MemRef_A[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2__TO__bb12[i0] -> MemRef_A[-1 + i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2__TO__bb12[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2__TO__bb12[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(float* %A) { define void @f(float* %A) {

54
polly/test/ScopInfo/NonAffine/non_affine_loop_condition.ll
View File

@ -21,26 +21,40 @@
; } ; }
; } ; }
; ;
; CHECK: Function: f ; CHECK: Function: f
; CHECK: Region: %bb1---%bb12 ; CHECK-NEXT: Region: %bb1---%bb12
; CHECK: Max Loop Depth: 1 ; CHECK-NEXT: Max Loop Depth: 1
; CHECK: Statements { ; CHECK-NEXT: Invariant Accesses: {
; CHECK: Stmt_bb3__TO__bb10 ; CHECK-NEXT: }
; CHECK: Domain := ; CHECK-NEXT: Context:
; CHECK: { Stmt_bb3__TO__bb10[i0] : ; CHECK-NEXT: { : }
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Assumed Context:
; CHECK-DAG: and ; CHECK-NEXT: { : }
; CHECK-DAG: i0 <= 1023 ; CHECK-NEXT: Boundary Context:
; CHECK: } ; CHECK-NEXT: { : }
; CHECK: Schedule := ; CHECK-NEXT: Arrays {
; CHECK: { Stmt_bb3__TO__bb10[i0] -> [i0] }; ; CHECK-NEXT: i32 MemRef_C[*]; // Element size 4
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: i32 MemRef_A[*]; // Element size 4
; CHECK: { Stmt_bb3__TO__bb10[i0] -> MemRef_C[i0] }; ; CHECK-NEXT: }
; CHECK: ReadAccess := [Reduction Type: +] [Scalar: 0] ; CHECK-NEXT: Arrays (Bounds as pw_affs) {
; CHECK: { Stmt_bb3__TO__bb10[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: i32 MemRef_C[*]; // Element size 4
; CHECK: MayWriteAccess := [Reduction Type: +] [Scalar: 0] ; CHECK-NEXT: i32 MemRef_A[*]; // Element size 4
; CHECK: { Stmt_bb3__TO__bb10[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: }
; CHECK: } ; CHECK-NEXT: Alias Groups (1):
; CHECK-NEXT: {{\[\[}} <{ MemRef_C[(0)] }, { MemRef_C[(1024)] }> <{ MemRef_A[(0)] }, { MemRef_A[(1024)] }> {{\]\]}}
; CHECK-NEXT: Statements {
; CHECK-NEXT: Stmt_bb3__TO__bb10
; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_bb3__TO__bb10[i0] : i0 <= 1023 and i0 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_bb3__TO__bb10[i0] -> [i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb3__TO__bb10[i0] -> MemRef_C[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb3__TO__bb10[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb3__TO__bb10[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
; PROFIT-NOT: Statements ; PROFIT-NOT: Statements

137
polly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll
View File

@ -9,61 +9,88 @@
; Verify that we over approximate the read acces of A[j] in the last statement as j is ; Verify that we over approximate the read acces of A[j] in the last statement as j is
; computed in a non-affine loop we do not model. ; computed in a non-affine loop we do not model.
; ;
; CHECK: Function: f ; CHECK: Function: f
; CHECK: Region: %bb2---%bb24 ; CHECK-NEXT: Region: %bb2---%bb24
; CHECK: Max Loop Depth: 1 ; CHECK-NEXT: Max Loop Depth: 1
; CHECK: Context: ; CHECK-NEXT: Invariant Accesses: {
; CHECK: [N] -> { : ; CHECK-NEXT: }
; CHECK-DAG: N >= -2147483648 ; CHECK-NEXT: Context:
; CHECK-DAG: and ; CHECK-NEXT: [N] -> { : N >= -2147483648 and N <= 2147483647 }
; CHECK-DAG: N <= 2147483647 ; CHECK-NEXT: Assumed Context:
; CHECK: } ; CHECK-NEXT: [N] -> { : }
; CHECK: Assumed Context: ; CHECK-NEXT: Boundary Context:
; CHECK: [N] -> { : } ; CHECK-NEXT: [N] -> { : }
; CHECK: p0: %N ; CHECK-NEXT: p0: %N
; CHECK: Alias Groups (0): ; CHECK-NEXT: Arrays {
; CHECK: n/a ; CHECK-NEXT: i32 MemRef_j_0__phi; // Element size 4
; CHECK: Statements { ; CHECK-NEXT: i32 MemRef_j_0; // Element size 4
; CHECK: Stmt_bb2 ; CHECK-NEXT: i32 MemRef_A[*]; // Element size 4
; CHECK: [N] -> { Stmt_bb2[i0] -> MemRef_j_0__phi[] }; ; CHECK-NEXT: i32 MemRef_smax; // Element size 4
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: i32 MemRef_j_2__phi; // Element size 4
; CHECK: [N] -> { Stmt_bb2[i0] -> MemRef_j_0[] }; ; CHECK-NEXT: i32 MemRef_j_2; // Element size 4
; CHECK: Stmt_bb4__TO__bb18 ; CHECK-NEXT: }
; CHECK: Schedule := ; CHECK-NEXT: Arrays (Bounds as pw_affs) {
; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> [i0, 1] }; ; CHECK-NEXT: i32 MemRef_j_0__phi; // Element size 4
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: i32 MemRef_j_0; // Element size 4
; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: i32 MemRef_A[*]; // Element size 4
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: i32 MemRef_smax; // Element size 4
; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: i32 MemRef_j_2__phi; // Element size 4
; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: i32 MemRef_j_2; // Element size 4
; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: }
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: Alias Groups (0):
; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_smax[] }; ; CHECK-NEXT: n/a
; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: Statements {
; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] }; ; CHECK-NEXT: Stmt_bb2
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: Domain :=
; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_0[] }; ; CHECK-NEXT: [N] -> { Stmt_bb2[i0] : i0 >= 0 and i0 <= N; Stmt_bb2[0] : N <= -1 };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: Schedule :=
; CHECK: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] }; ; CHECK-NEXT: [N] -> { Stmt_bb2[i0] -> [i0, 0] : i0 <= N; Stmt_bb2[0] -> [0, 0] : N <= -1 };
; CHECK: Stmt_bb18 ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Schedule := ; CHECK-NEXT: [N] -> { Stmt_bb2[i0] -> MemRef_j_0__phi[] };
; CHECK: [N] -> { Stmt_bb18[i0] -> [i0, 2] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: [N] -> { Stmt_bb2[i0] -> MemRef_j_0[] };
; CHECK: [N] -> { Stmt_bb18[i0] -> MemRef_j_2[] }; ; CHECK-NEXT: Stmt_bb4__TO__bb18
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: Domain :=
; CHECK: [N] -> { Stmt_bb18[i0] -> MemRef_j_2__phi[] }; ; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] : i0 >= 0 and i0 <= -1 + N };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: Schedule :=
; CHECK: [N] -> { Stmt_bb18[i0] -> MemRef_A[o0] : o0 >= -2147483648 and o0 <= 2147483645 }; ; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> [i0, 1] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [N] -> { Stmt_bb18[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] };
; CHECK: Stmt_bb23 ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: Schedule := ; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] };
; CHECK: [N] -> { Stmt_bb23[i0] -> [i0, 3] }; ; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] };
; CHECK: [N] -> { Stmt_bb23[i0] -> MemRef_j_2[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_smax[] };
; CHECK: [N] -> { Stmt_bb23[i0] -> MemRef_j_0__phi[] }; ; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: } ; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_0[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] };
; CHECK-NEXT: Stmt_bb18
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_bb18[i0] : i0 >= 0 and i0 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> [i0, 2] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_j_2[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_j_2__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_A[o0] : o0 >= -2147483648 and o0 <= 2147483645 };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_bb23
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_bb23[i0] : i0 <= -1 + N and i0 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_bb23[i0] -> [i0, 3] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_bb23[i0] -> MemRef_j_2[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_bb23[i0] -> MemRef_j_0__phi[] };
; CHECK-NEXT: }
; ;
; PROFIT-NOT: Statements ; PROFIT-NOT: Statements
; ;

21
polly/test/ScopInfo/NonAffine/non_affine_parametric_loop.ll
View File

@ -24,11 +24,16 @@ for.end:
ret void ret void
} }
; CHECK: p0: %n ; CHECK: p0: %n
;
; CHECK: Schedule ; CHECK: Statements {
; CHECK: [n] -> { Stmt_for_body[i0] -> [i0] }; ; CHECK-NEXT: Stmt_for_body
; CHECK: ReadAccess ; CHECK-NEXT: Domain :=
; CHECK: [n] -> { Stmt_for_body[i0] -> MemRef_INDEX[i0] }; ; CHECK-NEXT: [n] -> { Stmt_for_body[i0] : i0 >= 0 and i0 <= -1 + n };
; CHECK: WriteAccess ; CHECK-NEXT: Schedule :=
; CHECK: [n] -> { Stmt_for_body[i0] -> MemRef_A[o0] : o0 >= -1152921504606846976 and o0 <= 1152921504606846973 }; ; CHECK-NEXT: [n] -> { Stmt_for_body[i0] -> [i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_for_body[i0] -> MemRef_INDEX[i0] };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_for_body[i0] -> MemRef_A[o0] : o0 >= -1152921504606846976 and o0 <= 1152921504606846973 };
; CHECK-NEXT: }

8
polly/test/ScopInfo/assume_gep_bounds_2.ll
View File

@ -15,12 +15,8 @@
; is such that the first loop is never executed and consequently A is never ; is such that the first loop is never executed and consequently A is never
; accessed. In this case the value of m does not matter. ; accessed. In this case the value of m does not matter.
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK-NEXT: [n, m, p] -> { : ; CHECK-NEXT: [n, m, p] -> { : (n <= 0 and p <= 20) or (n >= 1 and m <= 20 and p <= 20) }
; CHECK-DAG: (n >= 1 and m <= 20 and p <= 20)
; CHECK-DAG: or
; CHECK-DAG: (n <= 0 and p <= 20)
; CHECK: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

342
polly/test/ScopInfo/cfg_consequences.ll
View File

@ -43,178 +43,176 @@
; M_NEQ: *A = 0; ; M_NEQ: *A = 0;
; ;
; } ; }
; CHECK: Stmt_BC ; CHECK: Statements {
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_BC
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] -> [0] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] -> [0] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_S_BC ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_S_BC
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] : bool_cond <= -1 or bool_cond >= 1 }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] : bool_cond <= -1 or bool_cond >= 1 };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] -> [1] : bool_cond <= -1 or bool_cond >= 1 }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] -> [1] : bool_cond <= -1 or bool_cond >= 1 };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_M_BC ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_M_BC
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] -> [2] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] -> [2] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_NEG_BC ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_NEG_BC
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] -> [3] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] -> [3] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_S_NEG_BC ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_S_NEG_BC
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] : bool_cond = 0 }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] : bool_cond = 0 };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] -> [4] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] -> [4] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_M_NEG_BC ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_M_NEG_BC
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] -> [5] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] -> [5] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_SLT ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_SLT
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] -> [6] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] -> [6] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_S_SLT ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_S_SLT
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] : rhs >= 1 + lhs }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] : rhs >= 1 + lhs };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] -> [7] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] -> [7] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_M_SLT ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_M_SLT
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] -> [8] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] -> [8] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_SLE ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_SLE
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] -> [9] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] -> [9] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_S_SLE ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_S_SLE
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] : rhs >= lhs }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] : rhs >= lhs };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] -> [10] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] -> [10] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_M_SLE ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_M_SLE
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] -> [11] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] -> [11] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_SGT ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_SGT
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] -> [12] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] -> [12] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_S_SGT ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_S_SGT
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] : rhs <= -1 + lhs }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] : rhs <= -1 + lhs };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] -> [13] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] -> [13] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_M_SGT ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_M_SGT
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] -> [14] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] -> [14] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_SGE ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_SGE
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] -> [15] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] -> [15] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_S_SGE ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_S_SGE
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] : rhs <= lhs }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] : rhs <= lhs };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] -> [16] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] -> [16] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_M_SGE ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_M_SGE
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] -> [17] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] -> [17] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_EQ ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_EQ
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] -> [18] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] -> [18] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_S_EQ ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_S_EQ
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] : rhs = lhs }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] : rhs = lhs };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] -> [19] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] -> [19] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_M_EQ ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_M_EQ
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] -> [20] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] -> [20] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_NEQ ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_NEQ
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] }; ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] -> [21] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] -> [21] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] -> MemRef_A[0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Stmt_S_NEQ ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] -> MemRef_A[0] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_S_NEQ
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] : ; CHECK-NEXT: Domain :=
; CHECK-DAG: rhs >= 1 + lhs ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] : rhs >= 1 + lhs or rhs <= -1 + lhs };
; CHECK-DAG: or ; CHECK-NEXT: Schedule :=
; CHECK-DAG: rhs <= -1 + lhs ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] -> [22] : rhs >= 1 + lhs or rhs <= -1 + lhs };
; CHECK: }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] -> MemRef_A[0] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] -> [22] : rhs >= 1 + lhs or rhs <= -1 + lhs }; ; CHECK-NEXT: Stmt_M_NEQ
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: Domain :=
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] -> MemRef_A[0] }; ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] };
; CHECK-NEXT: Stmt_M_NEQ ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: Domain := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] -> [23] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] -> MemRef_A[0] };
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] -> [23] }; ; CHECK-NEXT: }
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] -> MemRef_A[0] };
; ;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

61
polly/test/ScopInfo/complex-loop-nesting.ll
View File

@ -1,34 +1,35 @@
; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
;
; CHECK: Stmt_for_body_outer ; CHECK: Statements {
; CHECK: Domain := ; CHECK-NEXT: Stmt_for_body_outer
; CHECK: { Stmt_for_body_outer[i0] : i0 <= 257 and i0 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_for_body_outer[i0] : i0 <= 257 and i0 >= 0 };
; CHECK: { Stmt_for_body_outer[i0] -> [i0, 0, 0, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_for_body_outer[i0] -> [i0, 0, 0, 0] };
; CHECK: { Stmt_for_body_outer[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_for_body_outer[i0] -> MemRef_A[i0] };
; CHECK: { Stmt_for_body_outer[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: Stmt_for_body ; CHECK-NEXT: { Stmt_for_body_outer[i0] -> MemRef_A[i0] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_for_body
; CHECK: { Stmt_for_body[257, i1] : i1 <= 1025 and i1 >= 0; Stmt_for_body[i0, 0] : i0 <= 256 and i0 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_for_body[257, i1] : i1 <= 1025 and i1 >= 0; Stmt_for_body[i0, 0] : i0 <= 256 and i0 >= 0 };
; CHECK: { Stmt_for_body[257, i1] -> [257, 1, i1, 0]; Stmt_for_body[i0, 0] -> [i0, 1, 0, 0] : i0 <= 256 }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_for_body[257, i1] -> [257, 1, i1, 0]; Stmt_for_body[i0, 0] -> [i0, 1, 0, 0] : i0 <= 256 };
; CHECK: { Stmt_for_body[i0, i1] -> MemRef_A[i1] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_for_body[i0, i1] -> MemRef_A[i1] };
; CHECK: { Stmt_for_body[i0, i1] -> MemRef_A[i1] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: Stmt_for_inc ; CHECK-NEXT: { Stmt_for_body[i0, i1] -> MemRef_A[i1] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_for_inc
; CHECK: { Stmt_for_inc[257, i1] : i1 <= 1025 and i1 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_for_inc[257, i1] : i1 <= 1025 and i1 >= 0 };
; CHECK: { Stmt_for_inc[i0, i1] -> [257, 1, i1, 1] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_for_inc[i0, i1] -> [257, 1, i1, 1] };
; CHECK: { Stmt_for_inc[i0, i1] -> MemRef_A[i1] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_for_inc[i0, i1] -> MemRef_A[i1] };
; CHECK: { Stmt_for_inc[i0, i1] -> MemRef_A[i1] } ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; ; CHECK-NEXT: { Stmt_for_inc[i0, i1] -> MemRef_A[i1] };
; ModuleID = 'bugpoint-reduced-simplified.bc' ; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-i128:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-i128:128-n8:16:32:64-S128"
define void @foo(i32* %A) { define void @foo(i32* %A) {

35
polly/test/ScopInfo/eager-binary-and-or-conditions.ll
View File

@ -14,18 +14,35 @@
; A[i] += i; ; A[i] += i;
; } ; }
; } ; }
; CHECK-LABEL: Function: or
; ;
; CHECK: Function: or ; CHECK: Statements {
; CHECK: Stmt_if_then ; CHECK-NEXT: Stmt_if_then
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: [n, m] -> { Stmt_if_then[i0] : (i0 <= 99 and i0 >= 0 and i0 <= -1 + m) or (i0 <= 99 and i0 >= 0 and i0 <= -1 + n) }; ; CHECK-NEXT: [n, m] -> { Stmt_if_then[i0] : (i0 <= 99 and i0 >= 0 and i0 <= -1 + m) or (i0 <= 99 and i0 >= 0 and i0 <= -1 + n) };
; ; CHECK-NEXT: Schedule :=
; CHECK: Function: and ; CHECK-NEXT: [n, m] -> { Stmt_if_then[i0] -> [i0] : i0 <= -1 + m or i0 <= -1 + n };
; CHECK: Stmt_if_then ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: Domain := ; CHECK-NEXT: [n, m] -> { Stmt_if_then[i0] -> MemRef_A[i0] };
; CHECK: [n, m] -> { Stmt_if_then[i0] : i0 <= 99 and i0 >= 0 and i0 <= -1 + m and i0 <= -1 + n } ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n, m] -> { Stmt_if_then[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
; ;
; CHECK-LABEL: Function: and
; ;
; CHECK: Statements {
; CHECK-NEXT: Stmt_if_then
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [n, m] -> { Stmt_if_then[i0] : i0 <= 99 and i0 >= 0 and i0 <= -1 + m and i0 <= -1 + n };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [n, m] -> { Stmt_if_then[i0] -> [i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n, m] -> { Stmt_if_then[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n, m] -> { Stmt_if_then[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable

9
polly/test/ScopInfo/exit_phi_accesses-2.ll
View File

@ -1,19 +1,20 @@
; RUN: opt %loadPolly -analyze -polly-scops %s | FileCheck %s ; RUN: opt %loadPolly -analyze -polly-scops %s | FileCheck %s
; CHECK-LABEL: Function: foo ; CHECK-LABEL: Function: foo
;
; CHECK: Statements { ; CHECK: Statements {
; CHECK-NEXT: Stmt_body ; CHECK-NEXT: Stmt_body
; CHECK-NEXT: Domain := ; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_body[i0] : i0 <= 100 and i0 >= 0 }; ; CHECK-NEXT: { Stmt_body[i0] : i0 <= 100 and i0 >= 0 };
; CHECK-NEXT: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_body[i0] -> [i0] }; ; CHECK-NEXT: { Stmt_body[i0] -> [i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_body[i0] -> MemRef_sum__phi[] }; ; CHECK-NEXT: { Stmt_body[i0] -> MemRef_sum__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_body[i0] -> MemRef_sum__phi[] }; ; CHECK-NEXT: { Stmt_body[i0] -> MemRef_sum__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_body[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: { Stmt_body[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_body[i0] -> MemRef_sum_next[] }; ; CHECK-NEXT: { Stmt_body[i0] -> MemRef_sum_next[] };
; CHECK-NEXT: } ; CHECK-NEXT: }

5
polly/test/ScopInfo/exit_phi_accesses.ll
View File

@ -5,20 +5,21 @@
; PHI ReadAccess. ; PHI ReadAccess.
; CHECK-LABEL: Function: foo ; CHECK-LABEL: Function: foo
;
; CHECK: Statements { ; CHECK: Statements {
; CHECK-NEXT: Stmt_header ; CHECK-NEXT: Stmt_header
; CHECK-NEXT: Domain := ; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_header[] }; ; CHECK-NEXT: { Stmt_header[] };
; CHECK-NEXT: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_header[] -> [0, 0] }; ; CHECK-NEXT: { Stmt_header[] -> [0, 0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_header[] -> MemRef_phi[] }; ; CHECK-NEXT: { Stmt_header[] -> MemRef_phi[] };
; CHECK-NEXT: Stmt_body ; CHECK-NEXT: Stmt_body
; CHECK-NEXT: Domain := ; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_body[i0] : i0 <= 100 and i0 >= 0 }; ; CHECK-NEXT: { Stmt_body[i0] : i0 <= 100 and i0 >= 0 };
; CHECK-NEXT: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_body[i0] -> [1, i0] }; ; CHECK-NEXT: { Stmt_body[i0] -> [1, i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_body[i0] -> MemRef_phi[] }; ; CHECK-NEXT: { Stmt_body[i0] -> MemRef_phi[] };
; CHECK-NEXT: } ; CHECK-NEXT: }

19
polly/test/ScopInfo/intra-non-affine-stmt-phi-node.ll
View File

@ -1,29 +1,28 @@
; RUN: opt %loadPolly -polly-scops -analyze \ ; RUN: opt %loadPolly -polly-scops -analyze \
; RUN: -S < %s | FileCheck %s ; RUN: -S < %s | FileCheck %s
; CHECK: Statements {
; CHECK: Statements { ; CHECK-NEXT: Stmt_loop__TO__backedge
; CHECK-NEXT: Stmt_loop__TO__backedge
; CHECK-NEXT: Domain := ; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] : i0 <= 100 and i0 >= 0 }; ; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] : i0 <= 100 and i0 >= 0 };
; CHECK-NEXT: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> [i0, 0] }; ; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> [i0, 0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> MemRef_merge__phi[] }; ; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> MemRef_merge__phi[] };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> MemRef_merge__phi[] }; ; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> MemRef_merge__phi[] };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> MemRef_merge__phi[] }; ; CHECK-NEXT: { Stmt_loop__TO__backedge[i0] -> MemRef_merge__phi[] };
; CHECK-NEXT: Stmt_backedge ; CHECK-NEXT: Stmt_backedge
; CHECK-NEXT: Domain := ; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_backedge[i0] : i0 <= 100 and i0 >= 0 }; ; CHECK-NEXT: { Stmt_backedge[i0] : i0 <= 100 and i0 >= 0 };
; CHECK-NEXT: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_backedge[i0] -> [i0, 1] }; ; CHECK-NEXT: { Stmt_backedge[i0] -> [i0, 1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_backedge[i0] -> MemRef_merge__phi[] }; ; CHECK-NEXT: { Stmt_backedge[i0] -> MemRef_merge__phi[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_backedge[i0] -> MemRef_A[0] }; ; CHECK-NEXT: { Stmt_backedge[i0] -> MemRef_A[0] };
; CHECK-NEXT: } ; CHECK-NEXT: }
define void @foo(float* %A, i1 %cond0, i1 %cond1) { define void @foo(float* %A, i1 %cond0, i1 %cond1) {
entry: entry:

30
polly/test/ScopInfo/intra_and_inter_bb_scalar_dep.ll
View File

@ -12,14 +12,26 @@
; } ; }
; } ; }
; CHECK: Invariant Accesses: {
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_init_ptr[0] };
; CHECK-NEXT: Execution Context: [N] -> { : N <= -1 or N >= 1 }
; CHECK-NEXT: }
;
; CHECK: Statements {
; CHECK-NEXT: Stmt_for_j
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] : i0 >= 0 and i0 <= -1 + N and i1 >= 0 and i1 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> [i0, i1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_init[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_A[i1] };
; CHECK-NEXT: }
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
; CHECK: Invariant Accesses: {
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: MemRef_init_ptr[0]
; CHECK-NOT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NOT: MemRef_init_ptr[0]
; CHECK: }
define void @f(i64* noalias %A, i64 %N, i64* noalias %init_ptr) #0 { define void @f(i64* noalias %A, i64 %N, i64* noalias %init_ptr) #0 {
entry: entry:
br label %for.i br label %for.i
@ -31,18 +43,12 @@ for.i: ; preds = %for.i.end, %entry
entry.next: ; preds = %for.i entry.next: ; preds = %for.i
%init = load i64, i64* %init_ptr %init = load i64, i64* %init_ptr
; CHECK-NOT: Stmt_entry_next
br label %for.j br label %for.j
for.j: ; preds = %for.j, %entry.next for.j: ; preds = %for.j, %entry.next
%indvar.j = phi i64 [ 0, %entry.next ], [ %indvar.j.next, %for.j ] %indvar.j = phi i64 [ 0, %entry.next ], [ %indvar.j.next, %for.j ]
%init_2 = load i64, i64* %init_ptr %init_2 = load i64, i64* %init_ptr
%init_sum = add i64 %init, %init_2 %init_sum = add i64 %init, %init_2
; CHECK: Stmt_for_j
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_init[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_A[i1] };
%scevgep = getelementptr i64, i64* %A, i64 %indvar.j %scevgep = getelementptr i64, i64* %A, i64 %indvar.j
store i64 %init_sum, i64* %scevgep store i64 %init_sum, i64* %scevgep
%indvar.j.next = add nsw i64 %indvar.j, 1 %indvar.j.next = add nsw i64 %indvar.j, 1

57
polly/test/ScopInfo/invariant-loads-leave-read-only-statements.ll
View File

@ -1,34 +1,33 @@
; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
; RUN: opt %loadPolly -polly-codegen -analyze < %s ; RUN: opt %loadPolly -polly-codegen -analyze < %s
;
; ; CHECK: Statements {
; CHECK: Statements { ; CHECK-NEXT: Stmt_top_split
; CHECK-NEXT: Stmt_top_split ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Domain := ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] -> [0, 0, 0, 0] };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] -> [0, 0, 0, 0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] -> MemRef_25[] };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] -> MemRef_25[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] -> MemRef_26[] };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] -> MemRef_26[] }; ; CHECK-NEXT: Stmt_L_4
; CHECK-NEXT: Stmt_L_4 ; CHECK-NEXT: Domain :=
; CHECK-NEXT: Domain := ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] : i0 >= 0 and i0 <= -1 + p_0 and i1 >= 0 and i1 <= -1 + p_0 and i2 >= 0 and i2 <= -1 + p_0 };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] : i0 >= 0 and i0 <= -1 + p_0 and i1 >= 0 and i1 <= -1 + p_0 and i2 >= 0 and i2 <= -1 + p_0 }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> [1, i0, i1, i2] };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> [1, i0, i1, i2] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_25[] };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_25[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_19[i1, i0] };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_19[i1, i0] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_5[i2, i0] };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_5[i2, i0] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_12[i2, i1] };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_12[i2, i1] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_19[i1, i0] };
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_L_4[i0, i1, i2] -> MemRef_19[i1, i0] }; ; CHECK-NEXT: }
; CHECK-NEXT: }
;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
%jl_value_t = type { %jl_value_t* } %jl_value_t = type { %jl_value_t* }

36
polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll
View File

@ -18,26 +18,24 @@
; return x + y; ; return x + y;
; } ; }
; ;
; CHECK: Invariant Accesses: { ; CHECK: Invariant Accesses: {
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_do_body[i0] -> MemRef_S[0] }; ; CHECK-NEXT: { Stmt_do_body[i0] -> MemRef_S[0] };
; CHECK: Execution Context: { : } ; CHECK-NEXT: Execution Context: { : }
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_do_body[i0] -> MemRef_S[1] }; ; CHECK-NEXT: { Stmt_do_body[i0] -> MemRef_S[1] };
; CHECK: Execution Context: { : } ; CHECK-NEXT: Execution Context: { : }
; CHECK: } ; CHECK-NEXT: }
; ;
; CHECK: Statements { ; CHECK: Statements {
; CHECK-NOT: Access ; CHECK-NEXT: Stmt_do_body
; CHECK: Stmt_do_body ; CHECK-NEXT: Domain :=
; CHECK: Domain := ; CHECK-NEXT: { Stmt_do_body[i0] : i0 <= 1000 and i0 >= 0 };
; CHECK: { Stmt_do_body[i0] : i0 <= 1000 and i0 >= 0 }; ; CHECK-NEXT: Schedule :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_do_body[i0] -> [i0] };
; CHECK: { Stmt_do_body[i0] -> [i0] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_do_body[i0] -> MemRef_A[i0] };
; CHECK: { Stmt_do_body[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: }
; CHECK-NOT: Access
; CHECK: }
; ;
; CODEGEN: entry: ; CODEGEN: entry:
; CODEGEN: %S.b.preload.s2a = alloca float ; CODEGEN: %S.b.preload.s2a = alloca float

30
polly/test/ScopInfo/invariant_load_access_classes_different_base_type_same_pointer.ll
View File

@ -7,23 +7,21 @@
; A[i] = (*(int *)&U) + (int)(*(float *)&U); ; A[i] = (*(int *)&U) + (int)(*(float *)&U);
; } ; }
; ;
; CHECK: Invariant Accesses: { ; CHECK: Invariant Accesses: {
; CHECK-NOT: ReadAccess ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef_U[0] };
; CHECK: { Stmt_for_body[i0] -> MemRef_U[0] }; ; CHECK-NEXT: Execution Context: { : }
; CHECK: Execution Context: { : } ; CHECK-NEXT: }
; CHECK-NOT: ReadAccess
; CHECK: }
; ;
; CHECK: Statements { ; CHECK: Statements {
; CHECK: Stmt_for_body ; CHECK-NEXT: Stmt_for_body
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: { Stmt_for_body[i0] : i0 <= 999 and i0 >= 0 }; ; CHECK-NEXT: { Stmt_for_body[i0] : i0 <= 999 and i0 >= 0 };
; CHECK: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK: { Stmt_for_body[i0] -> [i0] }; ; CHECK-NEXT: { Stmt_for_body[i0] -> [i0] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_for_body[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: { Stmt_for_body[i0] -> MemRef_A[i0] };
; CHECK: } ; CHECK-NEXT: }
; ;
; CODEGEN: entry: ; CODEGEN: entry:
; CODEGEN: %U.f.preload.s2a = alloca float ; CODEGEN: %U.f.preload.s2a = alloca float

30
polly/test/ScopInfo/invariant_load_access_classes_different_base_type_same_pointer_escaping.ll
View File

@ -12,23 +12,21 @@
; return x + y; ; return x + y;
; } ; }
; ;
; CHECK: Invariant Accesses: { ; CHECK: Invariant Accesses: {
; CHECK-NOT: ReadAccess ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_do_body[i0] -> MemRef_U[0] };
; CHECK: { Stmt_do_body[i0] -> MemRef_U[0] }; ; CHECK-NEXT: Execution Context: { : }
; CHECK: Execution Context: { : } ; CHECK-NEXT: }
; CHECK-NOT: ReadAccess
; CHECK: }
; ;
; CHECK: Statements { ; CHECK: Statements {
; CHECK: Stmt_do_body ; CHECK-NEXT: Stmt_do_body
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: { Stmt_do_body[i0] : i0 <= 100 and i0 >= 0 }; ; CHECK-NEXT: { Stmt_do_body[i0] : i0 <= 100 and i0 >= 0 };
; CHECK: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK: { Stmt_do_body[i0] -> [i0] }; ; CHECK-NEXT: { Stmt_do_body[i0] -> [i0] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_do_body[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: { Stmt_do_body[i0] -> MemRef_A[i0] };
; CHECK: } ; CHECK-NEXT: }
; ;
; CODEGEN: entry: ; CODEGEN: entry:
; CODEGEN: %U.f.preload.s2a = alloca float ; CODEGEN: %U.f.preload.s2a = alloca float

28
polly/test/ScopInfo/invariant_loads_complicated_dependences.ll
View File

@ -1,19 +1,19 @@
; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
; ;
; CHECK: Invariant Accesses: { ; CHECK: Invariant Accesses: {
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [LB, UB] -> { Stmt_for_body[i0] -> MemRef_LBptr[0] }; ; CHECK-NEXT: [LB, UB] -> { Stmt_for_body[i0] -> MemRef_LBptr[0] };
; CHECK-NEXT: Execution Context: [LB, UB] -> { : } ; CHECK-NEXT: Execution Context: [LB, UB] -> { : }
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [LB, UB] -> { Stmt_do_cond[i0, i1] -> MemRef_UBptr[0] }; ; CHECK-NEXT: [LB, UB] -> { Stmt_do_cond[i0, i1] -> MemRef_UBptr[0] };
; CHECK-NEXT: Execution Context: [LB, UB] -> { : } ; CHECK-NEXT: Execution Context: [LB, UB] -> { : }
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [LB, UB] -> { Stmt_if_then[i0, i1] -> MemRef_V[0] }; ; CHECK-NEXT: [LB, UB] -> { Stmt_if_then[i0, i1] -> MemRef_V[0] };
; CHECK-NEXT: Execution Context: [LB, UB] -> { : (UB >= 1 + LB and UB >= 6) or LB >= 6 } ; CHECK-NEXT: Execution Context: [LB, UB] -> { : (UB >= 1 + LB and UB >= 6) or LB >= 6 }
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [LB, UB] -> { Stmt_if_else[i0, i1] -> MemRef_U[0] }; ; CHECK-NEXT: [LB, UB] -> { Stmt_if_else[i0, i1] -> MemRef_U[0] };
; CHECK-NEXT: Execution Context: [LB, UB] -> { : LB <= 5 } ; CHECK-NEXT: Execution Context: [LB, UB] -> { : LB <= 5 }
; CHECK-NEXT: } ; CHECK-NEXT: }
; ;
; void f(int *restrict A, int *restrict V, int *restrict U, int *restrict UB, ; void f(int *restrict A, int *restrict V, int *restrict U, int *restrict UB,
; int *restrict LB) { ; int *restrict LB) {

47
polly/test/ScopInfo/invariant_loop_bounds.ll
View File

@ -1,31 +1,32 @@
; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
; ;
; CHECK: Invariant Accesses: { ; CHECK: Invariant Accesses: {
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: MemRef_bounds[2] ; CHECK-NEXT: [bounds2, bounds1, bounds0] -> { Stmt_for_cond[i0] -> MemRef_bounds[2] };
; CHECK-NEXT: Execution Context: [bounds2, bounds1, bounds0] -> { : } ; CHECK-NEXT: Execution Context: [bounds2, bounds1, bounds0] -> { : }
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: MemRef_bounds[1] ; CHECK-NEXT: [bounds2, bounds1, bounds0] -> { Stmt_for_cond_1[i0, i1] -> MemRef_bounds[1] };
; CHECK-NEXT: Execution Context: [bounds2, bounds1, bounds0] -> { : bounds2 >= 1 } ; CHECK-NEXT: Execution Context: [bounds2, bounds1, bounds0] -> { : bounds2 >= 1 }
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: MemRef_bounds[0] ; CHECK-NEXT: [bounds2, bounds1, bounds0] -> { Stmt_for_cond_4[i0, i1, i2] -> MemRef_bounds[0] };
; CHECK-NEXT: Execution Context: [bounds2, bounds1, bounds0] -> { : bounds1 >= 1 and bounds2 >= 1 } ; CHECK-NEXT: Execution Context: [bounds2, bounds1, bounds0] -> { : bounds1 >= 1 and bounds2 >= 1 }
; CHECK-NEXT: } ; CHECK-NEXT: }
; ;
; CHECK: p0: %bounds2 ; CHECK: p0: %bounds2
; CHECK: p1: %bounds1 ; CHECK-NEXT: p1: %bounds1
; CHECK: p2: %bounds0 ; CHECK-NEXT: p2: %bounds0
; CHECK: Statements { ;
; CHECK: Stmt_for_body_6 ; CHECK: Statements {
; CHECK: Domain := ; CHECK-NEXT: Stmt_for_body_6
; CHECK: [bounds2, bounds1, bounds0] -> { Stmt_for_body_6[i0, i1, i2] : i0 >= 0 and i0 <= -1 + bounds2 and i1 >= 0 and i1 <= -1 + bounds1 and i2 >= 0 and i2 <= -1 + bounds0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: [bounds2, bounds1, bounds0] -> { Stmt_for_body_6[i0, i1, i2] : i0 >= 0 and i0 <= -1 + bounds2 and i1 >= 0 and i1 <= -1 + bounds1 and i2 >= 0 and i2 <= -1 + bounds0 };
; CHECK: [bounds2, bounds1, bounds0] -> { Stmt_for_body_6[i0, i1, i2] -> [i0, i1, i2] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bounds2, bounds1, bounds0] -> { Stmt_for_body_6[i0, i1, i2] -> [i0, i1, i2] };
; CHECK: [bounds2, bounds1, bounds0] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [bounds2, bounds1, bounds0] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] };
; CHECK: [bounds2, bounds1, bounds0] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: } ; CHECK-NEXT: [bounds2, bounds1, bounds0] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] };
; CHECK-NEXT: }
; ;
; int bounds[3]; ; int bounds[3];
; double data[1024][1024][1024]; ; double data[1024][1024][1024];

25
polly/test/ScopInfo/invariant_same_loop_bound_multiple_times-1.ll
View File

@ -6,24 +6,25 @@
; one, e.g., here the universal set. ; one, e.g., here the universal set.
; ;
; CHECK: Invariant Accesses: { ; CHECK: Invariant Accesses: {
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: MemRef_bounds[0] ; CHECK-NEXT: [bounds0l0] -> { Stmt_for_cond_4[i0, i1, i2] -> MemRef_bounds[0] };
; CHECK-NEXT: Execution Context: [bounds0l0] -> { : } ; CHECK-NEXT: Execution Context: [bounds0l0] -> { : }
; CHECK-NEXT: } ; CHECK-NEXT: }
; ;
; CHECK: p0: %bounds0l0 ; CHECK: p0: %bounds0l0
; CHECK-NOT: p1 ; CHECK-NOT: p1
;
; CHECK: Statements { ; CHECK: Statements {
; CHECK: Stmt_for_body_6 ; CHECK-NEXT: Stmt_for_body_6
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: [bounds0l0] -> { Stmt_for_body_6[i0, i1, i2] : i0 >= 0 and i0 <= -1 + bounds0l0 and i1 >= 0 and i1 <= -1 + bounds0l0 and i2 >= 0 and i2 <= -1 + bounds0l0 }; ; CHECK-NEXT: [bounds0l0] -> { Stmt_for_body_6[i0, i1, i2] : i0 >= 0 and i0 <= -1 + bounds0l0 and i1 >= 0 and i1 <= -1 + bounds0l0 and i2 >= 0 and i2 <= -1 + bounds0l0 };
; CHECK: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK: [bounds0l0] -> { Stmt_for_body_6[i0, i1, i2] -> [i0, i1, i2] }; ; CHECK-NEXT: [bounds0l0] -> { Stmt_for_body_6[i0, i1, i2] -> [i0, i1, i2] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [bounds0l0] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] }; ; CHECK-NEXT: [bounds0l0] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [bounds0l0] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] }; ; CHECK-NEXT: [bounds0l0] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] };
; CHECK: } ; CHECK-NEXT: }
; ;
; int bounds[1]; ; int bounds[1];
; double data[1024][1024][1024]; ; double data[1024][1024][1024];

29
polly/test/ScopInfo/invariant_same_loop_bound_multiple_times-2.ll
View File

@ -6,25 +6,26 @@
; one, e.g., here the universal set. ; one, e.g., here the universal set.
; ;
; CHECK: Invariant Accesses: { ; CHECK: Invariant Accesses: {
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: MemRef_bounds[0] ; CHECK-NEXT: [bounds0l0, p] -> { Stmt_for_cond_4[i0, i1, i2] -> MemRef_bounds[0] };
; CHECK-NEXT: Execution Context: [bounds0l0, p] -> { : } ; CHECK-NEXT: Execution Context: [bounds0l0, p] -> { : }
; CHECK-NEXT: } ; CHECK-NEXT: }
; ;
; CHECK: p0: %bounds0l0 ; CHECK: p0: %bounds0l0
; CHECK: p1: %p ; CHECK-NEXT: p1: %p
; CHECK-NOT: p2: ; CHECK-NOT: p2
;
; CHECK: Statements { ; CHECK: Statements {
; CHECK: Stmt_for_body_6 ; CHECK-NEXT: Stmt_for_body_6
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: [bounds0l0, p] -> { Stmt_for_body_6[i0, i1, i2] : p = 0 and i0 >= 0 and i0 <= -1 + bounds0l0 and i1 >= 0 and i1 <= -1 + bounds0l0 and i2 >= 0 and i2 <= -1 + bounds0l0 }; ; CHECK-NEXT: [bounds0l0, p] -> { Stmt_for_body_6[i0, i1, i2] : p = 0 and i0 >= 0 and i0 <= -1 + bounds0l0 and i1 >= 0 and i1 <= -1 + bounds0l0 and i2 >= 0 and i2 <= -1 + bounds0l0 };
; CHECK: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK: [bounds0l0, p] -> { Stmt_for_body_6[i0, i1, i2] -> [i0, i1, i2] }; ; CHECK-NEXT: [bounds0l0, p] -> { Stmt_for_body_6[i0, i1, i2] -> [i0, i1, i2] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [bounds0l0, p] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] }; ; CHECK-NEXT: [bounds0l0, p] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [bounds0l0, p] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] }; ; CHECK-NEXT: [bounds0l0, p] -> { Stmt_for_body_6[i0, i1, i2] -> MemRef_data[i0, i1, i2] };
; CHECK: } ; CHECK-NEXT: }
; ;
; int bounds[1]; ; int bounds[1];
; double data[1024][1024][1024]; ; double data[1024][1024][1024];

30
polly/test/ScopInfo/isl_trip_count_03.ll
View File

@ -3,22 +3,24 @@
; Test comes from a bug (15771) or better a feature request. It was not allowed ; Test comes from a bug (15771) or better a feature request. It was not allowed
; in Polly in the old domain generation as ScalarEvolution cannot figure out the ; in Polly in the old domain generation as ScalarEvolution cannot figure out the
; loop bounds. However, the new domain generation will detect the SCoP. ; loop bounds. However, the new domain generation will detect the SCoP.
; CHECK: Context:
; CHECK-NEXT: [n] -> { : n <= 2147483647 and n >= -2147483648 }
; ;
; CHECK: Context: ; CHECK: p0: %n
; CHECK: [n] -> { : n <= 2147483647 and n >= -2147483648 }
; CHECK: p0: %n
; CHECK: Statements {
; CHECK: Stmt_for_next
; CHECK: Domain :=
; CHECK: [n] -> { Stmt_for_next[i0] : i0 >= 0 and 2i0 <= -3 + n };
; CHECK: Schedule :=
; CHECK: [n] -> { Stmt_for_next[i0] -> [i0] };
; CHECK: ReadAccess :=
; CHECK: [n] -> { Stmt_for_next[i0] -> MemRef_A[i0] };
; CHECK: WriteAccess :=
; CHECK: [n] -> { Stmt_for_next[i0] -> MemRef_A[i0] };
; CHECK: }
; ;
; CHECK: Statements {
; CHECK-NEXT: Stmt_for_next
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [n] -> { Stmt_for_next[i0] : i0 >= 0 and 2i0 <= -3 + n };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [n] -> { Stmt_for_next[i0] -> [i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_for_next[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_for_next[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
@A = common global [100 x i32] zeroinitializer, align 16 @A = common global [100 x i32] zeroinitializer, align 16
define void @foo(i32 %n) #0 { define void @foo(i32 %n) #0 {

66
polly/test/ScopInfo/long-sequence-of-error-blocks.ll
View File

@ -8,43 +8,43 @@ target triple = "x86_64-unknown-linux-gnu"
; The assumed context of this test case is still very large and should be ; The assumed context of this test case is still very large and should be
; reduced. ; reduced.
; CHECK: Assumed Context:
; CHECK: {{.*}} or {{.*}} or {{.*}} or {{.*}} or {{.*}}
; This test case contains a long sequence of branch instructions together with ; This test case contains a long sequence of branch instructions together with
; function calls that are considered 'error blocks'. We verify that the ; function calls that are considered 'error blocks'. We verify that the
; iteration spaces are not overly complicated. ; iteration spaces are not overly complicated.
; CHECK: Statements { ; CHECK: Assumed Context:
; CHECK: Stmt_bb15 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { : (tmp17 = 0 and tmp27 >= 4) or (tmp17 = 0 and tmp27 <= 2) or (tmp21 = 0 and tmp17 <= -1 and tmp27 >= 4) or (tmp21 = 0 and tmp17 <= -1 and tmp27 <= 2) or (tmp21 = 0 and tmp17 >= 1 and tmp27 >= 4) or (tmp21 = 0 and tmp17 >= 1 and tmp27 <= 2) or (tmp17 = 0 and tmp27 = 3 and tmp31 >= 144) or (tmp21 = 0 and tmp27 = 3 and tmp17 <= -1 and tmp31 >= 144) or (tmp21 = 0 and tmp27 = 3 and tmp17 >= 1 and tmp31 >= 144) }
; CHECK: Domain := ;
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb15[] }; ; CHECK: Statements {
; CHECK: Schedule := ; CHECK-NEXT: Stmt_bb15
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb15[] -> [0] }; ; CHECK-NEXT: Domain :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb15[] };
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb15[] -> MemRef_A[0] }; ; CHECK-NEXT: Schedule :=
; CHECK: Stmt_bb19 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb15[] -> [0] };
; CHECK: Domain := ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb19[] : tmp17 <= -1 or tmp17 >= 1 }; ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb15[] -> MemRef_A[0] };
; CHECK: Schedule := ; CHECK-NEXT: Stmt_bb19
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb19[] -> [1] : tmp17 <= -1 or tmp17 >= 1 }; ; CHECK-NEXT: Domain :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb19[] : tmp17 <= -1 or tmp17 >= 1 };
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb19[] -> MemRef_A[0] }; ; CHECK-NEXT: Schedule :=
; CHECK: Stmt_bb24 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb19[] -> [1] : tmp17 <= -1 or tmp17 >= 1 };
; CHECK: Domain := ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb24[] }; ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb19[] -> MemRef_A[0] };
; CHECK: Schedule := ; CHECK-NEXT: Stmt_bb24
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb24[] -> [2] }; ; CHECK-NEXT: Domain :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb24[] };
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb24[] -> MemRef_A[0] }; ; CHECK-NEXT: Schedule :=
; CHECK: Stmt_bb29 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb24[] -> [2] };
; CHECK: Domain := ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb29[] : tmp27 = 3 }; ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb24[] -> MemRef_A[0] };
; CHECK: Schedule := ; CHECK-NEXT: Stmt_bb29
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb29[] -> [3] }; ; CHECK-NEXT: Domain :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb29[] : tmp27 = 3 };
; CHECK: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb29[] -> MemRef_A[0] }; ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb29[] -> [3] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb29[] -> MemRef_A[0] };
; CHECK-NEXT: }
@global = external global [300 x i8], align 16 @global = external global [300 x i8], align 16
@global1 = external global %struct.hoge*, align 8 @global1 = external global %struct.hoge*, align 8

34
polly/test/ScopInfo/loop_affine_bound_0.ll
View File

@ -50,24 +50,16 @@ return: ; preds = %bb.nph8, %bb3, %ent
ret void ret void
} }
; CHECK: p0: %N
; CHECK: p1: %M ; CHECK: p0: %N
; CHECK: Statements { ; CHECK-NEXT: p1: %M
; CHECK: Stmt_bb1 ;
; CHECK: Domain := ; CHECK: Statements {
; CHECK: [N, M] -> { Stmt_bb1[i0, i1] : ; CHECK-NEXT: Stmt_bb1
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] : i0 >= 0 and i0 <= 2 + 4N + 7M and i1 >= 0 and i1 <= 1 + 5N };
; CHECK-DAG: i0 <= 2 + 4N + 7M ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] -> [i0, i1] };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] -> MemRef_a[i1, i0] };
; CHECK-DAG: i1 <= 1 + 5N ; CHECK-NEXT: }
; CHECK: }
; CHECK: Schedule :=
; CHECK: [N, M] -> { Stmt_bb1[i0, i1] -> [i0, i1] };
; CHECK-NOT: 128i1
; CHECK: MustWriteAccess := [Reduction Type: NONE]
; CHECK: [N, M] -> { Stmt_bb1[i0, i1] -> MemRef_a[i1, i0] };
; CHECK-NOT: 128i1
; CHECK: }

36
polly/test/ScopInfo/loop_affine_bound_1.ll
View File

@ -49,26 +49,16 @@ return: ; preds = %bb3, %entry
ret void ret void
} }
; CHECK: p0: %N
; CHECK: p1: %M ; CHECK: p0: %N
; CHECK: Statements { ; CHECK-NEXT: p1: %M
; CHECK: Stmt_bb1 ;
; CHECK: Domain := ; CHECK: Statements {
; CHECK: [N, M] -> { Stmt_bb1[i0, i1] : ; CHECK-NEXT: Stmt_bb1
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] : i0 >= 0 and i0 <= 2 + 4N + 7M and i1 >= 0 and i1 <= 1 + 5N - i0; Stmt_bb1[0, i1] : 7M <= -3 - 4N and i1 >= 0 and i1 <= 1 + 5N };
; CHECK-DAG: i0 <= 2 + 4N + 7M ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] -> [i0, i1] : i0 <= 2 + 4N + 7M; Stmt_bb1[0, i1] -> [0, i1] : 7M <= -3 - 4N };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] -> MemRef_a[i1, 129i0] };
; CHECK-DAG: i1 <= 1 + 5N - i0 ; CHECK-NEXT: }
; CHECK-DAG: Stmt_bb1[0, i1] :
; CHECK-DAG: 7M <= -3 - 4N
; CHECK-DAG: and
; CHECK-DAG: i1 >= 0
; CHECK-DAG: and
; CHECK-DAG: i1 <= 1 + 5N
; CHECK: }
; CHECK: MustWriteAccess := [Reduction Type: NONE]
; CHECK: [N, M] -> { Stmt_bb1[i0, i1] -> MemRef_a[i1, 129i0] };
; CHECK: }

32
polly/test/ScopInfo/loop_affine_bound_2.ll
View File

@ -60,22 +60,16 @@ return: ; preds = %bb3, %entry
ret void ret void
} }
; CHECK: p0: %N
; CHECK: p1: %M ; CHECK: p0: %N
; CHECK: Statements { ; CHECK-NEXT: p1: %M
; CHECK: Stmt_bb1 ;
; CHECK: Domain := ; CHECK: Statements {
; CHECK: [N, M] -> { Stmt_bb1[i0, i1] : ; CHECK-NEXT: Stmt_bb1
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] : i0 >= 0 and i0 <= 2 + 4N + 7M and i1 <= 10 + 5N - 6M - 4i0 and i1 >= 0 };
; CHECK-DAG: i0 <= 2 + 4N + 7M ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] -> [i0, i1] };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [N, M] -> { Stmt_bb1[i0, i1] -> MemRef_a[-9 + 6M + i1, 897i0] };
; CHECK-DAG: i1 <= 10 + 5N - 6M - 4i0 ; CHECK-NEXT: }
; CHECK-DAG: }
; CHECK: Schedule :=
; CHECK: [N, M] -> { Stmt_bb1[i0, i1] -> [i0, i1]
; CHECK: MustWriteAccess := [Reduction Type: NONE]
; CHECK: [N, M] -> { Stmt_bb1[i0, i1] -> MemRef_a[-9 + 6M + i1, 897i0]
; CHECK: }

41
polly/test/ScopInfo/loop_carry.ll
View File

@ -45,24 +45,25 @@ bb2: ; preds = %bb, %entry
ret i64 0 ret i64 0
} }
; CHECK: Statements {
; CHECK: Stmt_bb
; CHECK: Domain :=
; CHECK: [n] -> { Stmt_bb[i0] : i0 >= 0 and i0 <= -2 + n };
; CHECK: Schedule :=
; CHECK: [n] -> { Stmt_bb[i0] -> [i0] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_1__phi[] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_1__phi[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_k_05__phi[] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_k_05__phi[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_a[1 + i0] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_a[2 + 2i0] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [n] -> { Stmt_bb[i0] -> MemRef_a[4 + i0] };
; CHECK: Statements {
; CHECK-NEXT: Stmt_bb
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [n] -> { Stmt_bb[i0] : i0 >= 0 and i0 <= -2 + n };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [n] -> { Stmt_bb[i0] -> [i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [n] -> { Stmt_bb[i0] -> MemRef_1__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [n] -> { Stmt_bb[i0] -> MemRef_1__phi[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [n] -> { Stmt_bb[i0] -> MemRef_k_05__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [n] -> { Stmt_bb[i0] -> MemRef_k_05__phi[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_bb[i0] -> MemRef_a[1 + i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_bb[i0] -> MemRef_a[2 + 2i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [n] -> { Stmt_bb[i0] -> MemRef_a[4 + i0] };
; CHECK-NEXT: }

249
polly/test/ScopInfo/many-scalar-dependences.ll
View File

@ -19,131 +19,132 @@
; and scalar data-dependences due to x being passed along as SSA value or PHI ; and scalar data-dependences due to x being passed along as SSA value or PHI
; node. ; node.
; CHECK: Stmt_bb5 ; CHECK: Statements {
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb5
; CHECK: { Stmt_bb5[i0] : i0 <= 100 and i0 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb5[i0] : i0 <= 100 and i0 >= 0 };
; CHECK: { Stmt_bb5[i0] -> [i0, 0, 0, 0, 0, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb5[i0] -> [i0, 0, 0, 0, 0, 0] };
; CHECK: { Stmt_bb5[i0] -> MemRef_x_0__phi[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb5[i0] -> MemRef_x_0__phi[] };
; CHECK: { Stmt_bb5[i0] -> MemRef_x_0[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb6 ; CHECK-NEXT: { Stmt_bb5[i0] -> MemRef_x_0[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb6
; CHECK: { Stmt_bb6[i0] : i0 <= 99 and i0 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb6[i0] : i0 <= 99 and i0 >= 0 };
; CHECK: { Stmt_bb6[i0] -> [i0, 1, 0, 0, 0, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb6[i0] -> [i0, 1, 0, 0, 0, 0] };
; CHECK: { Stmt_bb6[i0] -> MemRef_x_0[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb6[i0] -> MemRef_x_0[] };
; CHECK: { Stmt_bb6[i0] -> MemRef_x_1__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb7 ; CHECK-NEXT: { Stmt_bb6[i0] -> MemRef_x_1__phi[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb7
; CHECK: { Stmt_bb7[i0, i1] : i0 <= 99 and i0 >= 0 and i1 <= 100 and i1 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb7[i0, i1] : i0 <= 99 and i0 >= 0 and i1 <= 100 and i1 >= 0 };
; CHECK: { Stmt_bb7[i0, i1] -> [i0, 2, i1, 0, 0, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb7[i0, i1] -> [i0, 2, i1, 0, 0, 0] };
; CHECK: { Stmt_bb7[i0, i1] -> MemRef_x_1__phi[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb7[i0, i1] -> MemRef_x_1__phi[] };
; CHECK: { Stmt_bb7[i0, i1] -> MemRef_x_1[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb7[i0, i1] -> MemRef_x_1[] };
; CHECK: { Stmt_bb7[i0, i1] -> MemRef_x_1_lcssa__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb8 ; CHECK-NEXT: { Stmt_bb7[i0, i1] -> MemRef_x_1_lcssa__phi[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb8
; CHECK: { Stmt_bb8[i0, i1] : i1 <= 99 and i0 <= 99 and i0 >= 0 and i1 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb8[i0, i1] : i1 <= 99 and i0 <= 99 and i0 >= 0 and i1 >= 0 };
; CHECK: { Stmt_bb8[i0, i1] -> [i0, 2, i1, 1, 0, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb8[i0, i1] -> [i0, 2, i1, 1, 0, 0] };
; CHECK: { Stmt_bb8[i0, i1] -> MemRef_x_1[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb8[i0, i1] -> MemRef_x_1[] };
; CHECK: { Stmt_bb8[i0, i1] -> MemRef_x_2__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb9 ; CHECK-NEXT: { Stmt_bb8[i0, i1] -> MemRef_x_2__phi[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb9
; CHECK: { Stmt_bb9[i0, i1, i2] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 and i2 <= 100 and i2 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb9[i0, i1, i2] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 and i2 <= 100 and i2 >= 0 };
; CHECK: { Stmt_bb9[i0, i1, i2] -> [i0, 2, i1, 2, i2, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb9[i0, i1, i2] -> [i0, 2, i1, 2, i2, 0] };
; CHECK: { Stmt_bb9[i0, i1, i2] -> MemRef_x_2__phi[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb9[i0, i1, i2] -> MemRef_x_2__phi[] };
; CHECK: { Stmt_bb9[i0, i1, i2] -> MemRef_x_2[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb9[i0, i1, i2] -> MemRef_x_2[] };
; CHECK: { Stmt_bb9[i0, i1, i2] -> MemRef_x_2_lcssa__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb10 ; CHECK-NEXT: { Stmt_bb9[i0, i1, i2] -> MemRef_x_2_lcssa__phi[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb10
; CHECK: { Stmt_bb10[i0, i1, i2] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 and i2 <= 99 and i2 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb10[i0, i1, i2] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 and i2 <= 99 and i2 >= 0 };
; CHECK: { Stmt_bb10[i0, i1, i2] -> [i0, 2, i1, 2, i2, 1] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb10[i0, i1, i2] -> [i0, 2, i1, 2, i2, 1] };
; CHECK: { Stmt_bb10[i0, i1, i2] -> MemRef_x_2[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb10[i0, i1, i2] -> MemRef_x_2[] };
; CHECK: { Stmt_bb10[i0, i1, i2] -> MemRef_x_3__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb11 ; CHECK-NEXT: { Stmt_bb10[i0, i1, i2] -> MemRef_x_3__phi[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb11
; CHECK: { Stmt_bb11[i0, i1, 0] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb11[i0, i1, 0] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 };
; CHECK: { Stmt_bb11[i0, i1, i2] -> [i0, 2, i1, 2, 0, 2] }; ; CHECK-NEXT: Schedule :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb11[i0, i1, i2] -> [i0, 2, i1, 2, 0, 2] };
; CHECK: { Stmt_bb11[i0, i1, i2] -> MemRef_x_3__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb12 ; CHECK-NEXT: { Stmt_bb11[i0, i1, i2] -> MemRef_x_3__phi[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb12
; CHECK: { Stmt_bb12[i0, i1, i2] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 and i2 <= 99 and i2 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb12[i0, i1, i2] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 and i2 <= 99 and i2 >= 0 };
; CHECK: { Stmt_bb12[i0, i1, i2] -> [i0, 2, i1, 2, i2, 3] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb12[i0, i1, i2] -> [i0, 2, i1, 2, i2, 3] };
; CHECK: { Stmt_bb12[i0, i1, i2] -> MemRef_x_3__phi[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb12[i0, i1, i2] -> MemRef_x_3__phi[] };
; CHECK: { Stmt_bb12[i0, i1, i2] -> MemRef_x_3[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_bb12[i0, i1, i2] -> MemRef_x_3[] };
; CHECK: { Stmt_bb12[i0, i1, i2] -> MemRef_a[i0, i1] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_bb12[i0, i1, i2] -> MemRef_a[i0, i1] };
; CHECK: { Stmt_bb12[i0, i1, i2] -> MemRef_a[i0, i1] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: Stmt_bb16 ; CHECK-NEXT: { Stmt_bb12[i0, i1, i2] -> MemRef_a[i0, i1] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb16
; CHECK: { Stmt_bb16[i0, i1, i2] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 and i2 <= 99 and i2 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb16[i0, i1, i2] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 and i2 <= 99 and i2 >= 0 };
; CHECK: { Stmt_bb16[i0, i1, i2] -> [i0, 2, i1, 2, i2, 4] }; ; CHECK-NEXT: Schedule :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb16[i0, i1, i2] -> [i0, 2, i1, 2, i2, 4] };
; CHECK: { Stmt_bb16[i0, i1, i2] -> MemRef_x_2__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb16[i0, i1, i2] -> MemRef_x_2__phi[] };
; CHECK: { Stmt_bb16[i0, i1, i2] -> MemRef_x_3[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb19 ; CHECK-NEXT: { Stmt_bb16[i0, i1, i2] -> MemRef_x_3[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb19
; CHECK: { Stmt_bb19[i0, i1] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb19[i0, i1] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 };
; CHECK: { Stmt_bb19[i0, i1] -> [i0, 2, i1, 3, 0, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb19[i0, i1] -> [i0, 2, i1, 3, 0, 0] };
; CHECK: { Stmt_bb19[i0, i1] -> MemRef_x_2_lcssa[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb19[i0, i1] -> MemRef_x_2_lcssa[] };
; CHECK: { Stmt_bb19[i0, i1] -> MemRef_x_2_lcssa__phi[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb20 ; CHECK-NEXT: { Stmt_bb19[i0, i1] -> MemRef_x_2_lcssa__phi[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb20
; CHECK: { Stmt_bb20[i0, i1] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb20[i0, i1] : i0 <= 99 and i0 >= 0 and i1 <= 99 and i1 >= 0 };
; CHECK: { Stmt_bb20[i0, i1] -> [i0, 2, i1, 4, 0, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb20[i0, i1] -> [i0, 2, i1, 4, 0, 0] };
; CHECK: { Stmt_bb20[i0, i1] -> MemRef_x_2_lcssa[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb20[i0, i1] -> MemRef_x_2_lcssa[] };
; CHECK: { Stmt_bb20[i0, i1] -> MemRef_x_1__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb21 ; CHECK-NEXT: { Stmt_bb20[i0, i1] -> MemRef_x_1__phi[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb21
; CHECK: { Stmt_bb21[i0] : i0 <= 99 and i0 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb21[i0] : i0 <= 99 and i0 >= 0 };
; CHECK: { Stmt_bb21[i0] -> [i0, 3, 0, 0, 0, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb21[i0] -> [i0, 3, 0, 0, 0, 0] };
; CHECK: { Stmt_bb21[i0] -> MemRef_x_1_lcssa[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb21[i0] -> MemRef_x_1_lcssa[] };
; CHECK: { Stmt_bb21[i0] -> MemRef_x_1_lcssa__phi[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb22 ; CHECK-NEXT: { Stmt_bb21[i0] -> MemRef_x_1_lcssa__phi[] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_bb22
; CHECK: { Stmt_bb22[i0] : i0 <= 99 and i0 >= 0 }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_bb22[i0] : i0 <= 99 and i0 >= 0 };
; CHECK: { Stmt_bb22[i0] -> [i0, 4, 0, 0, 0, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb22[i0] -> [i0, 4, 0, 0, 0, 0] };
; CHECK: { Stmt_bb22[i0] -> MemRef_x_1_lcssa[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb22[i0] -> MemRef_x_1_lcssa[] };
; CHECK: { Stmt_bb22[i0] -> MemRef_x_0__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_bb22[i0] -> MemRef_x_0__phi[] };
; CHECK-NEXT: }
;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f([100 x float]* %a) { define void @f([100 x float]* %a) {

36
polly/test/ScopInfo/multidim_2d_outer_parametric_offset.ll
View File

@ -9,27 +9,21 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; A[i+p][j] = 1.0; ; A[i+p][j] = 1.0;
; } ; }
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK: [m, p] -> { : p <= 9223372036854775708 } ; CHECK-NEXT: [m, p] -> { : }
; CHECK: p0: %m ;
; CHECK: p1: %p ; CHECK: p0: %m
; CHECK: Statements { ; CHECK-NEXT: p1: %p
; CHECK: Stmt_for_j ;
; CHECK: Domain := ; CHECK: Statements {
; CHECK: [m, p] -> { Stmt_for_j[i0, i1] : ; CHECK-NEXT: Stmt_for_j
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [m, p] -> { Stmt_for_j[i0, i1] : i0 <= 99 and i0 >= 0 and i1 >= 0 and i1 <= -1 + m };
; CHECK-DAG: i0 <= 99 ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [m, p] -> { Stmt_for_j[i0, i1] -> [i0, i1] };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [m, p] -> { Stmt_for_j[i0, i1] -> MemRef_A[p + i0, i1] };
; CHECK-DAG: i1 <= -1 + m ; CHECK-NEXT: }
; CHECK: }
; CHECK: Schedule :=
; CHECK: [m, p] -> { Stmt_for_j[i0, i1] -> [i0, i1] };
; CHECK: MustWriteAccess := [Reduction Type: NONE]
; CHECK: [m, p] -> { Stmt_for_j[i0, i1] -> MemRef_A[p + i0, i1] };
; CHECK: }
define void @foo(i64 %n, i64 %m, i64 %p, double* %A) { define void @foo(i64 %n, i64 %m, i64 %p, double* %A) {
entry: entry:

33
polly/test/ScopInfo/multidim_2d_parametric_array_static_loop_bounds.ll
View File

@ -8,25 +8,20 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; for (long j = 0; j < 150; j++) ; for (long j = 0; j < 150; j++)
; A[i][j] = 1.0; ; A[i][j] = 1.0;
; } ; }
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK: [m] -> { : m >= 150 } ; CHECK-NEXT: [m] -> { : m >= 150 }
; CHECK: p0: %m ;
; CHECK: Statements { ; CHECK: p0: %m
; CHECK: Stmt_for_j ;
; CHECK: Domain := ; CHECK: Statements {
; CHECK: [m] -> { Stmt_for_j[i0, i1] ; CHECK-NEXT: Stmt_for_j
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [m] -> { Stmt_for_j[i0, i1] : i0 <= 99 and i0 >= 0 and i1 <= 149 and i1 >= 0 };
; CHECK-DAG: i0 <= 99 ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [m] -> { Stmt_for_j[i0, i1] -> [i0, i1] };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [m] -> { Stmt_for_j[i0, i1] -> MemRef_A[i0, i1] };
; CHECK-DAG: i1 <= 149 ; CHECK-NEXT: }
; CHECK: }
; CHECK: Schedule :=
; CHECK: [m] -> { Stmt_for_j[i0, i1] -> [i0, i1] };
; CHECK: MustWriteAccess := [Reduction Type: NONE]
; CHECK: [m] -> { Stmt_for_j[i0, i1] -> MemRef_A[i0, i1] };
define void @foo(i64 %n, i64 %m, double* %A) { define void @foo(i64 %n, i64 %m, double* %A) {
entry: entry:

43
polly/test/ScopInfo/multidim_3d_parametric_array_static_loop_bounds.ll
View File

@ -9,34 +9,21 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; A[i][j][k] = 1.0; ; A[i][j][k] = 1.0;
; } ; }
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK: [m, o] -> { : ; CHECK-NEXT: [m, o] -> { : m >= 150 and o >= 200 }
; CHECK-DAG: m >= 150 ;
; CHECK-DAG: and ; CHECK: p0: %m
; CHECK-DAG: o >= 200 ; CHECK-NEXT: p1: %o
; CHECK: } ;
; CHECK: p0: %m ; CHECK: Statements {
; CHECK: p1: %o ; CHECK-NEXT: Stmt_for_k
; CHECK: Statements { ; CHECK-NEXT: Domain :=
; CHECK: Stmt_for_k ; CHECK-NEXT: [m, o] -> { Stmt_for_k[i0, i1, i2] : i0 <= 99 and i0 >= 0 and i1 <= 149 and i1 >= 0 and i2 <= 199 and i2 >= 0 };
; CHECK: Domain := ; CHECK-NEXT: Schedule :=
; CHECK: [m, o] -> { Stmt_for_k[i0, i1, i2] : ; CHECK-NEXT: [m, o] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [m, o] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[i0, i1, i2] };
; CHECK-DAG: i0 <= 99 ; CHECK-NEXT: }
; CHECK-DAG: and
; CHECK-DAG: i1 >= 0
; CHECK-DAG: and
; CHECK-DAG: i1 <= 149
; CHECK-DAG: and
; CHECK-DAG: i2 >= 0
; CHECK-DAG: and
; CHECK-DAG: i2 <= 199
; CHECK: }
; CHECK: Schedule :=
; CHECK: [m, o] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK: MustWriteAccess := [Reduction Type: NONE]
; CHECK: [m, o] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[i0, i1, i2] };
define void @foo(i64 %n, i64 %m, i64 %o, double* %A) { define void @foo(i64 %n, i64 %m, i64 %o, double* %A) {
entry: entry:

124
polly/test/ScopInfo/multidim_fixedsize_different_dimensionality.ll
View File

@ -14,36 +14,6 @@
; A[i][j] += i + j; ; A[i][j] += i + j;
; } ; }
; CHECK: Stmt_bb7
; CHECK: Domain :=
; CHECK: { Stmt_bb7[i0, i1] : i0 <= 399 and i0 >= 0 and i1 <= 399 and i1 >= 0 };
; CHECK: Schedule :=
; CHECK: { Stmt_bb7[i0, i1] -> [0, i0, i1] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb7[i0, i1] -> MemRef_A[i0, i1] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb7[i0, i1] -> MemRef_A[i0, i1] };
; CHECK: Stmt_bb17
; CHECK: Domain :=
; CHECK: { Stmt_bb17[] };
; CHECK: Schedule :=
; CHECK: { Stmt_bb17[] -> [1, 0, 0] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb17[] -> MemRef_A[100, 100] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb17[] -> MemRef_A[0, 0] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb17[] -> MemRef_A[0, 0] };
; CHECK: Stmt_bb26
; CHECK: Domain :=
; CHECK: { Stmt_bb26[i0, i1] : i0 <= 399 and i0 >= 0 and i1 <= 399 and i1 >= 0 };
; CHECK: Schedule :=
; CHECK: { Stmt_bb26[i0, i1] -> [2, i0, i1] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb26[i0, i1] -> MemRef_A[i0, i1] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb26[i0, i1] -> MemRef_A[i0, i1] };
; void first_lower_dimensional(float A[][N], float B[][N]) { ; void first_lower_dimensional(float A[][N], float B[][N]) {
; for (long i = 0; i < N; i++) ; for (long i = 0; i < N; i++)
; for (long j = 0; j < N; j++) ; for (long j = 0; j < N; j++)
@ -56,37 +26,69 @@
; A[i][j] += i + j; ; A[i][j] += i + j;
; } ; }
; CHECK: Statements { ; CHECK: Statements {
; CHECK: Stmt_bb7 ; CHECK-NEXT: Stmt_bb7
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: { Stmt_bb7[i0, i1] : i0 <= 399 and i0 >= 0 and i1 <= 399 and i1 >= 0 }; ; CHECK-NEXT: { Stmt_bb7[i0, i1] : i0 <= 399 and i0 >= 0 and i1 <= 399 and i1 >= 0 };
; CHECK: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK: { Stmt_bb7[i0, i1] -> [0, i0, i1] }; ; CHECK-NEXT: { Stmt_bb7[i0, i1] -> [0, i0, i1] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb7[i0, i1] -> MemRef_B[i0, i1] }; ; CHECK-NEXT: { Stmt_bb7[i0, i1] -> MemRef_A[i0, i1] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb7[i0, i1] -> MemRef_B[i0, i1] }; ; CHECK-NEXT: { Stmt_bb7[i0, i1] -> MemRef_A[i0, i1] };
; CHECK: Stmt_bb17 ; CHECK-NEXT: Stmt_bb17
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: { Stmt_bb17[] }; ; CHECK-NEXT: { Stmt_bb17[] };
; CHECK: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK: { Stmt_bb17[] -> [1, 0, 0] }; ; CHECK-NEXT: { Stmt_bb17[] -> [1, 0, 0] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb17[] -> MemRef_B[100, 100] }; ; CHECK-NEXT: { Stmt_bb17[] -> MemRef_A[100, 100] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb17[] -> MemRef_A[0, 0] }; ; CHECK-NEXT: { Stmt_bb17[] -> MemRef_A[0, 0] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb17[] -> MemRef_A[0, 0] }; ; CHECK-NEXT: { Stmt_bb17[] -> MemRef_A[0, 0] };
; CHECK: Stmt_bb26 ; CHECK-NEXT: Stmt_bb26
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: { Stmt_bb26[i0, i1] : i0 <= 399 and i0 >= 0 and i1 <= 399 and i1 >= 0 }; ; CHECK-NEXT: { Stmt_bb26[i0, i1] : i0 <= 399 and i0 >= 0 and i1 <= 399 and i1 >= 0 };
; CHECK: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK: { Stmt_bb26[i0, i1] -> [2, i0, i1] }; ; CHECK-NEXT: { Stmt_bb26[i0, i1] -> [2, i0, i1] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb26[i0, i1] -> MemRef_A[i0, i1] }; ; CHECK-NEXT: { Stmt_bb26[i0, i1] -> MemRef_A[i0, i1] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb26[i0, i1] -> MemRef_A[i0, i1] }; ; CHECK-NEXT: { Stmt_bb26[i0, i1] -> MemRef_A[i0, i1] };
; CHECK-NEXT: }
;
; CHECK: Statements {
; CHECK-NEXT: Stmt_bb7
; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_bb7[i0, i1] : i0 <= 399 and i0 >= 0 and i1 <= 399 and i1 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_bb7[i0, i1] -> [0, i0, i1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb7[i0, i1] -> MemRef_B[i0, i1] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb7[i0, i1] -> MemRef_B[i0, i1] };
; CHECK-NEXT: Stmt_bb17
; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_bb17[] };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_bb17[] -> [1, 0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb17[] -> MemRef_B[100, 100] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb17[] -> MemRef_A[0, 0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb17[] -> MemRef_A[0, 0] };
; CHECK-NEXT: Stmt_bb26
; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_bb26[i0, i1] : i0 <= 399 and i0 >= 0 and i1 <= 399 and i1 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_bb26[i0, i1] -> [2, i0, i1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb26[i0, i1] -> MemRef_A[i0, i1] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb26[i0, i1] -> MemRef_A[i0, i1] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

33
polly/test/ScopInfo/multidim_fortran_srem.ll
View File

@ -1,11 +1,34 @@
; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s ; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK: Statements {
; CHECK: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb203[i0, i1, i2] -> MemRef_tmp173[o0, 1 + i1, 1 + i2] : exists (e0 = floor((-i0 + o0)/3): 3e0 = -i0 + o0 and o0 <= 2 and o0 >= 0) }; ; CHECK-NEXT: Stmt_bb188
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: Domain :=
; CHECK: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb203[i0, i1, i2] -> MemRef_tmp173[o0, 1 + i1, 1 + i2] : exists (e0 = floor((-2 - i0 + o0)/3): 3e0 = -2 - i0 + o0 and o0 <= 2 and o0 >= 0) }; ; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb188[i0] : i0 >= 0 and i0 <= -3 + tmp183 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb188[i0] -> [i0, 0, 0, 0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb188[i0] -> MemRef_tmp192[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb188[i0] -> MemRef_tmp194[] };
; CHECK-NEXT: Stmt_bb203
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb203[i0, i1, i2] : i0 >= 0 and i0 <= -3 + tmp183 and i1 >= 0 and i1 <= -3 + tmp180 and i2 >= 0 and i2 <= -3 + tmp177 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb203[i0, i1, i2] -> [i0, 1, i1, i2] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb203[i0, i1, i2] -> MemRef_tmp192[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb203[i0, i1, i2] -> MemRef_tmp194[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb203[i0, i1, i2] -> MemRef_tmp173[o0, 1 + i1, 1 + i2] : exists (e0 = floor((-i0 + o0)/3): 3e0 = -i0 + o0 and o0 <= 2 and o0 >= 0) };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb203[i0, i1, i2] -> MemRef_tmp173[o0, 1 + i1, 1 + i2] : exists (e0 = floor((-2 - i0 + o0)/3): 3e0 = -2 - i0 + o0 and o0 <= 2 and o0 >= 0) };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb203[i0, i1, i2] -> MemRef_arg56[1 + i0, 1 + i1, 1 + i2] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [tmp180, tmp177, tmp183, tmp162, tmp157, tmp150, tmp146, tmp140, tmp] -> { Stmt_bb203[i0, i1, i2] -> MemRef_arg55[1 + i0, 1 + i1, 1 + i2] };
; CHECK-NEXT: }
define void @pluto(i32* noalias %arg, [0 x i32]* noalias %arg2, [0 x i32]* noalias %arg3, [0 x i32]* noalias %arg4, [0 x i32]* noalias %arg5, [0 x i32]* noalias %arg6, [0 x i32]* noalias %arg7, [0 x i32]* noalias %arg8, [0 x i32]* noalias %arg9, double* noalias %arg10, double* noalias %arg11, [0 x double]* noalias %arg12, [0 x double]* noalias %arg13, [0 x i32]* noalias %arg14, i32* noalias %arg15, [0 x i32]* noalias %arg16, i32* noalias %arg17, i32* noalias %arg18, i32* noalias %arg19, i32* noalias %arg20, i32* noalias %arg21, i32* noalias %arg22, i32* noalias %arg23, i32* noalias %arg24, i32* noalias %arg25, i32* noalias %arg26, i32* noalias %arg27, [0 x double]* noalias %arg28, [0 x double]* noalias %arg29, [0 x double]* noalias %arg30, [0 x double]* noalias %arg31, [0 x double]* noalias %arg32, [0 x double]* noalias %arg33, [0 x double]* noalias %arg34, [0 x double]* noalias %arg35, [0 x double]* noalias %arg36, [0 x double]* noalias %arg37, [0 x double]* noalias %arg38, [0 x double]* noalias %arg39, [0 x double]* noalias %arg40, [0 x double]* noalias %arg41, [0 x double]* noalias %arg42, [0 x double]* noalias %arg43, [0 x double]* noalias %arg44, [0 x double]* noalias %arg45, [0 x double]* noalias %arg46, [0 x double]* noalias %arg47, [0 x double]* noalias %arg48, [0 x double]* noalias %arg49, [0 x double]* noalias %arg50, [0 x double]* noalias %arg51, [0 x double]* noalias %arg52, [0 x double]* noalias %arg53, [0 x double]* noalias %arg54, [0 x double]* noalias %arg55, [0 x double]* noalias %arg56, [0 x double]* noalias %arg57, [0 x double]* noalias %arg58, [0 x double]* noalias %arg59, [0 x double]* noalias %arg60, [0 x double]* noalias %arg61, [0 x double]* noalias %arg62, [0 x double]* noalias %arg63, [0 x double]* noalias %arg64, [0 x double]* noalias %arg65, [0 x double]* noalias %arg66, [0 x double]* noalias %arg67, [0 x double]* noalias %arg68, [0 x double]* noalias %arg69, i32* noalias %arg70, i32* noalias %arg71, i32* noalias %arg72, i32* noalias %arg73, i32* noalias %arg74, i32* noalias %arg75, i32* noalias %arg76, i32* noalias %arg77, i32* noalias %arg78, i32* noalias %arg79, i32* noalias %arg80, i32* noalias %arg81, i32* noalias %arg82, i32* noalias %arg83, i32* noalias %arg84, i32* noalias %arg85, i32* noalias %arg86, i32* noalias %arg87, i32* noalias %arg88, i32* noalias %arg89, i32* noalias %arg90, i32* noalias %arg91, i32* noalias %arg92, i32* noalias %arg93, i32* noalias %arg94, i32* noalias %arg95, i32* noalias %arg96, i32* noalias %arg97, [0 x double]* noalias %arg98, [0 x double]* noalias %arg99, [0 x double]* noalias %arg100, [0 x double]* noalias %arg101, double* noalias %arg102, double* noalias %arg103, double* noalias %arg104, i32* noalias %arg105, double* noalias %arg106, double* noalias %arg107, [0 x double]* noalias %arg108, [0 x double]* noalias %arg109, [0 x double]* noalias %arg110, [0 x double]* noalias %arg111, [0 x double]* noalias %arg112, [0 x double]* noalias %arg113, [0 x double]* noalias %arg114, [0 x double]* noalias %arg115, [0 x double]* noalias %arg116, [0 x double]* noalias %arg117, [0 x double]* noalias %arg118, [0 x double]* noalias %arg119, [0 x double]* noalias %arg120, [0 x double]* noalias %arg121, [0 x double]* noalias %arg122, [0 x double]* noalias %arg123, [0 x double]* noalias %arg124, [0 x double]* noalias %arg125, [0 x double]* noalias %arg126, [0 x double]* noalias %arg127, [0 x double]* noalias %arg128, [0 x double]* noalias %arg129, [0 x double]* noalias %arg130, [0 x double]* noalias %arg131, i32* noalias %arg132, [0 x double]* noalias %arg133, [0 x double]* noalias %arg134, [0 x double]* noalias %arg135) { define void @pluto(i32* noalias %arg, [0 x i32]* noalias %arg2, [0 x i32]* noalias %arg3, [0 x i32]* noalias %arg4, [0 x i32]* noalias %arg5, [0 x i32]* noalias %arg6, [0 x i32]* noalias %arg7, [0 x i32]* noalias %arg8, [0 x i32]* noalias %arg9, double* noalias %arg10, double* noalias %arg11, [0 x double]* noalias %arg12, [0 x double]* noalias %arg13, [0 x i32]* noalias %arg14, i32* noalias %arg15, [0 x i32]* noalias %arg16, i32* noalias %arg17, i32* noalias %arg18, i32* noalias %arg19, i32* noalias %arg20, i32* noalias %arg21, i32* noalias %arg22, i32* noalias %arg23, i32* noalias %arg24, i32* noalias %arg25, i32* noalias %arg26, i32* noalias %arg27, [0 x double]* noalias %arg28, [0 x double]* noalias %arg29, [0 x double]* noalias %arg30, [0 x double]* noalias %arg31, [0 x double]* noalias %arg32, [0 x double]* noalias %arg33, [0 x double]* noalias %arg34, [0 x double]* noalias %arg35, [0 x double]* noalias %arg36, [0 x double]* noalias %arg37, [0 x double]* noalias %arg38, [0 x double]* noalias %arg39, [0 x double]* noalias %arg40, [0 x double]* noalias %arg41, [0 x double]* noalias %arg42, [0 x double]* noalias %arg43, [0 x double]* noalias %arg44, [0 x double]* noalias %arg45, [0 x double]* noalias %arg46, [0 x double]* noalias %arg47, [0 x double]* noalias %arg48, [0 x double]* noalias %arg49, [0 x double]* noalias %arg50, [0 x double]* noalias %arg51, [0 x double]* noalias %arg52, [0 x double]* noalias %arg53, [0 x double]* noalias %arg54, [0 x double]* noalias %arg55, [0 x double]* noalias %arg56, [0 x double]* noalias %arg57, [0 x double]* noalias %arg58, [0 x double]* noalias %arg59, [0 x double]* noalias %arg60, [0 x double]* noalias %arg61, [0 x double]* noalias %arg62, [0 x double]* noalias %arg63, [0 x double]* noalias %arg64, [0 x double]* noalias %arg65, [0 x double]* noalias %arg66, [0 x double]* noalias %arg67, [0 x double]* noalias %arg68, [0 x double]* noalias %arg69, i32* noalias %arg70, i32* noalias %arg71, i32* noalias %arg72, i32* noalias %arg73, i32* noalias %arg74, i32* noalias %arg75, i32* noalias %arg76, i32* noalias %arg77, i32* noalias %arg78, i32* noalias %arg79, i32* noalias %arg80, i32* noalias %arg81, i32* noalias %arg82, i32* noalias %arg83, i32* noalias %arg84, i32* noalias %arg85, i32* noalias %arg86, i32* noalias %arg87, i32* noalias %arg88, i32* noalias %arg89, i32* noalias %arg90, i32* noalias %arg91, i32* noalias %arg92, i32* noalias %arg93, i32* noalias %arg94, i32* noalias %arg95, i32* noalias %arg96, i32* noalias %arg97, [0 x double]* noalias %arg98, [0 x double]* noalias %arg99, [0 x double]* noalias %arg100, [0 x double]* noalias %arg101, double* noalias %arg102, double* noalias %arg103, double* noalias %arg104, i32* noalias %arg105, double* noalias %arg106, double* noalias %arg107, [0 x double]* noalias %arg108, [0 x double]* noalias %arg109, [0 x double]* noalias %arg110, [0 x double]* noalias %arg111, [0 x double]* noalias %arg112, [0 x double]* noalias %arg113, [0 x double]* noalias %arg114, [0 x double]* noalias %arg115, [0 x double]* noalias %arg116, [0 x double]* noalias %arg117, [0 x double]* noalias %arg118, [0 x double]* noalias %arg119, [0 x double]* noalias %arg120, [0 x double]* noalias %arg121, [0 x double]* noalias %arg122, [0 x double]* noalias %arg123, [0 x double]* noalias %arg124, [0 x double]* noalias %arg125, [0 x double]* noalias %arg126, [0 x double]* noalias %arg127, [0 x double]* noalias %arg128, [0 x double]* noalias %arg129, [0 x double]* noalias %arg130, [0 x double]* noalias %arg131, i32* noalias %arg132, [0 x double]* noalias %arg133, [0 x double]* noalias %arg134, [0 x double]* noalias %arg135) {
bb: bb:

43
polly/test/ScopInfo/multidim_ivs_and_integer_offsets_3d.ll
View File

@ -9,32 +9,23 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; A[i+3][j-4][k+7] = 1.0; ; A[i+3][j-4][k+7] = 1.0;
; } ; }
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK: { : } ; CHECK-NEXT: [o, m, n] -> { : }
;
; CHECK: p0: %o ; CHECK: p0: %o
; CHECK: p1: %m ; CHECK-NEXT: p1: %m
; CHECK: p2: %n ; CHECK-NEXT: p2: %n
; CHECK-NOT: p3 ; CHECK-NOT: p3
;
; CHECK: Domain ; CHECK: Statements {
; CHECK: [o, m, n] -> { Stmt_for_k[i0, i1, i2] : ; CHECK-NEXT: Stmt_for_k
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n] -> { Stmt_for_k[i0, i1, i2] : i0 >= 0 and i0 <= -4 + n and i1 >= 0 and i1 <= -5 + m and i2 >= 0 and i2 <= -8 + o };
; CHECK-DAG: i0 <= -4 + n ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[3 + i0, i1, 7 + i2] };
; CHECK-DAG: i1 <= -5 + m ; CHECK-NEXT: }
; CHECK-DAG: and
; CHECK-DAG: i2 >= 0
; CHECK-DAG: and
; CHECK-DAG: i2 <= -8 + o
; CHECK: }
; CHECK: Schedule
; CHECK: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK: MustWriteAccess
; CHECK: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[3 + i0, i1, 7 + i2] };
define void @foo(i64 %n, i64 %m, i64 %o, double* %A) { define void @foo(i64 %n, i64 %m, i64 %o, double* %A) {
entry: entry:

46
polly/test/ScopInfo/multidim_ivs_and_parameteric_offsets_3d.ll
View File

@ -13,36 +13,26 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; {{{((8 * ((((%m * %p) + %q) * %o) + %r)) + %A),+,(8 * %m * %o)}<%for.i>,+, ; {{{((8 * ((((%m * %p) + %q) * %o) + %r)) + %A),+,(8 * %m * %o)}<%for.i>,+,
; (8 * %o)}<%for.j>,+,8}<%for.k> ; (8 * %o)}<%for.j>,+,8}<%for.k>
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK: [o, m, n, p, q, r] -> { : (q <= 0 and q >= 1 - m and r <= -1 and r >= 1 - o) or (r = 0 and q <= 0 and q >= -m) or (r = -o and q <= 1 and q >= 1 - m) } ; CHECK-NEXT: [o, m, n, p, q, r] -> { : (q <= 0 and q >= 1 - m and r <= -1 and r >= 1 - o) or (r = 0 and q <= 0 and q >= -m) or (r = -o and q <= 1 and q >= 1 - m) }
; ;
; CHECK: p0: %o ; CHECK: p0: %o
; CHECK: p1: %m ; CHECK-NEXT: p1: %m
; CHECK: p2: %n ; CHECK-NEXT: p2: %n
; CHECK: p3: %p ; CHECK-NEXT: p3: %p
; CHECK: p4: %q ; CHECK-NEXT: p4: %q
; CHECK: p5: %r ; CHECK-NEXT: p5: %r
; CHECK-NOT: p6 ; CHECK-NOT: p6
; ;
; CHECK: Domain ; CHECK: Statements {
; CHECK: [o, m, n, p, q, r] -> { Stmt_for_k[i0, i1, i2] : ; CHECK-NEXT: Stmt_for_k
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n, p, q, r] -> { Stmt_for_k[i0, i1, i2] : i0 >= 0 and i0 <= -1 + n and i1 >= 0 and i1 <= -1 + m and i2 >= 0 and i2 <= -1 + o };
; CHECK-DAG: i0 <= -1 + n ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n, p, q, r] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n, p, q, r] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[-1 + p + i0, -1 + m + q + i1, o + r + i2] : i1 <= -q and i2 <= -1 - r; Stmt_for_k[i0, i1, i2] -> MemRef_A[p + i0, -1 + q + i1, o + r + i2] : i1 >= 1 - q and i2 <= -1 - r; Stmt_for_k[i0, i1, i2] -> MemRef_A[-1 + p + i0, m + q + i1, r + i2] : i1 <= -1 - q and i2 >= -r; Stmt_for_k[i0, i1, i2] -> MemRef_A[p + i0, q + i1, r + i2] : i1 >= -q and i2 >= -r };
; CHECK-DAG: i1 <= -1 + m ; CHECK-NEXT: }
; CHECK-DAG: and
; CHECK-DAG: i2 >= 0
; CHECK-DAG: and
; CHECK-DAG: i2 <= -1 + o
; CHECK: }
; CHECK: Schedule
; CHECK: [o, m, n, p, q, r] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK: MustWriteAccess
; CHECK: [o, m, n, p, q, r] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[-1 + p + i0, -1 + m + q + i1, o + r + i2] : i1 <= -q and i2 <= -1 - r; Stmt_for_k[i0, i1, i2] -> MemRef_A[p + i0, -1 + q + i1, o + r + i2] : i1 >= 1 - q and i2 <= -1 - r; Stmt_for_k[i0, i1, i2] -> MemRef_A[-1 + p + i0, m + q + i1, r + i2] : i1 <= -1 - q and i2 >= -r; Stmt_for_k[i0, i1, i2] -> MemRef_A[p + i0, q + i1, r + i2] : i1 >= -q and i2 >= -r };
define void @foo(i64 %n, i64 %m, i64 %o, double* %A, i64 %p, i64 %q, i64 %r) { define void @foo(i64 %n, i64 %m, i64 %o, double* %A, i64 %p, i64 %q, i64 %r) {
entry: entry:

41
polly/test/ScopInfo/multidim_nested_start_integer.ll
View File

@ -8,30 +8,23 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; A[i+3][j-4][k+7] = 1.0; ; A[i+3][j-4][k+7] = 1.0;
; } ; }
; ;
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK: { : } ; CHECK-NEXT: [o, m, n] -> { : }
; CHECK: p0: %o ;
; CHECK: p1: %m ; CHECK: p0: %o
; CHECK: p2: %n ; CHECK-NEXT: p1: %m
; CHECK-NOT: p3 ; CHECK-NEXT: p2: %n
; CHECK: Domain ; CHECK-NOT: p3
; CHECK: [o, m, n] -> { Stmt_for_k[i0, i1, i2] : ;
; CHECK-DAG: i0 >= 0 ; CHECK: Statements {
; CHECK-DAG: and ; CHECK-NEXT: Stmt_for_k
; CHECK-DAG: i0 <= -4 + n ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n] -> { Stmt_for_k[i0, i1, i2] : i0 >= 0 and i0 <= -4 + n and i1 >= 0 and i1 <= -5 + m and i2 >= 0 and i2 <= -8 + o };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK-DAG: i1 <= -5 + m ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[3 + i0, i1, 7 + i2] };
; CHECK-DAG: i2 >= 0 ; CHECK-NEXT: }
; CHECK-DAG: and
; CHECK-DAG: i2 <= -8 + o
; CHECK: }
; CHECK: Schedule
; CHECK: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK: MustWriteAccess
; CHECK: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[3 + i0, i1, 7 + i2] };
define void @foo(i64 %n, i64 %m, i64 %o, double* %A) { define void @foo(i64 %n, i64 %m, i64 %o, double* %A) {
entry: entry:

34
polly/test/ScopInfo/multidim_only_ivs_2d.ll
View File

@ -9,26 +9,22 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; A[i][j] = 1.0; ; A[i][j] = 1.0;
; } ; }
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK: [m, n] -> { : } ; CHECK-NEXT: [m, n] -> { : }
; CHECK: p0: %m ;
; CHECK: p1: %n ; CHECK: p0: %m
; CHECK-NEXT: p1: %n
; CHECK-NOT: p3 ; CHECK-NOT: p3
;
; CHECK: Domain ; CHECK: Statements {
; CHECK: [m, n] -> { Stmt_for_j[i0, i1] : ; CHECK-NEXT: Stmt_for_j
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [m, n] -> { Stmt_for_j[i0, i1] : i0 >= 0 and i0 <= -1 + n and i1 >= 0 and i1 <= -1 + m };
; CHECK-DAG: i0 <= -1 + n ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [m, n] -> { Stmt_for_j[i0, i1] -> [i0, i1] };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [m, n] -> { Stmt_for_j[i0, i1] -> MemRef_A[i0, i1] };
; CHECK-DAG: i1 <= -1 + m ; CHECK-NEXT: }
; CHECK: }
; CHECK: Schedule
; CHECK: [m, n] -> { Stmt_for_j[i0, i1] -> [i0, i1] };
; CHECK: MustWriteAccess
; CHECK: [m, n] -> { Stmt_for_j[i0, i1] -> MemRef_A[i0, i1] };
define void @foo(i64 %n, i64 %m, double* %A) { define void @foo(i64 %n, i64 %m, double* %A) {
entry: entry:

40
polly/test/ScopInfo/multidim_only_ivs_3d.ll
View File

@ -9,31 +9,23 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; A[i][j][k] = 1.0; ; A[i][j][k] = 1.0;
; } ; }
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK: [o, m, n] -> { : } ; CHECK-NEXT: [o, m, n] -> { : }
; CHECK: p0: %o
; CHECK: p1: %m
; CHECK: p2: %n
; CHECK-NOT: p3
; ;
; CHECK: Domain ; CHECK: p0: %o
; CHECK: [o, m, n] -> { Stmt_for_k[i0, i1, i2] : ; CHECK-NEXT: p1: %m
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: p2: %n
; CHECK-DAG: and ; CHECK-NOT: p3
; CHECK-DAG: i0 <= -1 + n ;
; CHECK-DAG: and ; CHECK: Statements {
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: Stmt_for_k
; CHECK-DAG: and ; CHECK-NEXT: Domain :=
; CHECK-DAG: i1 <= -1 + m ; CHECK-NEXT: [o, m, n] -> { Stmt_for_k[i0, i1, i2] : i0 >= 0 and i0 <= -1 + n and i1 >= 0 and i1 <= -1 + m and i2 >= 0 and i2 <= -1 + o };
; CHECK-DAG: and ; CHECK-NEXT: Schedule :=
; CHECK-DAG: i2 >= 0 ; CHECK-NEXT: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK-DAG: and ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: i2 <= -1 + o ; CHECK-NEXT: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[i0, i1, i2] };
; CHECK: } ; CHECK-NEXT: }
; CHECK: Schedule
; CHECK: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK: WriteAccess
; CHECK: [o, m, n] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[i0, i1, i2] };
define void @foo(i64 %n, i64 %m, i64 %o, double* %A) { define void @foo(i64 %n, i64 %m, i64 %o, double* %A) {
entry: entry:

65
polly/test/ScopInfo/multidim_only_ivs_3d_cast.ll
View File

@ -12,44 +12,33 @@
; m and o, such that we generate unnecessary run-time checks. This is not a ; m and o, such that we generate unnecessary run-time checks. This is not a
; correctness issue, but could be improved. ; correctness issue, but could be improved.
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK: [o, m, n, p_3, p_4] -> { : ; CHECK-NEXT: [o, m, n, p_3, p_4] -> { : p_3 >= m and p_4 >= o }
; CHECK-DAG: p_3 >= m ;
; CHECK-DAG: p_4 >= o ; CHECK: p0: %o
; CHECK: } ; CHECK-NEXT: p1: %m
; CHECK: p0: %o ; CHECK-NEXT: p2: %n
; CHECK: p1: %m ; CHECK-NEXT: p3: (zext i32 %m to i64)
; CHECK: p2: %n ; CHECK-NEXT: p4: (zext i32 %o to i64)
; CHECK: p3: (zext i32 %m to i64) ; CHECK-NOT: p5
; CHECK: p4: (zext i32 %o to i64) ;
; CHECK-NOT: p5 ; CHECK: Arrays {
; CHECK-NEXT: double MemRef_A[*][(zext i32 %m to i64)][(zext i32 %o to i64)]; // Element size 8
; CHECK: Arrays { ; CHECK-NEXT: }
; CHECK: double MemRef_A[*][(zext i32 %m to i64)][(zext i32 %o to i64)]; // Element size 8 ;
; CHECK: } ; CHECK: Arrays (Bounds as pw_affs) {
; CHECK: Arrays (Bounds as pw_affs) { ; CHECK-NEXT: double MemRef_A[*][ [p_3] -> { [] -> [(p_3)] } ][ [p_4] -> { [] -> [(p_4)] } ]; // Element size 8
; CHECK: double MemRef_A[*][ [p_3] -> { [] -> [(p_3)] } ][ [p_4] -> { [] -> [(p_4)] } ]; // Element size 8 ; CHECK-NEXT: }
; CHECK: } ;
; CHECK: Statements {
; CHECK-NEXT: Stmt_for_k
; CHECK: Domain ; CHECK-NEXT: Domain :=
; CHECK: [o, m, n, p_3, p_4] -> { Stmt_for_k[i0, i1, i2] : ; CHECK-NEXT: [o, m, n, p_3, p_4] -> { Stmt_for_k[i0, i1, i2] : i0 >= 0 and i0 <= -1 + n and i1 >= 0 and i1 <= -1 + m and i2 >= 0 and i2 <= -1 + o };
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n, p_3, p_4] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK-DAG: i0 <= -1 + n ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: [o, m, n, p_3, p_4] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[i0, i1, i2] };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: }
; CHECK-DAG: and
; CHECK-DAG: i1 <= -1 + m
; CHECK-DAG: and
; CHECK-DAG: i2 >= 0
; CHECK-DAG: and
; CHECK-DAG: i2 <= -1 + o
; CHECK: }
; CHECK: Schedule
; CHECK: [o, m, n, p_3, p_4] -> { Stmt_for_k[i0, i1, i2] -> [i0, i1, i2] };
; CHECK: WriteAccess
; CHECK: [o, m, n, p_3, p_4] -> { Stmt_for_k[i0, i1, i2] -> MemRef_A[i0, i1, i2] };
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"

40
polly/test/ScopInfo/multidim_only_ivs_3d_reverse.ll
View File

@ -14,31 +14,23 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; A[i][j][k] = 1.0; ; A[i][j][k] = 1.0;
; } ; }
; CHECK: Assumed Context: ; CHECK: Assumed Context:
; CHECK: { : } ; CHECK-NEXT: [m, o, n] -> { : }
; CHECK: p0: %m
; CHECK: p1: %o
; CHECK: p2: %n
; CHECK-NOT: p3
; ;
; CHECK: Domain ; CHECK: p0: %m
; CHECK: [m, o, n] -> { Stmt_for_j[i0, i1, i2] : ; CHECK-NEXT: p1: %o
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: p2: %n
; CHECK-DAG: and ; CHECK-NOT: p3
; CHECK-DAG: i0 <= -1 + n ;
; CHECK-DAG: and ; CHECK: Statements {
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: Stmt_for_j
; CHECK-DAG: and ; CHECK-NEXT: Domain :=
; CHECK-DAG: i1 <= -1 + o ; CHECK-NEXT: [m, o, n] -> { Stmt_for_j[i0, i1, i2] : i0 >= 0 and i0 <= -1 + n and i1 >= 0 and i1 <= -1 + o and i2 >= 0 and i2 <= -1 + m };
; CHECK-DAG: and ; CHECK-NEXT: Schedule :=
; CHECK-DAG: i2 >= 0 ; CHECK-NEXT: [m, o, n] -> { Stmt_for_j[i0, i1, i2] -> [i0, i1, i2] };
; CHECK-DAG: and ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: i2 <= -1 + m ; CHECK-NEXT: [m, o, n] -> { Stmt_for_j[i0, i1, i2] -> MemRef_A[i0, i2, i1] };
; CHECK: } ; CHECK-NEXT: }
; CHECK: Schedule
; CHECK: [m, o, n] -> { Stmt_for_j[i0, i1, i2] -> [i0, i1, i2] };
; CHECK: WriteAccess
; CHECK: [m, o, n] -> { Stmt_for_j[i0, i1, i2] -> MemRef_A[i0, i2, i1] };
define void @foo(i64 %n, i64 %m, i64 %o, double* %A) { define void @foo(i64 %n, i64 %m, i64 %o, double* %A) {
entry: entry:

50
polly/test/ScopInfo/multidim_single_and_multidim_array.ll
View File

@ -19,22 +19,42 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; CHECK-NOT: Stmt_for_i_1 ; CHECK-NOT: Stmt_for_i_1
; NONAFFINE: p0: %n ; NONAFFINE: p0: %n
; NONAFFINE: p1: ((-1 + %n) * %n) ; NONAFFINE-NEXT: p1: ((-1 + %n) * %n)
; NONAFFINE: Statements { ;
; NONAFFINE: Stmt_for_i_1 ; NONAFFINE: Statements {
; NONAFFINE: MayWriteAccess := [Reduction Type: NONE] ; NONAFFINE-NEXT: Stmt_for_i_1
; NONAFFINE: [n, p_1] -> { Stmt_for_i_1[i0] -> MemRef_X[o0] : o0 >= -2305843009213693952 and o0 <= 2305843009213693949 }; ; NONAFFINE-NEXT: Domain :=
; NONAFFINE: Stmt_for_i_2 ; NONAFFINE-NEXT: [n, p_1] -> { Stmt_for_i_1[i0] : i0 >= 0 and i0 <= -1 + n };
; NONAFFINE: MustWriteAccess := [Reduction Type: NONE] ; NONAFFINE-NEXT: Schedule :=
; NONAFFINE: [n, p_1] -> { Stmt_for_i_2[i0] -> MemRef_X[p_1 + i0] }; ; NONAFFINE-NEXT: [n, p_1] -> { Stmt_for_i_1[i0] -> [0, i0] };
; NONAFFINE-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; NONAFFINE-NEXT: [n, p_1] -> { Stmt_for_i_1[i0] -> MemRef_X[o0] : o0 >= -2305843009213693952 and o0 <= 2305843009213693949 };
; NONAFFINE-NEXT: Stmt_for_i_2
; NONAFFINE-NEXT: Domain :=
; NONAFFINE-NEXT: [n, p_1] -> { Stmt_for_i_2[i0] : i0 >= 0 and i0 <= -1 + n };
; NONAFFINE-NEXT: Schedule :=
; NONAFFINE-NEXT: [n, p_1] -> { Stmt_for_i_2[i0] -> [1, i0] };
; NONAFFINE-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; NONAFFINE-NEXT: [n, p_1] -> { Stmt_for_i_2[i0] -> MemRef_X[p_1 + i0] };
; NONAFFINE-NEXT: }
; DELIN: Stmt_for_i_1 ; DELIN: Statements {
; DELIN: MustWriteAccess := ; DELIN-NEXT: Stmt_for_i_1
; DELIN: [n] -> { Stmt_for_i_1[i0] -> MemRef_X[i0, 0] }; ; DELIN-NEXT: Domain :=
; DELIN: Stmt_for_i_2 ; DELIN-NEXT: [n] -> { Stmt_for_i_1[i0] : i0 >= 0 and i0 <= -1 + n };
; DELIN: MustWriteAccess := ; DELIN-NEXT: Schedule :=
; DELIN: [n] -> { Stmt_for_i_2[i0] -> MemRef_X[-1 + n, i0] }; ; DELIN-NEXT: [n] -> { Stmt_for_i_1[i0] -> [0, i0] };
; DELIN-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; DELIN-NEXT: [n] -> { Stmt_for_i_1[i0] -> MemRef_X[i0, 0] };
; DELIN-NEXT: Stmt_for_i_2
; DELIN-NEXT: Domain :=
; DELIN-NEXT: [n] -> { Stmt_for_i_2[i0] : i0 >= 0 and i0 <= -1 + n };
; DELIN-NEXT: Schedule :=
; DELIN-NEXT: [n] -> { Stmt_for_i_2[i0] -> [1, i0] };
; DELIN-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; DELIN-NEXT: [n] -> { Stmt_for_i_2[i0] -> MemRef_X[-1 + n, i0] };
; DELIN-NEXT: }
define void @single-and-multi-dimensional-array(i64 %n, float* %X) { define void @single-and-multi-dimensional-array(i64 %n, float* %X) {
entry: entry:

29
polly/test/ScopInfo/multidim_srem.ll
View File

@ -6,23 +6,18 @@
; for (long k = 0; k < n; k++) ; for (long k = 0; k < n; k++)
; A[i % 2][j][k] += 10; ; A[i % 2][j][k] += 10;
; } ; }
;
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK: Statements {
; CHECK: [n] -> { Stmt_for_body_8[i0, i1, i2] -> MemRef_A[o0, i1, i2] : exists (e0 = floor((-i0 + o0)/2): ; CHECK-NEXT: Stmt_for_body_8
; CHECK-DAG: 2e0 = -i0 + o0 ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [n] -> { Stmt_for_body_8[i0, i1, i2] : i0 <= 199 and i0 >= 0 and i1 >= 0 and i1 <= -1 + n and i2 >= 0 and i2 <= -1 + n };
; CHECK-DAG: o0 <= 1 ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: [n] -> { Stmt_for_body_8[i0, i1, i2] -> [i0, i1, i2] };
; CHECK-DAG: o0 >= 0 ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: }; ; CHECK-NEXT: [n] -> { Stmt_for_body_8[i0, i1, i2] -> MemRef_A[o0, i1, i2] : exists (e0 = floor((-i0 + o0)/2): 2e0 = -i0 + o0 and o0 <= 1 and o0 >= 0) };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [n] -> { Stmt_for_body_8[i0, i1, i2] -> MemRef_A[o0, i1, i2] : exists (e0 = floor((-i0 + o0)/2): ; CHECK-NEXT: [n] -> { Stmt_for_body_8[i0, i1, i2] -> MemRef_A[o0, i1, i2] : exists (e0 = floor((-i0 + o0)/2): 2e0 = -i0 + o0 and o0 <= 1 and o0 >= 0) };
; CHECK-DAG: 2e0 = -i0 + o0 ; CHECK-NEXT: }
; CHECK-DAG: and
; CHECK-DAG: o0 <= 1
; CHECK-DAG: and
; CHECK-DAG: o0 >= 0
; CHECK: };
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

21
polly/test/ScopInfo/nested-loops.ll
View File

@ -27,14 +27,13 @@ return:
ret void ret void
} }
; CHECK: body
; CHECK: Domain := ; CHECK: Statements {
; CHECK: { Stmt_body[i0, i1] : ; CHECK-NEXT: Stmt_body
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: { Stmt_body[i0, i1] : i0 <= 2046 and i0 >= 0 and i1 <= 1022 and i1 >= 0 };
; CHECK-DAG: i0 <= 2046 ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: { Stmt_body[i0, i1] -> [i0, i1] };
; CHECK-DAG: i1 >= 0 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: and ; CHECK-NEXT: { Stmt_body[i0, i1] -> MemRef_a[i1] };
; CHECK-DAG: i1 <= 1022 ; CHECK-NEXT: }
; CHECK: }

65
polly/test/ScopInfo/non_affine_region_1.ll
View File

@ -18,31 +18,46 @@
; } ; }
; } ; }
; ;
; CHECK: Region: %bb1---%bb21 ; TODO: We build a complicated representation of Stmt_bb10__TO__bb18's domain that will also complicate the schedule.
; CHECK: Stmt_bb3 ; Once the domain is simple this test should fail and this TODO can be removed.
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [b] -> { Stmt_bb3[i0] -> MemRef_x_1__phi[] }; ; CHECK: Statements {
; CHECK: Stmt_bb7 ; CHECK-NEXT: Stmt_bb3
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: Domain :=
; CHECK: [b] -> { Stmt_bb7[i0] -> MemRef_x_1__phi[] }; ; CHECK-NEXT: [b] -> { Stmt_bb3[i0] : i0 <= 1023 and i0 >= 0 and i0 <= -1 + b };
; CHECK: Stmt_bb8 ; CHECK-NEXT: Schedule :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: [b] -> { Stmt_bb3[i0] -> [i0, 2] };
; CHECK: [b] -> { Stmt_bb8[i0] -> MemRef_x_1__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb10__TO__bb18 ; CHECK-NEXT: [b] -> { Stmt_bb3[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: Domain := ; CHECK-NEXT: Stmt_bb7
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] : ; CHECK-NEXT: Domain :=
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: [b] -> { Stmt_bb7[i0] : i0 >= b and 2i0 >= 1 + b and i0 <= 1023 and i0 >= 0 };
; CHECK-DAG: and ; CHECK-NEXT: Schedule :=
; CHECK-DAG: i0 <= 1023 ; CHECK-NEXT: [b] -> { Stmt_bb7[i0] -> [i0, 1] };
; CHECK: }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: Schedule := ; CHECK-NEXT: [b] -> { Stmt_bb7[i0] -> MemRef_x_1__phi[] };
; TODO: We build a complicated representation of the domain that will also complicate the schedule. ; CHECK-NEXT: Stmt_bb8
; Once the domain is as simple as shown above this test should fail and this TODO can be removed. ; CHECK-NEXT: Domain :=
; CHECK-NOT: [b] -> { Stmt_bb10__TO__bb18[i0] -> [i0, 3] }; ; CHECK-NEXT: [b] -> { Stmt_bb8[0] : b = 0 };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_x_1__phi[] } ; CHECK-NEXT: [b] -> { Stmt_bb8[i0] -> [0, 0] };
; CHECK-NOT: [Scalar: 1] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; ; CHECK-NEXT: [b] -> { Stmt_bb8[i0] -> MemRef_b[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb8[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: Stmt_bb10__TO__bb18
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] : (i0 <= 1023 and i0 >= 0 and i0 <= -1 + b) or (i0 >= b and 2i0 >= 1 + b and i0 <= 1023 and i0 >= 0); Stmt_bb10__TO__bb18[0] : b = 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> [i0, 3] : i0 <= -1 + b or (i0 >= b and 2i0 >= 1 + b); Stmt_bb10__TO__bb18[0] -> [0, 3] : b = 0 };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_A[o0] : o0 >= -2147483648 and o0 <= 2147483645 };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_A[o0] : o0 >= -2147483648 and o0 <= 2147483645 };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %b) { define void @f(i32* %A, i32 %b) {

63
polly/test/ScopInfo/non_affine_region_2.ll
View File

@ -18,45 +18,32 @@
; A[i] = x; ; A[i] = x;
; } ; }
; } ; }
; CHECK-LABEL: Region: %bb2---%bb21
; ;
; CHECK: Region: %bb2---%bb21 ; CHECK: Statements {
; CHECK: Stmt_bb3__TO__bb18 ; CHECK-NEXT: Stmt_bb3__TO__bb18
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: { Stmt_bb3__TO__bb18[i0] : ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] : i0 <= 1023 and i0 >= 0 };
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> [i0, 0] };
; CHECK-DAG: i0 <= 1023 ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: }; ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] };
; CHECK: Schedule := ; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb3__TO__bb18[i0] -> [i0, 0] }; ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] }; ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: Stmt_bb18
; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: Domain :=
; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] }; ; CHECK-NEXT: { Stmt_bb18[i0] : i0 <= 1023 and i0 >= 0 };
; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] }; ; CHECK-NEXT: Schedule :=
; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb18[i0] -> [i0, 1] };
; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] }; ; CHECK-NEXT: { Stmt_bb18[i0] -> MemRef_x_2__phi[] };
; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb18[i0] -> MemRef_A[i0] };
; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK-NEXT: }
; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] };
; CHECK-NOT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] };
; CHECK: Stmt_bb18
; CHECK: Domain :=
; CHECK: { Stmt_bb18[i0] :
; CHECK-DAG: i0 >= 0
; CHECK-DAG: and
; CHECK-DAG: i0 <= 1023
; CHECK: };
; CHECK: Schedule :=
; CHECK: { Stmt_bb18[i0] -> [i0, 1] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb18[i0] -> MemRef_x_2__phi[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb18[i0] -> MemRef_A[i0] };
;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %b) { define void @f(i32* %A, i32 %b) {

65
polly/test/ScopInfo/non_affine_region_3.ll
View File

@ -18,41 +18,38 @@
; A[i] = x; ; A[i] = x;
; } ; }
; } ; }
; CHECK-LABEL: Region: %bb2---%bb21
; ;
; CHECK: Region: %bb2---%bb21 ; CHECK: Statements {
; CHECK: Stmt_bb3__TO__bb18 ; CHECK-NEXT: Stmt_bb3__TO__bb18
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: { Stmt_bb3__TO__bb18[i0] : ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] : i0 <= 1023 and i0 >= 0 };
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: Schedule :=
; CHECK-DAG: and ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> [i0, 0] };
; CHECK-DAG: i0 <= 1023 ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: } ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] };
; CHECK: Schedule := ; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb3__TO__bb18[i0] -> [i0, 0] }; ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_b[] };
; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK-NEXT: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: Stmt_bb18
; CHECK: { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] }; ; CHECK-NEXT: Domain :=
; CHECK: Stmt_bb18 ; CHECK-NEXT: { Stmt_bb18[i0] : i0 <= 1023 and i0 >= 0 };
; CHECK: Domain := ; CHECK-NEXT: Schedule :=
; CHECK: { Stmt_bb18[i0] : ; CHECK-NEXT: { Stmt_bb18[i0] -> [i0, 1] };
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-DAG: and ; CHECK-NEXT: { Stmt_bb18[i0] -> MemRef_x_2__phi[] };
; CHECK-DAG: i0 <= 1023 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: } ; CHECK-NEXT: { Stmt_bb18[i0] -> MemRef_A[i0] };
; CHECK: Schedule := ; CHECK-NEXT: }
; CHECK: { Stmt_bb18[i0] -> [i0, 1] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb18[i0] -> MemRef_x_2__phi[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb18[i0] -> MemRef_A[i0] };
;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %b) { define void @f(i32* %A, i32 %b) {

84
polly/test/ScopInfo/non_affine_region_4.ll
View File

@ -11,54 +11,48 @@
; A[i] = x + y; ; A[i] = x + y;
; } ; }
; } ; }
; CHECK-LABEL: Region: %bb1---%bb11
; ;
; CHECK: Region: %bb1---%bb11 ; CHECK: Arrays {
; CHECK-NEXT: i32 MemRef_A[*]; // Element size 4
; CHECK-NEXT: i32 MemRef_x; [BasePtrOrigin: MemRef_A] // Element size 4
; CHECK-NEXT: i32 MemRef_y__phi; // Element size 4
; CHECK-NEXT: }
; ;
; CHECK: Arrays { ; CHECK: Arrays (Bounds as pw_affs) {
; CHECK: i32 MemRef_A[*]; ; CHECK-NEXT: i32 MemRef_A[*]; // Element size 4
; CHECK: i32 MemRef_x; [BasePtrOrigin: MemRef_A] ; CHECK-NEXT: i32 MemRef_x; [BasePtrOrigin: MemRef_A] // Element size 4
; CHECK: i32 MemRef_y__phi; ; CHECK-NEXT: i32 MemRef_y__phi; // Element size 4
; CHECK: } ; CHECK-NEXT: }
;
; CHECK: Arrays (Bounds as pw_affs) {
; CHECK: i32 MemRef_A[*];
; CHECK: i32 MemRef_x; [BasePtrOrigin: MemRef_A]
; CHECK: i32 MemRef_y__phi;
; CHECK: }
;
; CHECK: Stmt_bb2__TO__bb7
; CHECK: Domain :=
; CHECK: { Stmt_bb2__TO__bb7[i0] :
; CHECK-DAG: i0 >= 0
; CHECK-DAG: and
; CHECK-DAG: i0 <= 1023
; CHECK: };
; CHECK: Schedule :=
; CHECK: { Stmt_bb2__TO__bb7[i0] -> [i0, 0] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_A[i0] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_x[] };
; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] };
; CHECK: Stmt_bb7
; CHECK: Domain :=
; CHECK: { Stmt_bb7[i0] :
; CHECK-DAG: i0 >= 0
; CHECK-DAG: and
; CHECK-DAG: i0 <= 1023
; CHECK: };
; CHECK: Schedule :=
; CHECK: { Stmt_bb7[i0] -> [i0, 1] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb7[i0] -> MemRef_x[] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb7[i0] -> MemRef_y__phi[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: { Stmt_bb7[i0] -> MemRef_A[i0] };
; ;
; CHECK: Statements {
; CHECK-NEXT: Stmt_bb2__TO__bb7
; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_bb2__TO__bb7[i0] : i0 <= 1023 and i0 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_bb2__TO__bb7[i0] -> [i0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2__TO__bb7[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_bb2__TO__bb7[i0] -> MemRef_x[] };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] };
; CHECK-NEXT: Stmt_bb7
; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_bb7[i0] : i0 <= 1023 and i0 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_bb7[i0] -> [i0, 1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_bb7[i0] -> MemRef_x[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_bb7[i0] -> MemRef_y__phi[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb7[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %b) { define void @f(i32* %A, i32 %b) {

64
polly/test/ScopInfo/phi_condition_modeling_2.ll
View File

@ -10,35 +10,41 @@
; A[i] = tmp; ; A[i] = tmp;
; } ; }
; } ; }
;
; CHECK: Statements { ; CHECK: Statements {
; CHECK-LABEL: Stmt_bb6 ; CHECK-NEXT: Stmt_bb6
; CHECK-NOT: Access ; CHECK-NEXT: Domain :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: [N, c] -> { Stmt_bb6[i0] : i0 >= 1 + c and i0 >= 0 and i0 <= -1 + N };
; CHECK: [N, c] -> { Stmt_bb6[i0] -> MemRef_tmp_0__phi[] }; ; CHECK-NEXT: Schedule :=
; CHECK-NOT: Access ; CHECK-NEXT: [N, c] -> { Stmt_bb6[i0] -> [i0, 1] };
; CHECK-LABEL: Stmt_bb7 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NOT: Access ; CHECK-NEXT: [N, c] -> { Stmt_bb6[i0] -> MemRef_tmp_0__phi[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: Stmt_bb7
; CHECK: [N, c] -> { Stmt_bb7[i0] -> MemRef_tmp_0__phi[] }; ; CHECK-NEXT: Domain :=
; CHECK-NOT: Access ; CHECK-NEXT: [N, c] -> { Stmt_bb7[i0] : i0 >= 0 and i0 <= c and i0 <= -1 + N };
; CHECK-LABEL: Stmt_bb8 ; CHECK-NEXT: Schedule :=
; CHECK-NOT: Access ; CHECK-NEXT: [N, c] -> { Stmt_bb7[i0] -> [i0, 0] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_bb8[i0] -> MemRef_tmp_0__phi[] }; ; CHECK-NEXT: [N, c] -> { Stmt_bb7[i0] -> MemRef_tmp_0__phi[] };
; CHECK-NOT: Access ; CHECK-NEXT: Stmt_bb8
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: Domain :=
; CHECK: [N, c] -> { Stmt_bb8[i0] -> MemRef_tmp_0[] }; ; CHECK-NEXT: [N, c] -> { Stmt_bb8[i0] : i0 >= 0 and i0 <= -1 + N };
; CHECK-NOT: Access ; CHECK-NEXT: Schedule :=
; CHECK-LABEL: Stmt_bb8b ; CHECK-NEXT: [N, c] -> { Stmt_bb8[i0] -> [i0, 2] };
; CHECK-NOT: Access ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: [N, c] -> { Stmt_bb8[i0] -> MemRef_tmp_0__phi[] };
; CHECK: [N, c] -> { Stmt_bb8b[i0] -> MemRef_tmp_0[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NOT: Access ; CHECK-NEXT: [N, c] -> { Stmt_bb8[i0] -> MemRef_tmp_0[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: Stmt_bb8b
; CHECK: [N, c] -> { Stmt_bb8b[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: Domain :=
; CHECK-NOT: Access ; CHECK-NEXT: [N, c] -> { Stmt_bb8b[i0] : i0 >= 0 and i0 <= -1 + N };
; CHECK: } ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N, c] -> { Stmt_bb8b[i0] -> [i0, 3] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_bb8b[i0] -> MemRef_tmp_0[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N, c] -> { Stmt_bb8b[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

44
polly/test/ScopInfo/phi_loop_carried_float.ll
View File

@ -5,28 +5,30 @@
; for (int i = 0; i < N; i++) ; for (int i = 0; i < N; i++)
; tmp += A[i]; ; tmp += A[i];
; } ; }
;
; CHECK: Statements { ; CHECK: Statements {
; CHECK-LABEL: Stmt_bb1 ; CHECK-NEXT: Stmt_bb1
; CHECK-NOT: Access ; CHECK-NEXT: Domain :=
; CHECK: ReadAccess := [Reduction Type: NONE] ; CHECK-NEXT: [N] -> { Stmt_bb1[i0] : i0 >= 0 and i0 <= N; Stmt_bb1[0] : N <= -1 };
; CHECK: [N] -> { Stmt_bb1[i0] -> MemRef_tmp_0__phi[] }; ; CHECK-NEXT: Schedule :=
; CHECK-NOT: Access ; CHECK-NEXT: [N] -> { Stmt_bb1[i0] -> [i0, 0] : i0 <= N; Stmt_bb1[0] -> [0, 0] : N <= -1 };
; CHECK: MustWriteAccess := [Reduction Type: NONE] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_bb1[i0] -> MemRef_tmp_0[] }; ; CHECK-NEXT: [N] -> { Stmt_bb1[i0] -> MemRef_tmp_0__phi[] };
; CHECK-NOT: Access ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-LABEL: Stmt_bb4 ; CHECK-NEXT: [N] -> { Stmt_bb1[i0] -> MemRef_tmp_0[] };
; CHECK-NOT: Access ; CHECK-NEXT: Stmt_bb4
; CHECK: MustWriteAccess := [Reduction Type: NONE] ; CHECK-NEXT: Domain :=
; CHECK: [N] -> { Stmt_bb4[i0] -> MemRef_tmp_0__phi[] }; ; CHECK-NEXT: [N] -> { Stmt_bb4[i0] : i0 <= -1 + N and i0 >= 0 };
; CHECK-NOT: Access ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] ; CHECK-NEXT: [N] -> { Stmt_bb4[i0] -> [i0, 1] };
; CHECK: [N] -> { Stmt_bb4[i0] -> MemRef_tmp_0[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NOT: Access ; CHECK-NEXT: [N] -> { Stmt_bb4[i0] -> MemRef_tmp_0__phi[] };
; CHECK: ReadAccess := [Reduction Type: NONE] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_bb4[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: [N] -> { Stmt_bb4[i0] -> MemRef_tmp_0[] };
; CHECK-NOT: Access ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: } ; CHECK-NEXT: [N] -> { Stmt_bb4[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(float* %A, i32 %N) { define void @f(float* %A, i32 %N) {

122
polly/test/ScopInfo/phi_scalar_simple_1.ll
View File

@ -4,16 +4,79 @@
; increments already guarantee that there is no wrap in the loop trip ; increments already guarantee that there is no wrap in the loop trip
; count. ; count.
; ;
; CHECK: Assumed Context:
; CHECK-NEXT: [N] -> { : }
;
; int jd(int *restrict A, int x, int N) { ; int jd(int *restrict A, int x, int N) {
; for (int i = 1; i < N; i++) ; for (int i = 1; i < N; i++)
; for (int j = 3; j < N; j++) ; for (int j = 3; j < N; j++)
; x += A[i]; ; x += A[i];
; return x; ; return x;
; } ; }
; CHECK: Assumed Context:
; CHECK-NEXT: [N] -> { : }
; ;
; CHECK: Statements {
; CHECK-NEXT: Stmt_for_cond
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_for_cond[i0] : N >= 2 and i0 >= 0 and i0 <= -1 + N; Stmt_for_cond[0] : N <= 1 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_cond[i0] -> [i0, 0, 0, 0] : N >= 2 and i0 <= -1 + N; Stmt_for_cond[0] -> [0, 0, 0, 0] : N <= 1 };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0__phi[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
; CHECK-NEXT: Stmt_for_body
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] : i0 <= -2 + N and i0 >= 0 and N >= 2 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] -> [i0, 1, 0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] -> MemRef_x_addr_0[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] -> MemRef_x_addr_1__phi[] };
; CHECK-NEXT: Stmt_for_cond1
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_for_cond1[i0, i1] : i0 >= 0 and i0 <= -2 + N and i1 >= 0 and i1 <= -3 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_cond1[i0, i1] -> [i0, 2, i1, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1__phi[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1_lcssa__phi[] };
; CHECK-NEXT: Stmt_for_inc
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_for_inc[i0, i1] : i0 >= 0 and i0 <= -2 + N and i1 >= 0 and i1 <= -4 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_inc[i0, i1] -> [i0, 2, i1, 1] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_inc[i0, i1] -> MemRef_A[1 + i0] };
; CHECK-NEXT: Stmt_for_end
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_for_end[i0] : N >= 3 and i0 >= 0 and i0 <= -2 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_end[i0] -> [i0, 3, 0, 0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_end[i0] -> MemRef_x_addr_1_lcssa[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_end[i0] -> MemRef_x_addr_1_lcssa__phi[] };
; CHECK-NEXT: Stmt_for_inc4
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_for_inc4[i0] : N >= 3 and i0 >= 0 and i0 <= -2 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_inc4[i0] -> [i0, 4, 0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_inc4[i0] -> MemRef_x_addr_1_lcssa[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_inc4[i0] -> MemRef_x_addr_0__phi[] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define i32 @jd(i32* noalias %A, i32 %x, i32 %N) { define i32 @jd(i32* noalias %A, i32 %x, i32 %N) {
@ -22,42 +85,15 @@ entry:
br label %for.cond br label %for.cond
for.cond: ; preds = %for.inc4, %entry for.cond: ; preds = %for.inc4, %entry
; CHECK-LABEL: Stmt_for_cond
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0__phi[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
; CHECK-NOT: Access
%indvars.iv = phi i64 [ %indvars.iv.next, %for.inc4 ], [ 1, %entry ] %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc4 ], [ 1, %entry ]
%x.addr.0 = phi i32 [ %x, %entry ], [ %x.addr.1.lcssa, %for.inc4 ] %x.addr.0 = phi i32 [ %x, %entry ], [ %x.addr.1.lcssa, %for.inc4 ]
%cmp = icmp slt i64 %indvars.iv, %tmp %cmp = icmp slt i64 %indvars.iv, %tmp
br i1 %cmp, label %for.body, label %for.end6 br i1 %cmp, label %for.body, label %for.end6
for.body: ; preds = %for.cond for.body: ; preds = %for.cond
; CHECK-LABEL: Stmt_for_body
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_body[i0] -> MemRef_x_addr_0[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_body[i0] -> MemRef_x_addr_1__phi[] };
; CHECK-NOT: Access
br label %for.cond1 br label %for.cond1
for.cond1: ; preds = %for.inc, %for.body for.cond1: ; preds = %for.inc, %for.body
; CHECK-LABEL: Stmt_for_cond1
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1__phi[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1_lcssa__phi[] };
; CHECK-NOT: Access
%x.addr.1 = phi i32 [ %x.addr.0, %for.body ], [ %add, %for.inc ] %x.addr.1 = phi i32 [ %x.addr.0, %for.body ], [ %add, %for.inc ]
%j.0 = phi i32 [ 3, %for.body ], [ %inc, %for.inc ] %j.0 = phi i32 [ 3, %for.body ], [ %inc, %for.inc ]
%exitcond = icmp ne i32 %j.0, %N %exitcond = icmp ne i32 %j.0, %N
@ -67,16 +103,6 @@ for.body3: ; preds = %for.cond1
br label %for.inc br label %for.inc
for.inc: ; preds = %for.body3 for.inc: ; preds = %for.body3
; CHECK-LABEL: Stmt_for_inc
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1__phi[] };
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [N] -> { Stmt_for_inc[i0, i1] -> MemRef_A[1 + i0] };
; CHECK-NOT: Access
%arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
%tmp1 = load i32, i32* %arrayidx, align 4 %tmp1 = load i32, i32* %arrayidx, align 4
%add = add nsw i32 %x.addr.1, %tmp1 %add = add nsw i32 %x.addr.1, %tmp1
@ -84,26 +110,10 @@ for.inc: ; preds = %for.body3
br label %for.cond1 br label %for.cond1
for.end: ; preds = %for.cond1 for.end: ; preds = %for.cond1
; CHECK-LABEL: Stmt_for_end
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_end[i0] -> MemRef_x_addr_1_lcssa[] };
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_end[i0] -> MemRef_x_addr_1_lcssa__phi[] };
; CHECK-NOT: Access
%x.addr.1.lcssa = phi i32 [ %x.addr.1, %for.cond1 ] %x.addr.1.lcssa = phi i32 [ %x.addr.1, %for.cond1 ]
br label %for.inc4 br label %for.inc4
for.inc4: ; preds = %for.end for.inc4: ; preds = %for.end
; CHECK-LABEL: Stmt_for_inc4
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_inc4[i0] -> MemRef_x_addr_1_lcssa[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N] -> { Stmt_for_inc4[i0] -> MemRef_x_addr_0__phi[] };
; CHECK-NOT: Access
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
br label %for.cond br label %for.cond

160
polly/test/ScopInfo/phi_scalar_simple_2.ll
View File

@ -7,7 +7,92 @@
; x += A[i]; ; x += A[i];
; return x; ; return x;
; } ; }
;
; CHECK: Statements {
; CHECK-NEXT: Stmt_for_cond
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N, c] -> { Stmt_for_cond[i0] : i0 >= 0 and i0 <= N; Stmt_for_cond[0] : N <= -1 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N, c] -> { Stmt_for_cond[i0] -> [i0, 0, 0, 0] : i0 <= N; Stmt_for_cond[0] -> [0, 0, 0, 0] : N <= -1 };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0__phi[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N, c] -> { Stmt_for_cond[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
; CHECK-NEXT: Stmt_for_body
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N, c] -> { Stmt_for_body[i0] : i0 <= -1 + N and i0 >= 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N, c] -> { Stmt_for_body[i0] -> [i0, 1, 0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_body[i0] -> MemRef_x_addr_0[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_body[i0] -> MemRef_x_addr_1__phi[] };
; CHECK-NEXT: Stmt_for_cond1
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N, c] -> { Stmt_for_cond1[i0, i1] : i0 >= 0 and i0 <= -1 + N and i1 >= 0 and i1 <= N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N, c] -> { Stmt_for_cond1[i0, i1] -> [i0, 2, i1, 0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1__phi[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NEXT: Stmt_for_body3
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N, c] -> { Stmt_for_body3[i0, i1] : i0 >= 0 and i0 <= -1 + N and i1 >= 0 and i1 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N, c] -> { Stmt_for_body3[i0, i1] -> [i0, 2, i1, 1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_body3[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_body3[i0, i1] -> MemRef_x_addr_2__phi[] };
; CHECK-NEXT: Stmt_if_then
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N, c] -> { Stmt_if_then[i0, i1] : i0 >= 0 and i0 <= -1 + c and i0 <= -1 + N and i1 >= 0 and i1 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N, c] -> { Stmt_if_then[i0, i1] -> [i0, 2, i1, 2] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_x_addr_2__phi[] };
; CHECK-NEXT: Stmt_if_end
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N, c] -> { Stmt_if_end[i0, i1] : i0 >= 0 and i0 <= -1 + N and i1 >= 0 and i1 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N, c] -> { Stmt_if_end[i0, i1] -> [i0, 2, i1, 3] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_if_end[i0, i1] -> MemRef_x_addr_2[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_if_end[i0, i1] -> MemRef_x_addr_2__phi[] };
; CHECK-NEXT: Stmt_for_inc
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N, c] -> { Stmt_for_inc[i0, i1] : i0 >= 0 and i0 <= -1 + N and i1 >= 0 and i1 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N, c] -> { Stmt_for_inc[i0, i1] -> [i0, 2, i1, 4] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_2[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1__phi[] };
; CHECK-NEXT: Stmt_for_inc5
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N, c] -> { Stmt_for_inc5[i0] : i0 >= 0 and i0 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N, c] -> { Stmt_for_inc5[i0] -> [i0, 3, 0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_inc5[i0] -> MemRef_x_addr_1[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N, c] -> { Stmt_for_inc5[i0] -> MemRef_x_addr_0__phi[] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define i32 @jd(i32* noalias %A, i32 %x, i32 %N, i32 %c) { define i32 @jd(i32* noalias %A, i32 %x, i32 %N, i32 %c) {
@ -17,20 +102,6 @@ entry:
br label %for.cond br label %for.cond
for.cond: ; preds = %for.inc5, %entry for.cond: ; preds = %for.inc5, %entry
; CHECK-LABEL: Stmt_for_cond
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0__phi[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [N, c] -> { Stmt_for_cond[i0] -> MemRef_A[i0] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
; CHECK-NOT: Access
%indvars.iv = phi i64 [ %indvars.iv.next, %for.inc5 ], [ 0, %entry ] %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc5 ], [ 0, %entry ]
%x.addr.0 = phi i32 [ %x, %entry ], [ %x.addr.1, %for.inc5 ] %x.addr.0 = phi i32 [ %x, %entry ], [ %x.addr.1, %for.inc5 ]
%arrayidx2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv %arrayidx2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
@ -39,83 +110,29 @@ for.cond: ; preds = %for.inc5, %entry
br i1 %cmp, label %for.body, label %for.end7 br i1 %cmp, label %for.body, label %for.end7
for.body: ; preds = %for.cond for.body: ; preds = %for.cond
; CHECK-LABEL: Stmt_for_body
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_body[i0] -> MemRef_x_addr_0[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_body[i0] -> MemRef_x_addr_1__phi[] };
; CHECK-NOT: Access
br label %for.cond1 br label %for.cond1
for.cond1: ; preds = %for.inc, %for.body for.cond1: ; preds = %for.inc, %for.body
; CHECK-LABEL: Stmt_for_cond1
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1__phi[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NOT: Access
%x.addr.1 = phi i32 [ %x.addr.0, %for.body ], [ %x.addr.2, %for.inc ] %x.addr.1 = phi i32 [ %x.addr.0, %for.body ], [ %x.addr.2, %for.inc ]
%j.0 = phi i32 [ 0, %for.body ], [ %inc, %for.inc ] %j.0 = phi i32 [ 0, %for.body ], [ %inc, %for.inc ]
%exitcond = icmp ne i32 %j.0, %N %exitcond = icmp ne i32 %j.0, %N
br i1 %exitcond, label %for.body3, label %for.end br i1 %exitcond, label %for.body3, label %for.end
for.body3: ; preds = %for.cond1 for.body3: ; preds = %for.cond1
; CHECK-LABEL: Stmt_for_body3
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_body3[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_body3[i0, i1] -> MemRef_x_addr_2__phi[] };
; CHECK-NOT: Access
%cmp4 = icmp slt i64 %indvars.iv, %tmp1 %cmp4 = icmp slt i64 %indvars.iv, %tmp1
br i1 %cmp4, label %if.then, label %if.end br i1 %cmp4, label %if.then, label %if.end
if.then: ; preds = %for.body3 if.then: ; preds = %for.body3
; CHECK-LABEL: Stmt_if_then
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_x_addr_1[] };
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_A[i0] };
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_x_addr_2__phi[] };
; CHECK-NOT: Access
%arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
%tmp2 = load i32, i32* %arrayidx, align 4 %tmp2 = load i32, i32* %arrayidx, align 4
%add = add nsw i32 %x.addr.1, %tmp2 %add = add nsw i32 %x.addr.1, %tmp2
br label %if.end br label %if.end
if.end: ; preds = %if.then, %for.body3 if.end: ; preds = %if.then, %for.body3
; CHECK-LABEL: Stmt_if_end
; CHECK-NOT: Access
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_if_end[i0, i1] -> MemRef_x_addr_2[] };
; CHECK-NOT: Access
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_if_end[i0, i1] -> MemRef_x_addr_2__phi[] };
; CHECK-NOT: Access
%x.addr.2 = phi i32 [ %add, %if.then ], [ %x.addr.1, %for.body3 ] %x.addr.2 = phi i32 [ %add, %if.then ], [ %x.addr.1, %for.body3 ]
br label %for.inc br label %for.inc
for.inc: ; preds = %if.end for.inc: ; preds = %if.end
; CHECK-LABEL: Stmt_for_inc
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_2[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1__phi[] };
%inc = add nsw i32 %j.0, 1 %inc = add nsw i32 %j.0, 1
br label %for.cond1 br label %for.cond1
@ -123,11 +140,6 @@ for.end: ; preds = %for.cond1
br label %for.inc5 br label %for.inc5
for.inc5: ; preds = %for.end for.inc5: ; preds = %for.end
; CHECK-LABEL: Stmt_for_inc5
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_inc5[i0] -> MemRef_x_addr_1[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [N, c] -> { Stmt_for_inc5[i0] -> MemRef_x_addr_0__phi[] };
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
br label %for.cond br label %for.cond

98
polly/test/ScopInfo/pointer-used-as-base-pointer-and-scalar-read.ll
View File

@ -4,55 +4,55 @@
; pointer as base pointer of an array store. As a result, we get both scalar ; pointer as base pointer of an array store. As a result, we get both scalar
; and array memory accesses to A[] and A[0]. ; and array memory accesses to A[] and A[0].
; CHECK: Arrays { ; CHECK: Arrays {
; CHECK: float MemRef_A[*]; // Element size 4 ; CHECK-NEXT: float MemRef_A[*]; // Element size 4
; CHECK: float* MemRef_A; // Element size 8 ; CHECK-NEXT: float* MemRef_A; // Element size 8
; CHECK: float* MemRef_x__phi; // Element size 8 ; CHECK-NEXT: float* MemRef_x__phi; // Element size 8
; CHECK: float* MemRef_B; // Element size 8 ; CHECK-NEXT: float* MemRef_B; // Element size 8
; CHECK: float* MemRef_C[*]; // Element size 8 ; CHECK-NEXT: float* MemRef_C[*]; // Element size 8
; CHECK: } ; CHECK-NEXT: }
; CHECK: Arrays (Bounds as pw_affs) { ; CHECK: Arrays (Bounds as pw_affs) {
; CHECK: float MemRef_A[*]; // Element size 4 ; CHECK-NEXT: float MemRef_A[*]; // Element size 4
; CHECK: float* MemRef_A; // Element size 8 ; CHECK-NEXT: float* MemRef_A; // Element size 8
; CHECK: float* MemRef_x__phi; // Element size 8 ; CHECK-NEXT: float* MemRef_x__phi; // Element size 8
; CHECK: float* MemRef_B; // Element size 8 ; CHECK-NEXT: float* MemRef_B; // Element size 8
; CHECK: float* MemRef_C[*]; // Element size 8 ; CHECK-NEXT: float* MemRef_C[*]; // Element size 8
; CHECK: } ; CHECK-NEXT: }
; CHECK: Alias Groups (0): ; CHECK: Alias Groups (0):
; CHECK: n/a ; CHECK-NEXT: n/a
; CHECK: Statements { ; CHECK: Statements {
; CHECK: Stmt_then ; CHECK-NEXT: Stmt_then
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: [p] -> { Stmt_then[i0] : p = 32 and i0 <= 999 and i0 >= 0 }; ; CHECK-NEXT: [p] -> { Stmt_then[i0] : p = 32 and i0 <= 999 and i0 >= 0 };
; CHECK: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK: [p] -> { Stmt_then[i0] -> [i0, 1] }; ; CHECK-NEXT: [p] -> { Stmt_then[i0] -> [i0, 1] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [p] -> { Stmt_then[i0] -> MemRef_A[0] }; ; CHECK-NEXT: [p] -> { Stmt_then[i0] -> MemRef_A[0] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [p] -> { Stmt_then[i0] -> MemRef_A[] }; ; CHECK-NEXT: [p] -> { Stmt_then[i0] -> MemRef_A[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [p] -> { Stmt_then[i0] -> MemRef_x__phi[] }; ; CHECK-NEXT: [p] -> { Stmt_then[i0] -> MemRef_x__phi[] };
; CHECK: Stmt_else ; CHECK-NEXT: Stmt_else
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: [p] -> { Stmt_else[i0] : (p >= 33 and i0 <= 999 and i0 >= 0) or (p <= 31 and i0 <= 999 and i0 >= 0) }; ; CHECK-NEXT: [p] -> { Stmt_else[i0] : (p >= 33 and i0 <= 999 and i0 >= 0) or (p <= 31 and i0 <= 999 and i0 >= 0) };
; CHECK: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK: [p] -> { Stmt_else[i0] -> [i0, 0] : p >= 33 or p <= 31 }; ; CHECK-NEXT: [p] -> { Stmt_else[i0] -> [i0, 0] : p >= 33 or p <= 31 };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [p] -> { Stmt_else[i0] -> MemRef_A[0] }; ; CHECK-NEXT: [p] -> { Stmt_else[i0] -> MemRef_A[0] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [p] -> { Stmt_else[i0] -> MemRef_B[] }; ; CHECK-NEXT: [p] -> { Stmt_else[i0] -> MemRef_B[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [p] -> { Stmt_else[i0] -> MemRef_x__phi[] }; ; CHECK-NEXT: [p] -> { Stmt_else[i0] -> MemRef_x__phi[] };
; CHECK: Stmt_bb8 ; CHECK-NEXT: Stmt_bb8
; CHECK: Domain := ; CHECK-NEXT: Domain :=
; CHECK: [p] -> { Stmt_bb8[i0] : (p >= 33 and i0 <= 999 and i0 >= 0) or (p <= 32 and i0 <= 999 and i0 >= 0) }; ; CHECK-NEXT: [p] -> { Stmt_bb8[i0] : (p >= 33 and i0 <= 999 and i0 >= 0) or (p <= 32 and i0 <= 999 and i0 >= 0) };
; CHECK: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK: [p] -> { Stmt_bb8[i0] -> [i0, 2] }; ; CHECK-NEXT: [p] -> { Stmt_bb8[i0] -> [i0, 2] };
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: [p] -> { Stmt_bb8[i0] -> MemRef_x__phi[] }; ; CHECK-NEXT: [p] -> { Stmt_bb8[i0] -> MemRef_x__phi[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [p] -> { Stmt_bb8[i0] -> MemRef_C[0] }; ; CHECK-NEXT: [p] -> { Stmt_bb8[i0] -> MemRef_C[0] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

46
polly/test/ScopInfo/read-only-scalar-used-in-phi.ll
View File

@ -9,26 +9,32 @@
; return sum; ; return sum;
; } ; }
; CHECK: Stmt_next ; CHECK: Statements {
; CHECK: Domain := ; CHECK-NEXT: Stmt_next
; CHECK: { Stmt_next[] }; ; CHECK-NEXT: Domain :=
; CHECK: Schedule := ; CHECK-NEXT: { Stmt_next[] };
; CHECK: { Stmt_next[] -> [0, 0] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_next[] -> [0, 0] };
; CHECK: { Stmt_next[] -> MemRef_sum[] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_next[] -> MemRef_sum[] };
; CHECK: { Stmt_next[] -> MemRef_phisum__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: Stmt_bb1 ; CHECK-NEXT: { Stmt_next[] -> MemRef_phisum__phi[] };
; CHECK: Domain := ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: { Stmt_bb1[i0] : i0 <= 100 and i0 >= 0 }; ; CHECK-NEXT: { Stmt_next[] -> MemRef_phisummerge[] };
; CHECK: Schedule := ; CHECK-NEXT: Stmt_bb1
; CHECK: { Stmt_bb1[i0] -> [1, i0] }; ; CHECK-NEXT: Domain :=
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb1[i0] : i0 <= 100 and i0 >= 0 };
; CHECK: { Stmt_bb1[i0] -> MemRef_phisum__phi[] }; ; CHECK-NEXT: Schedule :=
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] ; CHECK-NEXT: { Stmt_bb1[i0] -> [1, i0] };
; CHECK: { Stmt_bb1[i0] -> MemRef_phisum__phi[] }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] ; CHECK-NEXT: { Stmt_bb1[i0] -> MemRef_phisum__phi[] };
; CHECK: { Stmt_bb1[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_bb1[i0] -> MemRef_phisum__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb1[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_bb1[i0] -> MemRef_phisummerge[] };
; CHECK-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

22
polly/test/ScopInfo/read-only-statements.ll
View File

@ -2,17 +2,17 @@
; ;
; Check we remove read only statements. ; Check we remove read only statements.
; ;
; CHECK: Statements { ; CHECK: Statements {
; CHECK-NEXT: Stmt_for_body_2 ; CHECK-NEXT: Stmt_for_body_2
; CHECK-NEXT: Domain := ; CHECK-NEXT: Domain :=
; CHECK-NEXT: { Stmt_for_body_2[i0] : i0 <= 99 and i0 >= 0 }; ; CHECK-NEXT: { Stmt_for_body_2[i0] : i0 <= 99 and i0 >= 0 };
; CHECK-NEXT: Schedule := ; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_for_body_2[i0] -> [i0] }; ; CHECK-NEXT: { Stmt_for_body_2[i0] -> [i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0] ; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: { Stmt_for_body_2[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: { Stmt_for_body_2[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0] ; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: { Stmt_for_body_2[i0] -> MemRef_A[i0] }; ; CHECK-NEXT: { Stmt_for_body_2[i0] -> MemRef_A[i0] };
; CHECK-NEXT: } ; CHECK-NEXT: }
; ;
; int g(int); ; int g(int);
; void f(int *A) { ; void f(int *A) {

12
polly/test/ScopInfo/remarks.ll
View File

@ -1,16 +1,16 @@
; RUN: opt %loadPolly -pass-remarks-analysis="polly-scops" -polly-scops < %s 2>&1| FileCheck %s ; RUN: opt %loadPolly -pass-remarks-analysis="polly-scops" -polly-scops -disable-output < %s 2>&1 | FileCheck %s
; ;
; CHECK: remark: test/ScopInfo/remarks.c:4:7: SCoP begins here. ; CHECK: remark: test/ScopInfo/remarks.c:4:7: SCoP begins here.
; CHECK: remark: test/ScopInfo/remarks.c:8:5: Finite loop assumption: [M, N, Debug] -> { : M >= 0 or (M <= -2 and N <= 0) or (M = -1 and N <= 0) } ; CHECK: remark: test/ScopInfo/remarks.c:8:5: Finite loop assumption: [M, N, Debug] -> { : M >= 0 or (M <= -2 and N <= 0) or (M = -1 and N <= 0) }
; CHECK: remark: test/ScopInfo/remarks.c:13:7: No-error assumption: [M, N, Debug] -> { : M <= -1 or (M >= 0 and N <= 0) or (Debug = 0 and M >= 0 and N >= 1) } ; CHECK: remark: test/ScopInfo/remarks.c:13:7: No-error assumption: [M, N, Debug] -> { : M <= -1 or (M >= 0 and N <= 0) or (Debug = 0 and M >= 0 and N >= 1) }
; CHECK: remark: test/ScopInfo/remarks.c:9:7: Inbounds assumption: [M, N, Debug] -> { : M <= 100 or (M >= 1 and N <= 0) } ; CHECK: remark: test/ScopInfo/remarks.c:9:7: Inbounds assumption: [M, N, Debug] -> { : M <= 100 or (M >= 1 and N <= 0) }
; CHECK: remark: <unknown>:0:0: No-overflows assumption: [N, M, Debug] -> { : M <= 2147483647 - N and M >= -2147483648 - N } ; CHECK: remark: <unknown>:0:0: No-overflows assumption: [N, M, Debug] -> { : M <= 2147483647 - N and M >= -2147483648 - N }
; CHECK: remark: test/ScopInfo/remarks.c:9:18: Possibly aliasing pointer, use restrict keyword. ; CHECK: remark: test/ScopInfo/remarks.c:9:18: Possibly aliasing pointer, use restrict keyword.
; CHECK: remark: test/ScopInfo/remarks.c:9:33: Possibly aliasing pointer, use restrict keyword. ; CHECK: remark: test/ScopInfo/remarks.c:9:33: Possibly aliasing pointer, use restrict keyword.
; CHECK: remark: test/ScopInfo/remarks.c:9:15: Possibly aliasing pointer, use restrict keyword. ; CHECK: remark: test/ScopInfo/remarks.c:9:15: Possibly aliasing pointer, use restrict keyword.
; CHECK: remark: test/ScopInfo/remarks.c:14:3: SCoP ends here. ; CHECK: remark: test/ScopInfo/remarks.c:14:3: SCoP ends here.
; CHECK: remark: test/ScopInfo/remarks.c:19:3: SCoP begins here. ; CHECK: remark: test/ScopInfo/remarks.c:19:3: SCoP begins here.
; CHECK: remark: test/ScopInfo/remarks.c:21:11: Invariant load assumption: [tmp] -> { : 1 = 0 } ; CHECK: remark: test/ScopInfo/remarks.c:21:11: Invariant load assumption: [tmp] -> { : 1 = 0 }
; CHECK: remark: test/ScopInfo/remarks.c:22:16: SCoP ends here but was dismissed. ; CHECK: remark: test/ScopInfo/remarks.c:22:16: SCoP ends here but was dismissed.
; ;
; #include <stdio.h> ; #include <stdio.h>

57
polly/test/ScopInfo/scalar.ll
View File

@ -29,31 +29,34 @@ return:
ret void ret void
} }
; CHECK: Arrays {
; CHECK: i64 MemRef_a[*];
; CHECK: i64 MemRef_val; [BasePtrOrigin: MemRef_a]
; CHECK: }
;
; CHECK: Arrays (Bounds as pw_affs) {
; CHECK: i64 MemRef_a[*];
; CHECK: i64 MemRef_val; [BasePtrOrigin: MemRef_a]
; CHECK: }
; CHECK: Stmt_S1 ; CHECK: Arrays {
; CHECK: Domain := ; CHECK-NEXT: i64 MemRef_a[*]; // Element size 8
; CHECK: [N] -> { Stmt_S1[i0] : i0 >= 0 and i0 <= -1 + N }; ; CHECK-NEXT: i64 MemRef_val; [BasePtrOrigin: MemRef_a] // Element size 8
; CHECK: Schedule := ; CHECK-NEXT: }
; CHECK: [N] -> { Stmt_S1[i0] -> [i0, 0] }; ;
; CHECK: ReadAccess := ; CHECK: Arrays (Bounds as pw_affs) {
; CHECK: [N] -> { Stmt_S1[i0] -> MemRef_a[i0] }; ; CHECK-NEXT: i64 MemRef_a[*]; // Element size 8
; CHECK: MustWriteAccess := ; CHECK-NEXT: i64 MemRef_val; [BasePtrOrigin: MemRef_a] // Element size 8
; CHECK: [N] -> { Stmt_S1[i0] -> MemRef_val[] }; ; CHECK-NEXT: }
; CHECK: Stmt_S2 ;
; CHECK: Domain := ; CHECK: Statements {
; CHECK: [N] -> { Stmt_S2[i0] : i0 >= 0 and i0 <= -1 + N }; ; CHECK-NEXT: Stmt_S1
; CHECK: Schedule := ; CHECK-NEXT: Domain :=
; CHECK: [N] -> { Stmt_S2[i0] -> [i0, 1] }; ; CHECK-NEXT: [N] -> { Stmt_S1[i0] : i0 >= 0 and i0 <= -1 + N };
; CHECK: ReadAccess := ; CHECK-NEXT: Schedule :=
; CHECK: [N] -> { Stmt_S2[i0] -> MemRef_val[] }; ; CHECK-NEXT: [N] -> { Stmt_S1[i0] -> [i0, 0] };
; CHECK: MustWriteAccess := ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [N] -> { Stmt_S2[i0] -> MemRef_a[i0] }; ; CHECK-NEXT: [N] -> { Stmt_S1[i0] -> MemRef_a[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_S1[i0] -> MemRef_val[] };
; CHECK-NEXT: Stmt_S2
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_S2[i0] : i0 >= 0 and i0 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_S2[i0] -> [i0, 1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_S2[i0] -> MemRef_val[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_S2[i0] -> MemRef_a[i0] };
; CHECK-NEXT: }

28
polly/test/ScopInfo/simple_loop_1.ll
View File

@ -24,16 +24,20 @@ return: ; preds = %bb, %entry
ret void ret void
} }
; CHECK: Assumed Context:
; CHECK: { : }
; CHECK: Arrays {
; CHECK: i64 MemRef_a[*]; // Element size 8
; CHECK: }
; CHECK: Stmt_bb ; CHECK: Assumed Context:
; CHECK: Domain := ; CHECK-NEXT: [N] -> { : }
; CHECK: [N] -> { Stmt_bb[i0] : i0 >= 0 and i0 <= -1 + N }; ;
; CHECK: Schedule := ; CHECK: Arrays {
; CHECK: [N] -> { Stmt_bb[i0] -> [i0] }; ; CHECK-NEXT: i64 MemRef_a[*]; // Element size 8
; CHECK: MustWriteAccess := [Reduction Type: NONE] ; CHECK-NEXT: }
; CHECK: [N] -> { Stmt_bb[i0] -> MemRef_a[i0] }; ;
; CHECK: Statements {
; CHECK-NEXT: Stmt_bb
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_bb[i0] : i0 >= 0 and i0 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_bb[i0] -> [i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_bb[i0] -> MemRef_a[i0] };
; CHECK-NEXT: }

82
polly/test/ScopInfo/switch-1.ll
View File

@ -17,42 +17,56 @@
; break; ; break;
; } ; }
; } ; }
; CHECK: Statements {
; CHECK-NEXT: Stmt_sw_bb_1
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] : exists (e0 = floor((-1 + i0)/4): 4e0 = -1 + i0 and i0 >= 1 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_sw_bb_2
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_2[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_2[i0] -> [i0, 1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_2[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_2[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_sw_bb_6
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_6[i0] : exists (e0 = floor((-3 + i0)/4): 4e0 = -3 + i0 and i0 >= 0 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_6[i0] -> [i0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_6[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_6[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
; AST: if (1)
; ;
; CHECK: Statements { ; AST: {
; CHECK: Stmt_sw_bb_1 ; AST-NEXT: for (int c0 = 1; c0 < N - 2; c0 += 4) {
; CHECK: Domain := ; AST-NEXT: Stmt_sw_bb_1(c0);
; CHECK: [N] -> { Stmt_sw_bb_1[i0] : exists (e0 = floor((-1 + i0)/4): 4e0 = -1 + i0 and i0 >= 1 and i0 <= -1 + N) }; ; AST-NEXT: Stmt_sw_bb_2(c0 + 1);
; CHECK: Schedule := ; AST-NEXT: Stmt_sw_bb_6(c0 + 2);
; CHECK: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] }; ; AST-NEXT: }
; CHECK: Stmt_sw_bb_2 ; AST-NEXT: if (N >= 2)
; CHECK: Domain := ; AST-NEXT: if (N % 4 >= 2) {
; CHECK: [N] -> { Stmt_sw_bb_2[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) }; ; AST-NEXT: Stmt_sw_bb_1(-(N % 4) + N + 1);
; CHECK: Schedule := ; AST-NEXT: if ((N - 3) % 4 == 0)
; CHECK: [N] -> { Stmt_sw_bb_2[i0] -> [i0, 1] }; ; AST-NEXT: Stmt_sw_bb_2(N - 1);
; CHECK: Stmt_sw_bb_6 ; AST-NEXT: }
; CHECK: Domain := ; AST-NEXT: }
; CHECK: [N] -> { Stmt_sw_bb_6[i0] : exists (e0 = floor((-3 + i0)/4): 4e0 = -3 + i0 and i0 >= 0 and i0 <= -1 + N) };
; CHECK: Schedule :=
; CHECK: [N] -> { Stmt_sw_bb_6[i0] -> [i0, 0] };
; CHECK: }
;
;
; AST: if (1)
;
; AST: {
; AST: for (int c0 = 1; c0 < N - 2; c0 += 4) {
; AST: Stmt_sw_bb_1(c0);
; AST: Stmt_sw_bb_2(c0 + 1);
; AST: Stmt_sw_bb_6(c0 + 2);
; AST: }
; AST: if (N >= 2)
; AST: if (N % 4 >= 2) {
; AST: Stmt_sw_bb_1(-(N % 4) + N + 1);
; AST: if ((N - 3) % 4 == 0)
; AST: Stmt_sw_bb_2(N - 1);
; AST: }
; AST: }
; ;
; AST: else
; AST-NEXT: { /* original code */ }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %N) { define void @f(i32* %A, i32 %N) {

57
polly/test/ScopInfo/switch-2.ll
View File

@ -16,34 +16,39 @@
; break; ; break;
; } ; }
; } ; }
; CHECK: Statements {
; CHECK-NEXT: Stmt_sw_bb
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] : exists (e0 = floor((i0)/4): 4e0 = i0 and i0 >= 0 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> [i0, 1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_sw_bb_2
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_2[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_2[i0] -> [i0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_2[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_2[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
; AST: if (1)
; ;
; CHECK: Statements { ; AST: for (int c0 = 0; c0 < N; c0 += 4) {
; CHECK-NOT: Stmt_sw_bb1 ; AST-NEXT: Stmt_sw_bb(c0);
; CHECK: Stmt_sw_bb ; AST-NEXT: if (N >= c0 + 3)
; CHECK: Domain := ; AST-NEXT: Stmt_sw_bb_2(c0 + 2);
; CHECK: [N] -> { Stmt_sw_bb[i0] : exists (e0 = floor((i0)/4): 4e0 = i0 and i0 >= 0 and i0 <= -1 + N) }; ; AST-NEXT: }
; CHECK: Schedule :=
; CHECK: [N] -> { Stmt_sw_bb[i0] -> [i0, 1] };
; CHECK-NOT: Stmt_sw_bb1
; CHECK: Stmt_sw_bb_2
; CHECK: Domain :=
; CHECK: [N] -> { Stmt_sw_bb_2[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) };
; CHECK: Schedule :=
; CHECK: [N] -> { Stmt_sw_bb_2[i0] -> [i0, 0] };
; CHECK-NOT: Stmt_sw_bb1
; CHECK: }
;
; AST: if (1)
;
; AST: for (int c0 = 0; c0 < N; c0 += 4) {
; AST: Stmt_sw_bb(c0);
; AST: if (N >= c0 + 3)
; AST: Stmt_sw_bb_2(c0 + 2);
; AST: }
;
; AST: else
; AST: { /* original code */ }
; ;
; AST: else
; AST-NEXT: { /* original code */ }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %N) { define void @f(i32* %A, i32 %N) {

94
polly/test/ScopInfo/switch-3.ll
View File

@ -16,47 +16,63 @@
; break; ; break;
; } ; }
; } ; }
; CHECK: Statements {
; CHECK-NEXT: Stmt_sw_bb
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] : exists (e0 = floor((i0)/4): 4e0 = i0 and i0 >= 0 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> [i0, 2] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_sw_bb_1
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] : exists (e0 = floor((2 + i0)/4): i0 >= 0 and i0 <= -1 + N and 4e0 >= -1 + i0 and 4e0 <= i0) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 3] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_sw_bb_5
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> [i0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_sw_bb_9
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] : exists (e0 = floor((i0)/4): i0 >= 0 and i0 <= -1 + N and 4e0 >= -3 + i0 and 4e0 <= -2 + i0) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> [i0, 1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
; AST: if (1)
; ;
; CHECK: Statements { ; AST: for (int c0 = 0; c0 < N; c0 += 1) {
; CHECK: Stmt_sw_bb ; AST-NEXT: if ((c0 - 2) % 4 == 0)
; CHECK: Domain := ; AST-NEXT: Stmt_sw_bb_5(c0);
; CHECK: [N] -> { Stmt_sw_bb[i0] : exists (e0 = floor((i0)/4): 4e0 = i0 and i0 >= 0 and i0 <= -1 + N) }; ; AST-NEXT: if (c0 % 4 >= 2) {
; CHECK: Schedule := ; AST-NEXT: Stmt_sw_bb_9(c0);
; CHECK: [N] -> { Stmt_sw_bb[i0] -> [i0, 2] }; ; AST-NEXT: } else {
; CHECK: Stmt_sw_bb_1 ; AST-NEXT: if (c0 % 4 == 0)
; CHECK: Domain := ; AST-NEXT: Stmt_sw_bb(c0);
; CHECK: [N] -> { Stmt_sw_bb_1[i0] : exists (e0 = floor((2 + i0)/4): i0 >= 0 and i0 <= -1 + N and 4e0 >= -1 + i0 and 4e0 <= i0) }; ; AST-NEXT: Stmt_sw_bb_1(c0);
; CHECK: Schedule := ; AST-NEXT: }
; CHECK: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 3] }; ; AST-NEXT: }
; CHECK: Stmt_sw_bb_5
; CHECK: Domain :=
; CHECK: [N] -> { Stmt_sw_bb_5[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) };
; CHECK: Schedule :=
; CHECK: [N] -> { Stmt_sw_bb_5[i0] -> [i0, 0] };
; CHECK: Stmt_sw_bb_9
; CHECK: Domain :=
; CHECK: [N] -> { Stmt_sw_bb_9[i0] : exists (e0 = floor((i0)/4): i0 >= 0 and i0 <= -1 + N and 4e0 >= -3 + i0 and 4e0 <= -2 + i0) };
; CHECK: Schedule :=
; CHECK: [N] -> { Stmt_sw_bb_9[i0] -> [i0, 1] };
; CHECK: }
;
; AST: if (1)
;
; AST: for (int c0 = 0; c0 < N; c0 += 1) {
; AST: if ((c0 - 2) % 4 == 0)
; AST: Stmt_sw_bb_5(c0);
; AST: if (c0 % 4 >= 2) {
; AST: Stmt_sw_bb_9(c0);
; AST: } else {
; AST: if (c0 % 4 == 0)
; AST: Stmt_sw_bb(c0);
; AST: Stmt_sw_bb_1(c0);
; AST: }
; AST: }
;
; AST: else
; AST: { /* original code */ }
; ;
; AST: else
; AST-NEXT: { /* original code */ }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %N) { define void @f(i32* %A, i32 %N) {

107
polly/test/ScopInfo/switch-4.ll
View File

@ -20,54 +20,69 @@
; A[i - 1] += A[i + 1]; ; A[i - 1] += A[i + 1];
; } ; }
; } ; }
; CHECK: Statements {
; CHECK-NEXT: Stmt_sw_bb
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] : exists (e0 = floor((i0)/4): 4e0 = i0 and i0 >= 0 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> [i0, 3] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_sw_bb_1
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] : exists (e0 = floor((-1 + i0)/4): 4e0 = -1 + i0 and i0 >= 1 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_sw_bb_5
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> [i0, 1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_sw_bb_9
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] : exists (e0 = floor((-3 + i0)/4): 4e0 = -3 + i0 and i0 >= 0 and i0 <= -1 + N) };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> [i0, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
; AST: if (1)
; ;
; CHECK: Statements { ; AST: {
; CHECK-NOT: Stmt_sw_default ; AST-NEXT: for (int c0 = 0; c0 < N - 3; c0 += 4) {
; CHECK: Stmt_sw_bb ; AST-NEXT: Stmt_sw_bb(c0);
; CHECK: Domain := ; AST-NEXT: Stmt_sw_bb_1(c0 + 1);
; CHECK: [N] -> { Stmt_sw_bb[i0] : exists (e0 = floor((i0)/4): 4e0 = i0 and i0 >= 0 and i0 <= -1 + N) }; ; AST-NEXT: Stmt_sw_bb_5(c0 + 2);
; CHECK: Schedule := ; AST-NEXT: Stmt_sw_bb_9(c0 + 3);
; CHECK: [N] -> { Stmt_sw_bb[i0] -> [i0, 3] }; ; AST-NEXT: }
; CHECK: Stmt_sw_bb_1 ; AST-NEXT: if (N >= 1)
; CHECK: Domain := ; AST-NEXT: if (N % 4 >= 1) {
; CHECK: [N] -> { Stmt_sw_bb_1[i0] : exists (e0 = floor((-1 + i0)/4): 4e0 = -1 + i0 and i0 >= 1 and i0 <= -1 + N) }; ; AST-NEXT: Stmt_sw_bb(-((N - 1) % 4) + N - 1);
; CHECK: Schedule := ; AST-NEXT: if (N % 4 >= 2) {
; CHECK: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] }; ; AST-NEXT: Stmt_sw_bb_1(-((N - 1) % 4) + N);
; CHECK: Stmt_sw_bb_5 ; AST-NEXT: if ((N - 3) % 4 == 0)
; CHECK: Domain := ; AST-NEXT: Stmt_sw_bb_5(N - 1);
; CHECK: [N] -> { Stmt_sw_bb_5[i0] : exists (e0 = floor((-2 + i0)/4): 4e0 = -2 + i0 and i0 >= 2 and i0 <= -1 + N) }; ; AST-NEXT: }
; CHECK: Schedule := ; AST-NEXT: }
; CHECK: [N] -> { Stmt_sw_bb_5[i0] -> [i0, 1] }; ; AST-NEXT: }
; CHECK: Stmt_sw_bb_9
; CHECK: Domain :=
; CHECK: [N] -> { Stmt_sw_bb_9[i0] : exists (e0 = floor((-3 + i0)/4): 4e0 = -3 + i0 and i0 >= 0 and i0 <= -1 + N) };
; CHECK: Schedule :=
; CHECK: [N] -> { Stmt_sw_bb_9[i0] -> [i0, 0] };
; CHECK: }
;
; AST: if (1)
;
; AST: {
; AST: for (int c0 = 0; c0 < N - 3; c0 += 4) {
; AST: Stmt_sw_bb(c0);
; AST: Stmt_sw_bb_1(c0 + 1);
; AST: Stmt_sw_bb_5(c0 + 2);
; AST: Stmt_sw_bb_9(c0 + 3);
; AST: }
; AST: if (N >= 1)
; AST: if (N % 4 >= 1) {
; AST: Stmt_sw_bb(-((N - 1) % 4) + N - 1);
; AST: if (N % 4 >= 2) {
; AST: Stmt_sw_bb_1(-((N - 1) % 4) + N);
; AST: if ((N - 3) % 4 == 0)
; AST: Stmt_sw_bb_5(N - 1);
; AST: }
; AST: }
; AST: }
;
; AST: else
; AST: { /* original code */ }
; ;
; AST: else
; AST-NEXT: { /* original code */ }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %N) { define void @f(i32* %A, i32 %N) {

30
polly/test/ScopInfo/switch-5.ll
View File

@ -13,19 +13,27 @@
; } ; }
; } ; }
; } ; }
; CHECK: Statements {
; CHECK-NEXT: Stmt_for_body
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_for_body[0] : N >= 1 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] -> [0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] -> MemRef_A[0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_body[i0] -> MemRef_A[0] };
; CHECK-NEXT: }
; AST: if (1)
; ;
; CHECK: Statements { ; AST: if (N >= 1)
; CHECK: Stmt_for_body ; AST-NEXT: Stmt_for_body(0);
; CHECK: Domain :=
; CHECK: [N] -> { Stmt_for_body[0] : N >= 1 };
; CHECK: Schedule :=
; CHECK: [N] -> { Stmt_for_body[i0] -> [0] };
; CHECK-NOT: Stmt_sw_bb
; CHECK: }
;
; AST: if (N >= 1)
; AST: Stmt_for_body(0);
; ;
; AST: else
; AST-NEXT: { /* original code */ }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32* %B, i32 %N) { define void @f(i32* %A, i32* %B, i32 %N) {

87
polly/test/ScopInfo/switch-6.ll
View File

@ -20,40 +20,63 @@
; } ; }
; } ; }
; } ; }
; CHECK: Statements {
; CHECK-NEXT: Stmt_sw_bb
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb[0] : N >= 1 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> [0, 3] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[0] };
; CHECK-NEXT: Stmt_sw_bb_1
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[1] : N >= 2 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> [1, 2] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[1] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[1] };
; CHECK-NEXT: Stmt_sw_bb_5
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[2] : N >= 3 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> [2, 1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> MemRef_A[2] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> MemRef_A[2] };
; CHECK-NEXT: Stmt_sw_bb_9
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[3] : N >= 4 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> [3, 0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> MemRef_A[3] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> MemRef_A[3] };
; CHECK-NEXT: }
; AST: if (1)
; ;
; CHECK: Statements { ; AST: if (N >= 1) {
; CHECK: Stmt_sw_bb ; AST-NEXT: Stmt_sw_bb(0);
; CHECK: Domain := ; AST-NEXT: if (N >= 2) {
; CHECK: [N] -> { Stmt_sw_bb[0] : N >= 1 }; ; AST-NEXT: Stmt_sw_bb_1(1);
; CHECK: Stmt_sw_bb_1 ; AST-NEXT: if (N >= 3) {
; CHECK: Domain := ; AST-NEXT: Stmt_sw_bb_5(2);
; CHECK: [N] -> { Stmt_sw_bb_1[1] : N >= 2 }; ; AST-NEXT: if (N >= 4)
; CHECK: Stmt_sw_bb_5 ; AST-NEXT: Stmt_sw_bb_9(3);
; CHECK: Domain := ; AST-NEXT: }
; CHECK: [N] -> { Stmt_sw_bb_5[2] : N >= 3 }; ; AST-NEXT: }
; CHECK: Stmt_sw_bb_9 ; AST-NEXT: }
; CHECK: Domain :=
; CHECK: [N] -> { Stmt_sw_bb_9[3] : N >= 4 };
; CHECK: }
;
; AST: if (1)
;
; AST: if (N >= 1) {
; AST: Stmt_sw_bb(0);
; AST: if (N >= 2) {
; AST: Stmt_sw_bb_1(1);
; AST: if (N >= 3) {
; AST: Stmt_sw_bb_5(2);
; AST: if (N >= 4)
; AST: Stmt_sw_bb_9(3);
; AST: }
; AST: }
; AST: }
;
; AST: else
; AST: { /* original code */ }
;
; ;
; AST: else
; AST-NEXT: { /* original code */ }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %N) { define void @f(i32* %A, i32 %N) {

61
polly/test/ScopInfo/switch-7.ll
View File

@ -16,33 +16,44 @@
; } ; }
; } ; }
; } ; }
; CHECK: Statements {
; CHECK-NEXT: Stmt_for_body
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [c, N] -> { Stmt_for_body[i0] : c = -1 and i0 >= 0 and i0 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [c, N] -> { Stmt_for_body[i0] -> [1, i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [c, N] -> { Stmt_for_body[i0] -> MemRef_A[-1 + N - i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [c, N] -> { Stmt_for_body[i0] -> MemRef_A[N - i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [c, N] -> { Stmt_for_body[i0] -> MemRef_A[N - i0] };
; CHECK-NEXT: Stmt_for_body_7
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [c, N] -> { Stmt_for_body_7[i0] : c = 1 and i0 >= 0 and i0 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [c, N] -> { Stmt_for_body_7[i0] -> [0, i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [c, N] -> { Stmt_for_body_7[i0] -> MemRef_A[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [c, N] -> { Stmt_for_body_7[i0] -> MemRef_A[1 + i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [c, N] -> { Stmt_for_body_7[i0] -> MemRef_A[1 + i0] };
; CHECK-NEXT: }
; AST: if (1)
; ;
; CHECK: Statements { ; AST: if (c == 1) {
; CHECK: Stmt_for_body ; AST-NEXT: for (int c0 = 0; c0 < N; c0 += 1)
; CHECK: Domain := ; AST-NEXT: Stmt_for_body_7(c0);
; CHECK: [c, N] -> { Stmt_for_body[i0] : c = -1 and i0 >= 0 and i0 <= -1 + N }; ; AST-NEXT: } else if (c == -1)
; CHECK: Schedule := ; AST-NEXT: for (int c0 = 0; c0 < N; c0 += 1)
; CHECK: [c, N] -> { Stmt_for_body[i0] -> [1, i0] }; ; AST-NEXT: Stmt_for_body(c0);
; CHECK: Stmt_for_body_7
; CHECK: Domain :=
; CHECK: [c, N] -> { Stmt_for_body_7[i0] : c = 1 and i0 >= 0 and i0 <= -1 + N };
; CHECK: Schedule :=
; CHECK: [c, N] -> { Stmt_for_body_7[i0] -> [0, i0] };
; CHECK: }
;
; AST: if (1)
;
; AST: if (c == 1) {
; AST: for (int c0 = 0; c0 < N; c0 += 1)
; AST: Stmt_for_body_7(c0);
; AST: } else if (c == -1)
; AST: for (int c0 = 0; c0 < N; c0 += 1)
; AST: Stmt_for_body(c0);
;
; AST: else
; AST: { /* original code */ }
;
; ;
; AST: else
; AST-NEXT: { /* original code */ }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %c, i32 %N) { define void @f(i32* %A, i32 %c, i32 %N) {

48
polly/test/ScopInfo/tempscop-printing.ll
View File

@ -11,12 +11,36 @@
; } ; }
; } ; }
; CHECK-LABEL: Function: f
;
; CHECK: Statements {
; CHECK-NEXT: Stmt_for_j
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] : i0 >= 0 and i0 <= -1 + N and i1 >= 0 and i1 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> [i0, i1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_init[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_A[i1] };
; CHECK-NEXT: }
;
; CHECK-LABEL: Function: g
;
; CHECK: Statements {
; CHECK-NEXT: Stmt_for_j
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] : i0 >= 0 and i0 <= -1 + N and i1 >= 0 and i1 <= -1 + N };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> [i0, i1] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_init[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_A[i1] };
; CHECK-NEXT: }
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
; CHECK-LABEL: Function: f
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: MemRef_init_ptr[0]
; CHECK-NEXT: Execution Context: [N] -> { : N >= 1 or N <= -1 }
define void @f(i64* noalias %A, i64 %N, i64* noalias %init_ptr) nounwind { define void @f(i64* noalias %A, i64 %N, i64* noalias %init_ptr) nounwind {
entry: entry:
@ -28,17 +52,11 @@ for.i:
br label %entry.next br label %entry.next
entry.next: entry.next:
; CHECK-NOT: Stmt_entry_next
%init = load i64, i64* %init_ptr %init = load i64, i64* %init_ptr
br label %for.j br label %for.j
for.j: for.j:
%indvar.j = phi i64 [ 0, %entry.next ], [ %indvar.j.next, %for.j ] %indvar.j = phi i64 [ 0, %entry.next ], [ %indvar.j.next, %for.j ]
; CHECK: Stmt_for_j
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_init[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_A[i1] };
%init_plus_two = add i64 %init, 2 %init_plus_two = add i64 %init, 2
%scevgep = getelementptr i64, i64* %A, i64 %indvar.j %scevgep = getelementptr i64, i64* %A, i64 %indvar.j
store i64 %init_plus_two, i64* %scevgep store i64 %init_plus_two, i64* %scevgep
@ -54,10 +72,6 @@ return:
ret void ret void
} }
; CHECK-LABEL: Function: g
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: MemRef_init_ptr[0]
; CHECK-NEXT: Execution Context: [N] -> { : N >= 1 or N <= -1 }
define void @g(i64* noalias %A, i64 %N, i64* noalias %init_ptr) nounwind { define void @g(i64* noalias %A, i64 %N, i64* noalias %init_ptr) nounwind {
entry: entry:
br label %for.i br label %for.i
@ -68,19 +82,13 @@ for.i:
br label %entry.next br label %entry.next
entry.next: entry.next:
; CHECK-NOT: Stmt_entry_next
%init = load i64, i64* %init_ptr %init = load i64, i64* %init_ptr
br label %for.j br label %for.j
for.j: for.j:
; CHECK: Stmt_for_j
%indvar.j = phi i64 [ 0, %entry.next ], [ %indvar.j.next, %for.j ] %indvar.j = phi i64 [ 0, %entry.next ], [ %indvar.j.next, %for.j ]
%scevgep = getelementptr i64, i64* %A, i64 %indvar.j %scevgep = getelementptr i64, i64* %A, i64 %indvar.j
store i64 %init, i64* %scevgep store i64 %init, i64* %scevgep
; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_init[] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_for_j[i0, i1] -> MemRef_A[i1] };
%indvar.j.next = add nsw i64 %indvar.j, 1 %indvar.j.next = add nsw i64 %indvar.j, 1
%exitcond.j = icmp eq i64 %indvar.j.next, %N %exitcond.j = icmp eq i64 %indvar.j.next, %N
br i1 %exitcond.j, label %for.i.end, label %for.j br i1 %exitcond.j, label %for.i.end, label %for.j

38
polly/test/ScopInfo/two-loops-right-after-each-other.ll
View File

@ -1,24 +1,26 @@
; RUN: opt %loadPolly -polly-scops -analyze \ ; RUN: opt %loadPolly -polly-scops -analyze \
; RUN: < %s | FileCheck %s ; RUN: < %s | FileCheck %s
; CHECK: Stmt_loop_1 ; CHECK: Statements {
; CHECK: Domain := ; CHECK-NEXT: Stmt_loop_1
; CHECK: [N] -> { Stmt_loop_1[i0] : ; CHECK-NEXT: Domain :=
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: [N] -> { Stmt_loop_1[i0] : N <= 100 and i0 <= 101 and i0 >= 0 };
; CHECK-DAG: and ; CHECK-NEXT: Schedule :=
; CHECK-DAG: i0 <= 101 ; CHECK-NEXT: [N] -> { Stmt_loop_1[i0] -> [0, i0] };
; CHECK-DAG: and ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: N <= 100 ; CHECK-NEXT: [N] -> { Stmt_loop_1[i0] -> MemRef_A[0] };
; CHECK-DAG: }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: Stmt_loop_2 ; CHECK-NEXT: [N] -> { Stmt_loop_1[i0] -> MemRef_A[0] };
; CHECK: Domain := ; CHECK-NEXT: Stmt_loop_2
; CHECK: [N] -> { Stmt_loop_2[i0] : ; CHECK-NEXT: Domain :=
; CHECK-DAG: i0 >= 0 ; CHECK-NEXT: [N] -> { Stmt_loop_2[i0] : N <= 100 and i0 <= 301 and i0 >= 0 };
; CHECK-DAG: and ; CHECK-NEXT: Schedule :=
; CHECK-DAG: i0 <= 301 ; CHECK-NEXT: [N] -> { Stmt_loop_2[i0] -> [1, i0] };
; CHECK-DAG: and ; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-DAG: N <= 100 ; CHECK-NEXT: [N] -> { Stmt_loop_2[i0] -> MemRef_A[0] };
; CHECK-DAG: }; ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [N] -> { Stmt_loop_2[i0] -> MemRef_A[0] };
; CHECK-NEXT: }
define void @foo(float* %A, i64 %N) { define void @foo(float* %A, i64 %N) {
entry: entry:

27
polly/test/ScopInfo/unsigned-condition.ll
View File

@ -32,19 +32,16 @@ return:
ret void ret void
} }
; CHECK: Assumed Context:
; CHECK: { : }
; CHECK: Stmt_store ; CHECK: Assumed Context:
; CHECK: Domain := ; CHECK-NEXT: [P, N] -> { : }
; CHECK: [P, N] -> { Stmt_store[i0] : ;
; CHECK-DAG: i0 >= 0 ; CHECK: Statements {
; CHECK-DAG: and ; CHECK-NEXT: Stmt_store
; CHECK-DAG: i0 <= -1 + N ; CHECK-NEXT: Domain :=
; CHECK-DAG: and ; CHECK-NEXT: [P, N] -> { Stmt_store[i0] : P >= 42 and i0 >= 0 and i0 <= -1 + N };
; CHECK-DAG: P >= 42 ; CHECK-NEXT: Schedule :=
; CHECK: }; ; CHECK-NEXT: [P, N] -> { Stmt_store[i0] -> [i0] };
; CHECK: Schedule := ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK: [P, N] -> { Stmt_store[i0] -> [i0] }; ; CHECK-NEXT: [P, N] -> { Stmt_store[i0] -> MemRef_a[i0] };
; CHECK: MustWriteAccess := [Reduction Type: NONE] ; CHECK-NEXT: }
; CHECK: [P, N] -> { Stmt_store[i0] -> MemRef_a[i0] };

12
polly/test/ScopInfo/user_context.ll
View File

@ -9,15 +9,11 @@
; a[i] = i; ; a[i] = i;
; } ; }
; CHECK: Context: ; CHECK: Context:
; CHECK: [N] -> { : ; CHECK-NEXT: [N] -> { : N <= 9223372036854775807 and N >= -9223372036854775808 }
; CHECK-DAG: N >= -9223372036854775808
; CHECK-DAG: and
; CHECK-DAG: N <= 9223372036854775807
; CHECK: }
; CTX: Context: ; CTX: Context:
; CTX: [N] -> { : N = 1024 } ; CTX-NEXT: [N] -> { : N = 1024 }
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"

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