parent
bd5c8b9be9
commit
5bf047e5c4
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@ -48,6 +48,7 @@ using namespace lldb_private;
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//
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//
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//----------------------------------------------------------------------
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//----------------------------------------------------------------------
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#ifdef __mips__
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extern "C" {
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extern "C" {
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void LLVMInitializeMipsTargetInfo ();
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void LLVMInitializeMipsTargetInfo ();
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void LLVMInitializeMipsTarget ();
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void LLVMInitializeMipsTarget ();
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@ -55,6 +56,7 @@ extern "C" {
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void LLVMInitializeMipsTargetMC ();
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void LLVMInitializeMipsTargetMC ();
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void LLVMInitializeMipsDisassembler ();
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void LLVMInitializeMipsDisassembler ();
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}
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}
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#endif
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EmulateInstructionMIPS64::EmulateInstructionMIPS64 (const lldb_private::ArchSpec &arch) :
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EmulateInstructionMIPS64::EmulateInstructionMIPS64 (const lldb_private::ArchSpec &arch) :
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EmulateInstruction (arch)
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EmulateInstruction (arch)
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@ -70,6 +72,7 @@ EmulateInstructionMIPS64::EmulateInstructionMIPS64 (const lldb_private::ArchSpec
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* to decode the instructions so that the decoding complexity stays with LLVM.
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* to decode the instructions so that the decoding complexity stays with LLVM.
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* Initialize the MIPS targets and disassemblers.
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* Initialize the MIPS targets and disassemblers.
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*/
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*/
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#ifdef __mips__
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if (!target)
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if (!target)
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{
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{
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LLVMInitializeMipsTargetInfo ();
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LLVMInitializeMipsTargetInfo ();
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@ -79,6 +82,7 @@ EmulateInstructionMIPS64::EmulateInstructionMIPS64 (const lldb_private::ArchSpec
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LLVMInitializeMipsDisassembler ();
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LLVMInitializeMipsDisassembler ();
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target = llvm::TargetRegistry::lookupTarget (triple.getTriple(), Error);
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target = llvm::TargetRegistry::lookupTarget (triple.getTriple(), Error);
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}
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}
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#endif
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assert (target);
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assert (target);
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