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[X86] Use correct subvector index when combining two insert subvectors featuring zero vectors. 

Previously we were using one of the subvector indices twice. The included test case causes an assert without this change.

Thanks to Simon Pilgrim for catching this.

llvm-svn: 314429
This commit is contained in:
Craig Topper 2017-09-28 16:53:16 +00:00
parent 0f1de04979
commit 71a8cf9f99
2 changed files with 12 additions and 1 deletions
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2
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -35801,7 +35801,7 @@ static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG,
// just insert into the larger zero vector directly.
if (SubVec.getOpcode() == ISD::INSERT_SUBVECTOR &&
ISD::isBuildVectorAllZeros(SubVec.getOperand(0).getNode())) {
unsigned Idx2Val = cast<ConstantSDNode>(Idx)->getZExtValue();
unsigned Idx2Val = SubVec.getConstantOperandVal(2);
return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, Vec,
SubVec.getOperand(1),
DAG.getIntPtrConstant(IdxVal + Idx2Val, dl));

11
llvm/test/CodeGen/X86/avx512-insert-extract.ll
View File

@ -2183,3 +2183,14 @@ define zeroext i8 @test_extractelement_varible_v32i1(<32 x i8> %a, <32 x i8> %b,
ret i8 %res
}
define <8 x i64> @insert_double_zero(<2 x i64> %a) nounwind {
; CHECK-LABEL: insert_double_zero:
; CHECK: ## BB#0:
; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1
; CHECK-NEXT: vinsertf32x4 $2, %xmm0, %zmm1, %zmm0
; CHECK-NEXT: retq
%b = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%d = shufflevector <4 x i64> %b, <4 x i64> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%e = shufflevector <8 x i64> %d, <8 x i64> zeroinitializer, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 0, i32 1, i32 2, i32 3>
ret <8 x i64> %e
}