These instructions have special lowering that may lower them to SSE
instructions. Prevent that if we don't want implicit uses of SSE. llvm-svn: 66877
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@ -113,23 +113,26 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
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setOperationAction(ISD::UINT_TO_FP , MVT::i16 , Promote);
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if (Subtarget->is64Bit()) {
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setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Expand);
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setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote);
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setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Expand);
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} else {
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if (X86ScalarSSEf64) {
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if (!UseSoftFloat && !NoImplicitFloat && X86ScalarSSEf64) {
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// We have an impenetrably clever algorithm for ui64->double only.
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setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom);
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// We have faster algorithm for ui32->single only.
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setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom);
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} else
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} else {
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setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote);
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}
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}
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// Promote i1/i8 SINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have
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// this operation.
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setOperationAction(ISD::SINT_TO_FP , MVT::i1 , Promote);
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setOperationAction(ISD::SINT_TO_FP , MVT::i8 , Promote);
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if (!UseSoftFloat && !NoImplicitFloat) {
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// SSE has no i16 to fp conversion, only i32
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if (X86ScalarSSEf32) {
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setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Promote);
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@ -139,6 +142,10 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
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setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Custom);
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setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Custom);
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}
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} else {
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setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Promote);
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setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Promote);
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}
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// In 32-bit mode these are custom lowered. In 64-bit mode F32 and F64
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// are Legal, f80 is custom lowered.
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