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[BasicTTI] Remove unused support for multiple opcodes in getTypeBasedIntrinsicInstrCost [nfc] 

ISDs only ever contains a single ISD opcode.  We can simplify the code under this assumption. The code being removed was added back in 2016 in 0f26b0aeb4 to support FMAXNAN/FMINNAN, but at some point since then the motivating case was rewritten not to use the ISDs mechanism.  No reason to keep the false generality around now.
This commit is contained in:
Philip Reames 2022-06-13 18:19:50 -07:00 committed by Philip Reames
parent 520d17bfa0
commit 800d222e53
1 changed files with 49 additions and 62 deletions
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111
llvm/include/llvm/CodeGen/BasicTTIImpl.h
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@ -1612,7 +1612,7 @@ public:
// Library call cost - other than size, make it expensive. // Library call cost - other than size, make it expensive.
unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10; unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
SmallVector<unsigned, 2> ISDs; unsigned ISD;
switch (IID) { switch (IID) {
default: { default: {
// Scalable vectors cannot be scalarized, so return Invalid. // Scalable vectors cannot be scalarized, so return Invalid.
@ -1657,82 +1657,82 @@ public:
// Look for intrinsics that can be lowered directly or turned into a scalar // Look for intrinsics that can be lowered directly or turned into a scalar
// intrinsic call. // intrinsic call.
case Intrinsic::sqrt: case Intrinsic::sqrt:
ISDs.push_back(ISD::FSQRT); ISD = ISD::FSQRT;
break; break;
case Intrinsic::sin: case Intrinsic::sin:
ISDs.push_back(ISD::FSIN); ISD = ISD::FSIN;
break; break;
case Intrinsic::cos: case Intrinsic::cos:
ISDs.push_back(ISD::FCOS); ISD = ISD::FCOS;
break; break;
case Intrinsic::exp: case Intrinsic::exp:
ISDs.push_back(ISD::FEXP); ISD = ISD::FEXP;
break; break;
case Intrinsic::exp2: case Intrinsic::exp2:
ISDs.push_back(ISD::FEXP2); ISD = ISD::FEXP2;
break; break;
case Intrinsic::log: case Intrinsic::log:
ISDs.push_back(ISD::FLOG); ISD = ISD::FLOG;
break; break;
case Intrinsic::log10: case Intrinsic::log10:
ISDs.push_back(ISD::FLOG10); ISD = ISD::FLOG10;
break; break;
case Intrinsic::log2: case Intrinsic::log2:
ISDs.push_back(ISD::FLOG2); ISD = ISD::FLOG2;
break; break;
case Intrinsic::fabs: case Intrinsic::fabs:
ISDs.push_back(ISD::FABS); ISD = ISD::FABS;
break; break;
case Intrinsic::canonicalize: case Intrinsic::canonicalize:
ISDs.push_back(ISD::FCANONICALIZE); ISD = ISD::FCANONICALIZE;
break; break;
case Intrinsic::minnum: case Intrinsic::minnum:
ISDs.push_back(ISD::FMINNUM); ISD = ISD::FMINNUM;
break; break;
case Intrinsic::maxnum: case Intrinsic::maxnum:
ISDs.push_back(ISD::FMAXNUM); ISD = ISD::FMAXNUM;
break; break;
case Intrinsic::minimum: case Intrinsic::minimum:
ISDs.push_back(ISD::FMINIMUM); ISD = ISD::FMINIMUM;
break; break;
case Intrinsic::maximum: case Intrinsic::maximum:
ISDs.push_back(ISD::FMAXIMUM); ISD = ISD::FMAXIMUM;
break; break;
case Intrinsic::copysign: case Intrinsic::copysign:
ISDs.push_back(ISD::FCOPYSIGN); ISD = ISD::FCOPYSIGN;
break; break;
case Intrinsic::floor: case Intrinsic::floor:
ISDs.push_back(ISD::FFLOOR); ISD = ISD::FFLOOR;
break; break;
case Intrinsic::ceil: case Intrinsic::ceil:
ISDs.push_back(ISD::FCEIL); ISD = ISD::FCEIL;
break; break;
case Intrinsic::trunc: case Intrinsic::trunc:
ISDs.push_back(ISD::FTRUNC); ISD = ISD::FTRUNC;
break; break;
case Intrinsic::nearbyint: case Intrinsic::nearbyint:
ISDs.push_back(ISD::FNEARBYINT); ISD = ISD::FNEARBYINT;
break; break;
case Intrinsic::rint: case Intrinsic::rint:
ISDs.push_back(ISD::FRINT); ISD = ISD::FRINT;
break; break;
case Intrinsic::round: case Intrinsic::round:
ISDs.push_back(ISD::FROUND); ISD = ISD::FROUND;
break; break;
case Intrinsic::roundeven: case Intrinsic::roundeven:
ISDs.push_back(ISD::FROUNDEVEN); ISD = ISD::FROUNDEVEN;
break; break;
case Intrinsic::pow: case Intrinsic::pow:
ISDs.push_back(ISD::FPOW); ISD = ISD::FPOW;
break; break;
case Intrinsic::fma: case Intrinsic::fma:
ISDs.push_back(ISD::FMA); ISD = ISD::FMA;
break; break;
case Intrinsic::fmuladd: case Intrinsic::fmuladd:
ISDs.push_back(ISD::FMA); ISD = ISD::FMA;
break; break;
case Intrinsic::experimental_constrained_fmuladd: case Intrinsic::experimental_constrained_fmuladd:
ISDs.push_back(ISD::STRICT_FMA); ISD = ISD::STRICT_FMA;
break; break;
// FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free. // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
case Intrinsic::lifetime_start: case Intrinsic::lifetime_start:
@ -1976,22 +1976,22 @@ public:
return Cost; return Cost;
} }
case Intrinsic::ctpop: case Intrinsic::ctpop:
ISDs.push_back(ISD::CTPOP); ISD = ISD::CTPOP;
// In case of legalization use TCC_Expensive. This is cheaper than a // In case of legalization use TCC_Expensive. This is cheaper than a
// library call but still not a cheap instruction. // library call but still not a cheap instruction.
SingleCallCost = TargetTransformInfo::TCC_Expensive; SingleCallCost = TargetTransformInfo::TCC_Expensive;
break; break;
case Intrinsic::ctlz: case Intrinsic::ctlz:
ISDs.push_back(ISD::CTLZ); ISD = ISD::CTLZ;
break; break;
case Intrinsic::cttz: case Intrinsic::cttz:
ISDs.push_back(ISD::CTTZ); ISD = ISD::CTTZ;
break; break;
case Intrinsic::bswap: case Intrinsic::bswap:
ISDs.push_back(ISD::BSWAP); ISD = ISD::BSWAP;
break; break;
case Intrinsic::bitreverse: case Intrinsic::bitreverse:
ISDs.push_back(ISD::BITREVERSE); ISD = ISD::BITREVERSE;
break; break;
} }
@ -1999,39 +1999,26 @@ public:
std::pair<InstructionCost, MVT> LT = std::pair<InstructionCost, MVT> LT =
TLI->getTypeLegalizationCost(DL, RetTy); TLI->getTypeLegalizationCost(DL, RetTy);
SmallVector<InstructionCost, 2> LegalCost; if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
SmallVector<InstructionCost, 2> CustomCost; if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
for (unsigned ISD : ISDs) { TLI->isFAbsFree(LT.second)) {
if (TLI->isOperationLegalOrPromote(ISD, LT.second)) { return 0;
if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
TLI->isFAbsFree(LT.second)) {
return 0;
}
// The operation is legal. Assume it costs 1.
// If the type is split to multiple registers, assume that there is some
// overhead to this.
// TODO: Once we have extract/insert subvector cost we need to use them.
if (LT.first > 1)
LegalCost.push_back(LT.first * 2);
else
LegalCost.push_back(LT.first * 1);
} else if (!TLI->isOperationExpand(ISD, LT.second)) {
// If the operation is custom lowered then assume
// that the code is twice as expensive.
CustomCost.push_back(LT.first * 2);
} }
// The operation is legal. Assume it costs 1.
// If the type is split to multiple registers, assume that there is some
// overhead to this.
// TODO: Once we have extract/insert subvector cost we need to use them.
if (LT.first > 1)
return (LT.first * 2);
else
return (LT.first * 1);
} else if (!TLI->isOperationExpand(ISD, LT.second)) {
// If the operation is custom lowered then assume
// that the code is twice as expensive.
return (LT.first * 2);
} }
auto *MinLegalCostI = std::min_element(LegalCost.begin(), LegalCost.end());
if (MinLegalCostI != LegalCost.end())
return *MinLegalCostI;
auto MinCustomCostI =
std::min_element(CustomCost.begin(), CustomCost.end());
if (MinCustomCostI != CustomCost.end())
return *MinCustomCostI;
// If we can't lower fmuladd into an FMA estimate the cost as a floating // If we can't lower fmuladd into an FMA estimate the cost as a floating
// point mul followed by an add. // point mul followed by an add.
if (IID == Intrinsic::fmuladd) if (IID == Intrinsic::fmuladd)