Set the destination register field based on the target specific flags

llvm-svn: 4442

llvm/lib/Target/X86/X86InstrInfo.cpp

@@ -13,7 +13,10 @@
 //
 static const MachineInstrDescriptor X86Insts[] = {
 #define I(ENUM, NAME, FLAGS, TSFLAGS)   \
-             { NAME, -1, -1, 0, false, 0, 0, TSFLAGS, FLAGS },
+             { NAME,                    \
+               -1, /* Always vararg */  \
+               ((TSFLAGS) & X86II::Void) ? -1 : 0,  /* Result is in 0 */ \
+               0, false, 0, 0, TSFLAGS, FLAGS, TSFLAGS },
 #include "X86InstrInfo.def"
 };
 

llvm/lib/Target/X86/X86InstrInfo.def

@@ -5,6 +5,10 @@
 // specified below, and is used to make all of the information relevant to an
 // instruction be in one place.
 //
+// Note that X86 Instructions always have the destination register listed as
+// operand 0, unless it does not produce a value (in which case the TSFlags will
+// include X86II::Void).
+//
 //===----------------------------------------------------------------------===//
 
 // NOTE: No include guards desired