parent
7982de167f
commit
895d199348
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@ -244,17 +244,14 @@ def crbitm: Operand<i8> {
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// Address operands
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// Address operands
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def memri : Operand<iPTR> {
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def memri : Operand<iPTR> {
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let PrintMethod = "printMemRegImm";
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let PrintMethod = "printMemRegImm";
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let NumMIOperands = 2;
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let MIOperandInfo = (ops i32imm, ptr_rc);
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let MIOperandInfo = (ops i32imm, ptr_rc);
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}
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}
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def memrr : Operand<iPTR> {
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def memrr : Operand<iPTR> {
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let PrintMethod = "printMemRegReg";
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let PrintMethod = "printMemRegReg";
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let NumMIOperands = 2;
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let MIOperandInfo = (ops ptr_rc, ptr_rc);
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let MIOperandInfo = (ops ptr_rc, ptr_rc);
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}
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}
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def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits.
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def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits.
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let PrintMethod = "printMemRegImmShifted";
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let PrintMethod = "printMemRegImmShifted";
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let NumMIOperands = 2;
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let MIOperandInfo = (ops i32imm, ptr_rc);
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let MIOperandInfo = (ops i32imm, ptr_rc);
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}
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}
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