From 9f5859e3ee2a1788b7f9fd4924666755cb45d66e Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 7 Jan 2018 23:56:37 +0000 Subject: [PATCH] [X86] Simplify some code in lower1BitVectorShuffle by relying on getNode's ability to constant fold vector SIGN_EXTEND. llvm-svn: 321979 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ca24d6df891b..3c19960860d0 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -14286,21 +14286,8 @@ static SDValue lower1BitVectorShuffle(const SDLoc &DL, ArrayRef Mask, break; } - if (ISD::isBuildVectorAllZeros(V1.getNode())) - V1 = getZeroVector(ExtVT, Subtarget, DAG, DL); - else if (ISD::isBuildVectorAllOnes(V1.getNode())) - V1 = getOnesVector(ExtVT, DAG, DL); - else - V1 = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVT, V1); - - if (V2.isUndef()) - V2 = DAG.getUNDEF(ExtVT); - else if (ISD::isBuildVectorAllZeros(V2.getNode())) - V2 = getZeroVector(ExtVT, Subtarget, DAG, DL); - else if (ISD::isBuildVectorAllOnes(V2.getNode())) - V2 = getOnesVector(ExtVT, DAG, DL); - else - V2 = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVT, V2); + V1 = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVT, V1); + V2 = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVT, V2); SDValue Shuffle = DAG.getVectorShuffle(ExtVT, DL, V1, V2, Mask); // i1 was sign extended we can use X86ISD::CVT2MASK.