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[AVX-512] Add -show-mc-encoding to legacy vector intrinsic tests so we can see when VEX or EVEX encoded instructions are being emitted. Make sure the tests all have an avx2 command line and an skx command line. 

llvm-svn: 286055
This commit is contained in:
Craig Topper 2016-11-06 02:03:58 +00:00
parent 1c7868292c
commit a4a51f1afe
8 changed files with 3985 additions and 4027 deletions
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3551
llvm/test/CodeGen/X86/avx-intrinsics-x86.ll
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1173
llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
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682
llvm/test/CodeGen/X86/sse-intrinsics-x86.ll
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@ -1,17 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; NOTE: Assertions have been autogenerated by update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse | FileCheck %s --check-prefix=SSE
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=KNL
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse -show-mc-encoding | FileCheck %s --check-prefix=SSE
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX
define <4 x float> @test_x86_sse_add_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_add_ss:
; SSE: ## BB#0:
; SSE-NEXT: addss %xmm1, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: addss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x58,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_add_ss:
; KNL: ## BB#0:
; KNL-NEXT: vaddss %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_add_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vaddss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x58,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.add.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -21,13 +23,13 @@ declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>) nounwind read
define <4 x float> @test_x86_sse_cmp_ps(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_cmp_ps:
; SSE: ## BB#0:
; SSE-NEXT: cmpordps %xmm1, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: cmpordps %xmm1, %xmm0 ## encoding: [0x0f,0xc2,0xc1,0x07]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_cmp_ps:
; KNL: ## BB#0:
; KNL-NEXT: vcmpordps %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_cmp_ps:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vcmpordps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0xc2,0xc1,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -37,13 +39,13 @@ declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind
define <4 x float> @test_x86_sse_cmp_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_cmp_ss:
; SSE: ## BB#0:
; SSE-NEXT: cmpordss %xmm1, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: cmpordss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0xc2,0xc1,0x07]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_cmp_ss:
; KNL: ## BB#0:
; KNL-NEXT: vcmpordss %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_cmp_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vcmpordss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0xc2,0xc1,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -53,21 +55,30 @@ declare <4 x float> @llvm.x86.sse.cmp.ss(<4 x float>, <4 x float>, i8) nounwind
define i32 @test_x86_sse_comieq_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_comieq_ss:
; SSE: ## BB#0:
; SSE-NEXT: comiss %xmm1, %xmm0
; SSE-NEXT: setnp %al
; SSE-NEXT: sete %cl
; SSE-NEXT: andb %al, %cl
; SSE-NEXT: movzbl %cl, %eax
; SSE-NEXT: retl
; SSE-NEXT: comiss %xmm1, %xmm0 ## encoding: [0x0f,0x2f,0xc1]
; SSE-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0]
; SSE-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1]
; SSE-NEXT: andb %al, %cl ## encoding: [0x20,0xc1]
; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_comieq_ss:
; KNL: ## BB#0:
; KNL-NEXT: vcomiss %xmm1, %xmm0
; KNL-NEXT: setnp %al
; KNL-NEXT: sete %cl
; KNL-NEXT: andb %al, %cl
; KNL-NEXT: movzbl %cl, %eax
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_comieq_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1]
; AVX2-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0]
; AVX2-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1]
; AVX2-NEXT: andb %al, %cl ## encoding: [0x20,0xc1]
; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_comieq_ss:
; SKX: ## BB#0:
; SKX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1]
; SKX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0]
; SKX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1]
; SKX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1]
; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.comieq.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -77,17 +88,24 @@ declare i32 @llvm.x86.sse.comieq.ss(<4 x float>, <4 x float>) nounwind readnone
define i32 @test_x86_sse_comige_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_comige_ss:
; SSE: ## BB#0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: comiss %xmm1, %xmm0
; SSE-NEXT: setae %al
; SSE-NEXT: retl
; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE-NEXT: comiss %xmm1, %xmm0 ## encoding: [0x0f,0x2f,0xc1]
; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_comige_ss:
; KNL: ## BB#0:
; KNL-NEXT: xorl %eax, %eax
; KNL-NEXT: vcomiss %xmm1, %xmm0
; KNL-NEXT: setae %al
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_comige_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; AVX2-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1]
; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_comige_ss:
; SKX: ## BB#0:
; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SKX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1]
; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.comige.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -97,17 +115,24 @@ declare i32 @llvm.x86.sse.comige.ss(<4 x float>, <4 x float>) nounwind readnone
define i32 @test_x86_sse_comigt_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_comigt_ss:
; SSE: ## BB#0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: comiss %xmm1, %xmm0
; SSE-NEXT: seta %al
; SSE-NEXT: retl
; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE-NEXT: comiss %xmm1, %xmm0 ## encoding: [0x0f,0x2f,0xc1]
; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_comigt_ss:
; KNL: ## BB#0:
; KNL-NEXT: xorl %eax, %eax
; KNL-NEXT: vcomiss %xmm1, %xmm0
; KNL-NEXT: seta %al
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_comigt_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; AVX2-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1]
; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_comigt_ss:
; SKX: ## BB#0:
; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SKX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1]
; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.comigt.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -117,17 +142,24 @@ declare i32 @llvm.x86.sse.comigt.ss(<4 x float>, <4 x float>) nounwind readnone
define i32 @test_x86_sse_comile_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_comile_ss:
; SSE: ## BB#0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: comiss %xmm0, %xmm1
; SSE-NEXT: setae %al
; SSE-NEXT: retl
; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE-NEXT: comiss %xmm0, %xmm1 ## encoding: [0x0f,0x2f,0xc8]
; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_comile_ss:
; KNL: ## BB#0:
; KNL-NEXT: xorl %eax, %eax
; KNL-NEXT: vcomiss %xmm0, %xmm1
; KNL-NEXT: setae %al
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_comile_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; AVX2-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2f,0xc8]
; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_comile_ss:
; SKX: ## BB#0:
; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SKX-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc8]
; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.comile.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -137,17 +169,24 @@ declare i32 @llvm.x86.sse.comile.ss(<4 x float>, <4 x float>) nounwind readnone
define i32 @test_x86_sse_comilt_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_comilt_ss:
; SSE: ## BB#0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: comiss %xmm0, %xmm1
; SSE-NEXT: seta %al
; SSE-NEXT: retl
; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE-NEXT: comiss %xmm0, %xmm1 ## encoding: [0x0f,0x2f,0xc8]
; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_comilt_ss:
; KNL: ## BB#0:
; KNL-NEXT: xorl %eax, %eax
; KNL-NEXT: vcomiss %xmm0, %xmm1
; KNL-NEXT: seta %al
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_comilt_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; AVX2-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2f,0xc8]
; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_comilt_ss:
; SKX: ## BB#0:
; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SKX-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc8]
; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.comilt.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -157,21 +196,30 @@ declare i32 @llvm.x86.sse.comilt.ss(<4 x float>, <4 x float>) nounwind readnone
define i32 @test_x86_sse_comineq_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_comineq_ss:
; SSE: ## BB#0:
; SSE-NEXT: comiss %xmm1, %xmm0
; SSE-NEXT: setp %al
; SSE-NEXT: setne %cl
; SSE-NEXT: orb %al, %cl
; SSE-NEXT: movzbl %cl, %eax
; SSE-NEXT: retl
; SSE-NEXT: comiss %xmm1, %xmm0 ## encoding: [0x0f,0x2f,0xc1]
; SSE-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0]
; SSE-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1]
; SSE-NEXT: orb %al, %cl ## encoding: [0x08,0xc1]
; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_comineq_ss:
; KNL: ## BB#0:
; KNL-NEXT: vcomiss %xmm1, %xmm0
; KNL-NEXT: setp %al
; KNL-NEXT: setne %cl
; KNL-NEXT: orb %al, %cl
; KNL-NEXT: movzbl %cl, %eax
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_comineq_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1]
; AVX2-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0]
; AVX2-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1]
; AVX2-NEXT: orb %al, %cl ## encoding: [0x08,0xc1]
; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_comineq_ss:
; SKX: ## BB#0:
; SKX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1]
; SKX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0]
; SKX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1]
; SKX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1]
; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.comineq.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -181,15 +229,21 @@ declare i32 @llvm.x86.sse.comineq.ss(<4 x float>, <4 x float>) nounwind readnone
define <4 x float> @test_x86_sse_cvtsi2ss(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_cvtsi2ss:
; SSE: ## BB#0:
; SSE-NEXT: movl $7, %eax
; SSE-NEXT: cvtsi2ssl %eax, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SSE-NEXT: cvtsi2ssl %eax, %xmm0 ## encoding: [0xf3,0x0f,0x2a,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_cvtsi2ss:
; KNL: ## BB#0:
; KNL-NEXT: movl $7, %eax
; KNL-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_cvtsi2ss:
; AVX2: ## BB#0:
; AVX2-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; AVX2-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x2a,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_cvtsi2ss:
; SKX: ## BB#0:
; SKX-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SKX-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7e,0x08,0x2a,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float> %a0, i32 7) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -199,13 +253,18 @@ declare <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float>, i32) nounwind readnone
define i32 @test_x86_sse_cvtss2si(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_cvtss2si:
; SSE: ## BB#0:
; SSE-NEXT: cvtss2si %xmm0, %eax
; SSE-NEXT: retl
; SSE-NEXT: cvtss2si %xmm0, %eax ## encoding: [0xf3,0x0f,0x2d,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_cvtss2si:
; KNL: ## BB#0:
; KNL-NEXT: vcvtss2si %xmm0, %eax
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_cvtss2si:
; AVX2: ## BB#0:
; AVX2-NEXT: vcvtss2si %xmm0, %eax ## encoding: [0xc5,0xfa,0x2d,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_cvtss2si:
; SKX: ## BB#0:
; SKX-NEXT: vcvtss2si %xmm0, %eax ## encoding: [0x62,0xf1,0x7e,0x08,0x2d,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0) ; <i32> [#uses=1]
ret i32 %res
}
@ -215,13 +274,18 @@ declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
define i32 @test_x86_sse_cvttss2si(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_cvttss2si:
; SSE: ## BB#0:
; SSE-NEXT: cvttss2si %xmm0, %eax
; SSE-NEXT: retl
; SSE-NEXT: cvttss2si %xmm0, %eax ## encoding: [0xf3,0x0f,0x2c,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_cvttss2si:
; KNL: ## BB#0:
; KNL-NEXT: vcvttss2si %xmm0, %eax
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_cvttss2si:
; AVX2: ## BB#0:
; AVX2-NEXT: vcvttss2si %xmm0, %eax ## encoding: [0xc5,0xfa,0x2c,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_cvttss2si:
; SKX: ## BB#0:
; SKX-NEXT: vcvttss2si %xmm0, %eax ## encoding: [0x62,0xf1,0x7e,0x08,0x2c,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0) ; <i32> [#uses=1]
ret i32 %res
}
@ -231,13 +295,13 @@ declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
define <4 x float> @test_x86_sse_div_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_div_ss:
; SSE: ## BB#0:
; SSE-NEXT: divss %xmm1, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: divss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x5e,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_div_ss:
; KNL: ## BB#0:
; KNL-NEXT: vdivss %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_div_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vdivss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5e,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.div.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -247,15 +311,15 @@ declare <4 x float> @llvm.x86.sse.div.ss(<4 x float>, <4 x float>) nounwind read
define void @test_x86_sse_ldmxcsr(i8* %a0) {
; SSE-LABEL: test_x86_sse_ldmxcsr:
; SSE: ## BB#0:
; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE-NEXT: ldmxcsr (%eax)
; SSE-NEXT: retl
; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; SSE-NEXT: ldmxcsr (%eax) ## encoding: [0x0f,0xae,0x10]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_ldmxcsr:
; KNL: ## BB#0:
; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax
; KNL-NEXT: vldmxcsr (%eax)
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_ldmxcsr:
; VCHECK: ## BB#0:
; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; VCHECK-NEXT: vldmxcsr (%eax) ## encoding: [0xc5,0xf8,0xae,0x10]
; VCHECK-NEXT: retl ## encoding: [0xc3]
call void @llvm.x86.sse.ldmxcsr(i8* %a0)
ret void
}
@ -266,13 +330,18 @@ declare void @llvm.x86.sse.ldmxcsr(i8*) nounwind
define <4 x float> @test_x86_sse_max_ps(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_max_ps:
; SSE: ## BB#0:
; SSE-NEXT: maxps %xmm1, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: maxps %xmm1, %xmm0 ## encoding: [0x0f,0x5f,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_max_ps:
; KNL: ## BB#0:
; KNL-NEXT: vmaxps %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_max_ps:
; AVX2: ## BB#0:
; AVX2-NEXT: vmaxps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x5f,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_max_ps:
; SKX: ## BB#0:
; SKX-NEXT: vmaxps %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x5f,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -282,13 +351,13 @@ declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>) nounwind read
define <4 x float> @test_x86_sse_max_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_max_ss:
; SSE: ## BB#0:
; SSE-NEXT: maxss %xmm1, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: maxss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x5f,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_max_ss:
; KNL: ## BB#0:
; KNL-NEXT: vmaxss %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_max_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vmaxss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5f,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -298,13 +367,18 @@ declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind read
define <4 x float> @test_x86_sse_min_ps(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_min_ps:
; SSE: ## BB#0:
; SSE-NEXT: minps %xmm1, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: minps %xmm1, %xmm0 ## encoding: [0x0f,0x5d,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_min_ps:
; KNL: ## BB#0:
; KNL-NEXT: vminps %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_min_ps:
; AVX2: ## BB#0:
; AVX2-NEXT: vminps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x5d,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_min_ps:
; SKX: ## BB#0:
; SKX-NEXT: vminps %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x5d,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -314,13 +388,13 @@ declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) nounwind read
define <4 x float> @test_x86_sse_min_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_min_ss:
; SSE: ## BB#0:
; SSE-NEXT: minss %xmm1, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: minss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x5d,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_min_ss:
; KNL: ## BB#0:
; KNL-NEXT: vminss %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_min_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vminss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5d,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -330,13 +404,13 @@ declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) nounwind read
define i32 @test_x86_sse_movmsk_ps(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_movmsk_ps:
; SSE: ## BB#0:
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: retl
; SSE-NEXT: movmskps %xmm0, %eax ## encoding: [0x0f,0x50,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_movmsk_ps:
; KNL: ## BB#0:
; KNL-NEXT: vmovmskps %xmm0, %eax
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_movmsk_ps:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vmovmskps %xmm0, %eax ## encoding: [0xc5,0xf8,0x50,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; <i32> [#uses=1]
ret i32 %res
}
@ -347,13 +421,13 @@ declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
define <4 x float> @test_x86_sse_mul_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_mul_ss:
; SSE: ## BB#0:
; SSE-NEXT: mulss %xmm1, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: mulss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x59,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_mul_ss:
; KNL: ## BB#0:
; KNL-NEXT: vmulss %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_mul_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x59,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.mul.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -363,13 +437,18 @@ declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) nounwind read
define <4 x float> @test_x86_sse_rcp_ps(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_rcp_ps:
; SSE: ## BB#0:
; SSE-NEXT: rcpps %xmm0, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: rcpps %xmm0, %xmm0 ## encoding: [0x0f,0x53,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_rcp_ps:
; KNL: ## BB#0:
; KNL-NEXT: vrcpps %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_rcp_ps:
; AVX2: ## BB#0:
; AVX2-NEXT: vrcpps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x53,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_rcp_ps:
; SKX: ## BB#0:
; SKX-NEXT: vrcp14ps %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x4c,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -379,13 +458,13 @@ declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>) nounwind readnone
define <4 x float> @test_x86_sse_rcp_ss(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_rcp_ss:
; SSE: ## BB#0:
; SSE-NEXT: rcpss %xmm0, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: rcpss %xmm0, %xmm0 ## encoding: [0xf3,0x0f,0x53,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_rcp_ss:
; KNL: ## BB#0:
; KNL-NEXT: vrcpss %xmm0, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_rcp_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vrcpss %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x53,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -395,13 +474,18 @@ declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) nounwind readnone
define <4 x float> @test_x86_sse_rsqrt_ps(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_rsqrt_ps:
; SSE: ## BB#0:
; SSE-NEXT: rsqrtps %xmm0, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: rsqrtps %xmm0, %xmm0 ## encoding: [0x0f,0x52,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_rsqrt_ps:
; KNL: ## BB#0:
; KNL-NEXT: vrsqrtps %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_rsqrt_ps:
; AVX2: ## BB#0:
; AVX2-NEXT: vrsqrtps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x52,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_rsqrt_ps:
; SKX: ## BB#0:
; SKX-NEXT: vrsqrt14ps %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x4e,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -411,13 +495,13 @@ declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>) nounwind readnone
define <4 x float> @test_x86_sse_rsqrt_ss(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_rsqrt_ss:
; SSE: ## BB#0:
; SSE-NEXT: rsqrtss %xmm0, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: rsqrtss %xmm0, %xmm0 ## encoding: [0xf3,0x0f,0x52,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_rsqrt_ss:
; KNL: ## BB#0:
; KNL-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_rsqrt_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x52,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -427,13 +511,13 @@ declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
define <4 x float> @test_x86_sse_sqrt_ps(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_sqrt_ps:
; SSE: ## BB#0:
; SSE-NEXT: sqrtps %xmm0, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: sqrtps %xmm0, %xmm0 ## encoding: [0x0f,0x51,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_sqrt_ps:
; KNL: ## BB#0:
; KNL-NEXT: vsqrtps %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_sqrt_ps:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vsqrtps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x51,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -443,13 +527,13 @@ declare <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float>) nounwind readnone
define <4 x float> @test_x86_sse_sqrt_ss(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_sqrt_ss:
; SSE: ## BB#0:
; SSE-NEXT: sqrtss %xmm0, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: sqrtss %xmm0, %xmm0 ## encoding: [0xf3,0x0f,0x51,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_sqrt_ss:
; KNL: ## BB#0:
; KNL-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_sqrt_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x51,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -459,15 +543,15 @@ declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone
define void @test_x86_sse_stmxcsr(i8* %a0) {
; SSE-LABEL: test_x86_sse_stmxcsr:
; SSE: ## BB#0:
; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE-NEXT: stmxcsr (%eax)
; SSE-NEXT: retl
; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; SSE-NEXT: stmxcsr (%eax) ## encoding: [0x0f,0xae,0x18]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_stmxcsr:
; KNL: ## BB#0:
; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax
; KNL-NEXT: vstmxcsr (%eax)
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_stmxcsr:
; VCHECK: ## BB#0:
; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; VCHECK-NEXT: vstmxcsr (%eax) ## encoding: [0xc5,0xf8,0xae,0x18]
; VCHECK-NEXT: retl ## encoding: [0xc3]
call void @llvm.x86.sse.stmxcsr(i8* %a0)
ret void
}
@ -477,13 +561,13 @@ declare void @llvm.x86.sse.stmxcsr(i8*) nounwind
define <4 x float> @test_x86_sse_sub_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_sub_ss:
; SSE: ## BB#0:
; SSE-NEXT: subss %xmm1, %xmm0
; SSE-NEXT: retl
; SSE-NEXT: subss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x5c,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_sub_ss:
; KNL: ## BB#0:
; KNL-NEXT: vsubss %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse_sub_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vsubss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5c,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse.sub.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -493,21 +577,30 @@ declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) nounwind read
define i32 @test_x86_sse_ucomieq_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_ucomieq_ss:
; SSE: ## BB#0:
; SSE-NEXT: ucomiss %xmm1, %xmm0
; SSE-NEXT: setnp %al
; SSE-NEXT: sete %cl
; SSE-NEXT: andb %al, %cl
; SSE-NEXT: movzbl %cl, %eax
; SSE-NEXT: retl
; SSE-NEXT: ucomiss %xmm1, %xmm0 ## encoding: [0x0f,0x2e,0xc1]
; SSE-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0]
; SSE-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1]
; SSE-NEXT: andb %al, %cl ## encoding: [0x20,0xc1]
; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_ucomieq_ss:
; KNL: ## BB#0:
; KNL-NEXT: vucomiss %xmm1, %xmm0
; KNL-NEXT: setnp %al
; KNL-NEXT: sete %cl
; KNL-NEXT: andb %al, %cl
; KNL-NEXT: movzbl %cl, %eax
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_ucomieq_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1]
; AVX2-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0]
; AVX2-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1]
; AVX2-NEXT: andb %al, %cl ## encoding: [0x20,0xc1]
; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_ucomieq_ss:
; SKX: ## BB#0:
; SKX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1]
; SKX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0]
; SKX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1]
; SKX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1]
; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -517,17 +610,24 @@ declare i32 @llvm.x86.sse.ucomieq.ss(<4 x float>, <4 x float>) nounwind readnone
define i32 @test_x86_sse_ucomige_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_ucomige_ss:
; SSE: ## BB#0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: ucomiss %xmm1, %xmm0
; SSE-NEXT: setae %al
; SSE-NEXT: retl
; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE-NEXT: ucomiss %xmm1, %xmm0 ## encoding: [0x0f,0x2e,0xc1]
; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_ucomige_ss:
; KNL: ## BB#0:
; KNL-NEXT: xorl %eax, %eax
; KNL-NEXT: vucomiss %xmm1, %xmm0
; KNL-NEXT: setae %al
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_ucomige_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; AVX2-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1]
; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_ucomige_ss:
; SKX: ## BB#0:
; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SKX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1]
; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.ucomige.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -537,17 +637,24 @@ declare i32 @llvm.x86.sse.ucomige.ss(<4 x float>, <4 x float>) nounwind readnone
define i32 @test_x86_sse_ucomigt_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_ucomigt_ss:
; SSE: ## BB#0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: ucomiss %xmm1, %xmm0
; SSE-NEXT: seta %al
; SSE-NEXT: retl
; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE-NEXT: ucomiss %xmm1, %xmm0 ## encoding: [0x0f,0x2e,0xc1]
; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_ucomigt_ss:
; KNL: ## BB#0:
; KNL-NEXT: xorl %eax, %eax
; KNL-NEXT: vucomiss %xmm1, %xmm0
; KNL-NEXT: seta %al
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_ucomigt_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; AVX2-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1]
; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_ucomigt_ss:
; SKX: ## BB#0:
; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SKX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1]
; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -557,17 +664,24 @@ declare i32 @llvm.x86.sse.ucomigt.ss(<4 x float>, <4 x float>) nounwind readnone
define i32 @test_x86_sse_ucomile_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_ucomile_ss:
; SSE: ## BB#0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: ucomiss %xmm0, %xmm1
; SSE-NEXT: setae %al
; SSE-NEXT: retl
; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE-NEXT: ucomiss %xmm0, %xmm1 ## encoding: [0x0f,0x2e,0xc8]
; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_ucomile_ss:
; KNL: ## BB#0:
; KNL-NEXT: xorl %eax, %eax
; KNL-NEXT: vucomiss %xmm0, %xmm1
; KNL-NEXT: setae %al
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_ucomile_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; AVX2-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2e,0xc8]
; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_ucomile_ss:
; SKX: ## BB#0:
; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SKX-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc8]
; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.ucomile.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -577,17 +691,24 @@ declare i32 @llvm.x86.sse.ucomile.ss(<4 x float>, <4 x float>) nounwind readnone
define i32 @test_x86_sse_ucomilt_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_ucomilt_ss:
; SSE: ## BB#0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: ucomiss %xmm0, %xmm1
; SSE-NEXT: seta %al
; SSE-NEXT: retl
; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE-NEXT: ucomiss %xmm0, %xmm1 ## encoding: [0x0f,0x2e,0xc8]
; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_ucomilt_ss:
; KNL: ## BB#0:
; KNL-NEXT: xorl %eax, %eax
; KNL-NEXT: vucomiss %xmm0, %xmm1
; KNL-NEXT: seta %al
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_ucomilt_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; AVX2-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2e,0xc8]
; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_ucomilt_ss:
; SKX: ## BB#0:
; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SKX-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc8]
; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -597,21 +718,30 @@ declare i32 @llvm.x86.sse.ucomilt.ss(<4 x float>, <4 x float>) nounwind readnone
define i32 @test_x86_sse_ucomineq_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_ucomineq_ss:
; SSE: ## BB#0:
; SSE-NEXT: ucomiss %xmm1, %xmm0
; SSE-NEXT: setp %al
; SSE-NEXT: setne %cl
; SSE-NEXT: orb %al, %cl
; SSE-NEXT: movzbl %cl, %eax
; SSE-NEXT: retl
; SSE-NEXT: ucomiss %xmm1, %xmm0 ## encoding: [0x0f,0x2e,0xc1]
; SSE-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0]
; SSE-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1]
; SSE-NEXT: orb %al, %cl ## encoding: [0x08,0xc1]
; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse_ucomineq_ss:
; KNL: ## BB#0:
; KNL-NEXT: vucomiss %xmm1, %xmm0
; KNL-NEXT: setp %al
; KNL-NEXT: setne %cl
; KNL-NEXT: orb %al, %cl
; KNL-NEXT: movzbl %cl, %eax
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse_ucomineq_ss:
; AVX2: ## BB#0:
; AVX2-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1]
; AVX2-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0]
; AVX2-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1]
; AVX2-NEXT: orb %al, %cl ## encoding: [0x08,0xc1]
; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse_ucomineq_ss:
; SKX: ## BB#0:
; SKX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1]
; SKX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0]
; SKX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1]
; SKX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1]
; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
ret i32 %res
}

1494
llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
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78
llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll
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@ -1,7 +1,18 @@
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse3 | FileCheck %s
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse3 -show-mc-encoding | FileCheck %s --check-prefix=SSE
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX
define <2 x double> @test_x86_sse3_addsub_pd(<2 x double> %a0, <2 x double> %a1) {
; CHECK: addsubpd
; SSE-LABEL: test_x86_sse3_addsub_pd:
; SSE: ## BB#0:
; SSE-NEXT: addsubpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd0,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse3_addsub_pd:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd0,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
ret <2 x double> %res
}
@ -9,7 +20,15 @@ declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwi
define <4 x float> @test_x86_sse3_addsub_ps(<4 x float> %a0, <4 x float> %a1) {
; CHECK: addsubps
; SSE-LABEL: test_x86_sse3_addsub_ps:
; SSE: ## BB#0:
; SSE-NEXT: addsubps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0xd0,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse3_addsub_ps:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xd0,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -17,7 +36,15 @@ declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind
define <2 x double> @test_x86_sse3_hadd_pd(<2 x double> %a0, <2 x double> %a1) {
; CHECK: haddpd
; SSE-LABEL: test_x86_sse3_hadd_pd:
; SSE: ## BB#0:
; SSE-NEXT: haddpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x7c,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse3_hadd_pd:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x7c,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
ret <2 x double> %res
}
@ -25,7 +52,15 @@ declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind
define <4 x float> @test_x86_sse3_hadd_ps(<4 x float> %a0, <4 x float> %a1) {
; CHECK: haddps
; SSE-LABEL: test_x86_sse3_hadd_ps:
; SSE: ## BB#0:
; SSE-NEXT: haddps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x7c,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse3_hadd_ps:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vhaddps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x7c,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -33,7 +68,15 @@ declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind re
define <2 x double> @test_x86_sse3_hsub_pd(<2 x double> %a0, <2 x double> %a1) {
; CHECK: hsubpd
; SSE-LABEL: test_x86_sse3_hsub_pd:
; SSE: ## BB#0:
; SSE-NEXT: hsubpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x7d,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse3_hsub_pd:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x7d,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
ret <2 x double> %res
}
@ -41,7 +84,15 @@ declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind
define <4 x float> @test_x86_sse3_hsub_ps(<4 x float> %a0, <4 x float> %a1) {
; CHECK: hsubps
; SSE-LABEL: test_x86_sse3_hsub_ps:
; SSE: ## BB#0:
; SSE-NEXT: hsubps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x7d,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse3_hsub_ps:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vhsubps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x7d,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -49,8 +100,17 @@ declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind re
define <16 x i8> @test_x86_sse3_ldu_dq(i8* %a0) {
; CHECK: movl
; CHECK: lddqu
; SSE-LABEL: test_x86_sse3_ldu_dq:
; SSE: ## BB#0:
; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; SSE-NEXT: lddqu (%eax), %xmm0 ## encoding: [0xf2,0x0f,0xf0,0x00]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse3_ldu_dq:
; VCHECK: ## BB#0:
; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; VCHECK-NEXT: vlddqu (%eax), %xmm0 ## encoding: [0xc5,0xfb,0xf0,0x00]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %a0) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}

405
llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
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@ -1,20 +1,21 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE41
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefix=SSE41
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX
define <2 x double> @test_x86_sse41_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
; SSE41-LABEL: test_x86_sse41_blendvpd:
; SSE41: ## BB#0:
; SSE41-NEXT: movapd %xmm0, %xmm3
; SSE41-NEXT: movaps %xmm2, %xmm0
; SSE41-NEXT: blendvpd %xmm1, %xmm3
; SSE41-NEXT: movapd %xmm3, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: movapd %xmm0, %xmm3 ## encoding: [0x66,0x0f,0x28,0xd8]
; SSE41-NEXT: movaps %xmm2, %xmm0 ## encoding: [0x0f,0x28,0xc2]
; SSE41-NEXT: blendvpd %xmm1, %xmm3 ## encoding: [0x66,0x0f,0x38,0x15,0xd9]
; SSE41-NEXT: movapd %xmm3, %xmm0 ## encoding: [0x66,0x0f,0x28,0xc3]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_blendvpd:
; KNL: ## BB#0:
; KNL-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_blendvpd:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x4b,0xc1,0x20]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) ; <<2 x double>> [#uses=1]
ret <2 x double> %res
}
@ -24,16 +25,16 @@ declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x d
define <4 x float> @test_x86_sse41_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
; SSE41-LABEL: test_x86_sse41_blendvps:
; SSE41: ## BB#0:
; SSE41-NEXT: movaps %xmm0, %xmm3
; SSE41-NEXT: movaps %xmm2, %xmm0
; SSE41-NEXT: blendvps %xmm1, %xmm3
; SSE41-NEXT: movaps %xmm3, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: movaps %xmm0, %xmm3 ## encoding: [0x0f,0x28,0xd8]
; SSE41-NEXT: movaps %xmm2, %xmm0 ## encoding: [0x0f,0x28,0xc2]
; SSE41-NEXT: blendvps %xmm1, %xmm3 ## encoding: [0x66,0x0f,0x38,0x14,0xd9]
; SSE41-NEXT: movaps %xmm3, %xmm0 ## encoding: [0x0f,0x28,0xc3]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_blendvps:
; KNL: ## BB#0:
; KNL-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_blendvps:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x4a,0xc1,0x20]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -43,13 +44,13 @@ declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x floa
define <2 x double> @test_x86_sse41_dppd(<2 x double> %a0, <2 x double> %a1) {
; SSE41-LABEL: test_x86_sse41_dppd:
; SSE41: ## BB#0:
; SSE41-NEXT: dppd $7, %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: dppd $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x41,0xc1,0x07]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_dppd:
; KNL: ## BB#0:
; KNL-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_dppd:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x41,0xc1,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1]
ret <2 x double> %res
}
@ -59,13 +60,13 @@ declare <2 x double> @llvm.x86.sse41.dppd(<2 x double>, <2 x double>, i8) nounwi
define <4 x float> @test_x86_sse41_dpps(<4 x float> %a0, <4 x float> %a1) {
; SSE41-LABEL: test_x86_sse41_dpps:
; SSE41: ## BB#0:
; SSE41-NEXT: dpps $7, %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: dpps $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x40,0xc1,0x07]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_dpps:
; KNL: ## BB#0:
; KNL-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_dpps:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x40,0xc1,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -75,13 +76,21 @@ declare <4 x float> @llvm.x86.sse41.dpps(<4 x float>, <4 x float>, i8) nounwind
define <4 x float> @test_x86_sse41_insertps(<4 x float> %a0, <4 x float> %a1) {
; SSE41-LABEL: test_x86_sse41_insertps:
; SSE41: ## BB#0:
; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3]
; SSE41-NEXT: retl
; SSE41-NEXT: insertps $17, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x21,0xc1,0x11]
; SSE41-NEXT: ## xmm0 = zero,xmm1[0],xmm0[2,3]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_insertps:
; KNL: ## BB#0:
; KNL-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3]
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_insertps:
; AVX2: ## BB#0:
; AVX2-NEXT: vinsertps $17, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0xc1,0x11]
; AVX2-NEXT: ## xmm0 = zero,xmm1[0],xmm0[2,3]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_insertps:
; SKX: ## BB#0:
; SKX-NEXT: vinsertps $17, %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf3,0x7d,0x08,0x21,0xc1,0x11]
; SKX-NEXT: ## xmm0 = zero,xmm1[0],xmm0[2,3]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 17) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -92,13 +101,13 @@ declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i8) nounw
define <8 x i16> @test_x86_sse41_mpsadbw(<16 x i8> %a0, <16 x i8> %a1) {
; SSE41-LABEL: test_x86_sse41_mpsadbw:
; SSE41: ## BB#0:
; SSE41-NEXT: mpsadbw $7, %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: mpsadbw $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x42,0xc1,0x07]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_mpsadbw:
; KNL: ## BB#0:
; KNL-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_mpsadbw:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x42,0xc1,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -108,13 +117,18 @@ declare <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8>, <16 x i8>, i8) nounwind rea
define <8 x i16> @test_x86_sse41_packusdw(<4 x i32> %a0, <4 x i32> %a1) {
; SSE41-LABEL: test_x86_sse41_packusdw:
; SSE41: ## BB#0:
; SSE41-NEXT: packusdw %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: packusdw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x2b,0xc1]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_packusdw:
; KNL: ## BB#0:
; KNL-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_packusdw:
; AVX2: ## BB#0:
; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x2b,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_packusdw:
; SKX: ## BB#0:
; SKX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x2b,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %a0, <4 x i32> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -124,16 +138,16 @@ declare <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32>, <4 x i32>) nounwind readno
define <16 x i8> @test_x86_sse41_pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) {
; SSE41-LABEL: test_x86_sse41_pblendvb:
; SSE41: ## BB#0:
; SSE41-NEXT: movdqa %xmm0, %xmm3
; SSE41-NEXT: movaps %xmm2, %xmm0
; SSE41-NEXT: pblendvb %xmm1, %xmm3
; SSE41-NEXT: movdqa %xmm3, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: movdqa %xmm0, %xmm3 ## encoding: [0x66,0x0f,0x6f,0xd8]
; SSE41-NEXT: movaps %xmm2, %xmm0 ## encoding: [0x0f,0x28,0xc2]
; SSE41-NEXT: pblendvb %xmm1, %xmm3 ## encoding: [0x66,0x0f,0x38,0x10,0xd9]
; SSE41-NEXT: movdqa %xmm3, %xmm0 ## encoding: [0x66,0x0f,0x6f,0xc3]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_pblendvb:
; KNL: ## BB#0:
; KNL-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_pblendvb:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x4c,0xc1,0x20]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}
@ -143,13 +157,13 @@ declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>) noun
define <8 x i16> @test_x86_sse41_phminposuw(<8 x i16> %a0) {
; SSE41-LABEL: test_x86_sse41_phminposuw:
; SSE41: ## BB#0:
; SSE41-NEXT: phminposuw %xmm0, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: phminposuw %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x38,0x41,0xc0]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_phminposuw:
; KNL: ## BB#0:
; KNL-NEXT: vphminposuw %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_phminposuw:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vphminposuw %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x41,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16> %a0) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -159,13 +173,18 @@ declare <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16>) nounwind readnone
define <16 x i8> @test_x86_sse41_pmaxsb(<16 x i8> %a0, <16 x i8> %a1) {
; SSE41-LABEL: test_x86_sse41_pmaxsb:
; SSE41: ## BB#0:
; SSE41-NEXT: pmaxsb %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: pmaxsb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3c,0xc1]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_pmaxsb:
; KNL: ## BB#0:
; KNL-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_pmaxsb:
; AVX2: ## BB#0:
; AVX2-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3c,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_pmaxsb:
; SKX: ## BB#0:
; SKX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3c,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}
@ -175,13 +194,18 @@ declare <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8>, <16 x i8>) nounwind readnone
define <4 x i32> @test_x86_sse41_pmaxsd(<4 x i32> %a0, <4 x i32> %a1) {
; SSE41-LABEL: test_x86_sse41_pmaxsd:
; SSE41: ## BB#0:
; SSE41-NEXT: pmaxsd %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: pmaxsd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3d,0xc1]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_pmaxsd:
; KNL: ## BB#0:
; KNL-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_pmaxsd:
; AVX2: ## BB#0:
; AVX2-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3d,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_pmaxsd:
; SKX: ## BB#0:
; SKX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3d,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
ret <4 x i32> %res
}
@ -191,13 +215,18 @@ declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone
define <4 x i32> @test_x86_sse41_pmaxud(<4 x i32> %a0, <4 x i32> %a1) {
; SSE41-LABEL: test_x86_sse41_pmaxud:
; SSE41: ## BB#0:
; SSE41-NEXT: pmaxud %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: pmaxud %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3f,0xc1]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_pmaxud:
; KNL: ## BB#0:
; KNL-NEXT: vpmaxud %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_pmaxud:
; AVX2: ## BB#0:
; AVX2-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3f,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_pmaxud:
; SKX: ## BB#0:
; SKX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3f,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
ret <4 x i32> %res
}
@ -207,13 +236,18 @@ declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
define <8 x i16> @test_x86_sse41_pmaxuw(<8 x i16> %a0, <8 x i16> %a1) {
; SSE41-LABEL: test_x86_sse41_pmaxuw:
; SSE41: ## BB#0:
; SSE41-NEXT: pmaxuw %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: pmaxuw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3e,0xc1]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_pmaxuw:
; KNL: ## BB#0:
; KNL-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_pmaxuw:
; AVX2: ## BB#0:
; AVX2-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3e,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_pmaxuw:
; SKX: ## BB#0:
; SKX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3e,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -223,13 +257,18 @@ declare <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16>, <8 x i16>) nounwind readnone
define <16 x i8> @test_x86_sse41_pminsb(<16 x i8> %a0, <16 x i8> %a1) {
; SSE41-LABEL: test_x86_sse41_pminsb:
; SSE41: ## BB#0:
; SSE41-NEXT: pminsb %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: pminsb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x38,0xc1]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_pminsb:
; KNL: ## BB#0:
; KNL-NEXT: vpminsb %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_pminsb:
; AVX2: ## BB#0:
; AVX2-NEXT: vpminsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x38,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_pminsb:
; SKX: ## BB#0:
; SKX-NEXT: vpminsb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x38,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}
@ -239,13 +278,18 @@ declare <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8>, <16 x i8>) nounwind readnone
define <4 x i32> @test_x86_sse41_pminsd(<4 x i32> %a0, <4 x i32> %a1) {
; SSE41-LABEL: test_x86_sse41_pminsd:
; SSE41: ## BB#0:
; SSE41-NEXT: pminsd %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: pminsd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x39,0xc1]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_pminsd:
; KNL: ## BB#0:
; KNL-NEXT: vpminsd %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_pminsd:
; AVX2: ## BB#0:
; AVX2-NEXT: vpminsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x39,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_pminsd:
; SKX: ## BB#0:
; SKX-NEXT: vpminsd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x39,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
ret <4 x i32> %res
}
@ -255,13 +299,18 @@ declare <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32>, <4 x i32>) nounwind readnone
define <4 x i32> @test_x86_sse41_pminud(<4 x i32> %a0, <4 x i32> %a1) {
; SSE41-LABEL: test_x86_sse41_pminud:
; SSE41: ## BB#0:
; SSE41-NEXT: pminud %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: pminud %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3b,0xc1]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_pminud:
; KNL: ## BB#0:
; KNL-NEXT: vpminud %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_pminud:
; AVX2: ## BB#0:
; AVX2-NEXT: vpminud %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3b,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_pminud:
; SKX: ## BB#0:
; SKX-NEXT: vpminud %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3b,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
ret <4 x i32> %res
}
@ -271,13 +320,18 @@ declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>) nounwind readnone
define <8 x i16> @test_x86_sse41_pminuw(<8 x i16> %a0, <8 x i16> %a1) {
; SSE41-LABEL: test_x86_sse41_pminuw:
; SSE41: ## BB#0:
; SSE41-NEXT: pminuw %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: pminuw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3a,0xc1]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_pminuw:
; KNL: ## BB#0:
; KNL-NEXT: vpminuw %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_pminuw:
; AVX2: ## BB#0:
; AVX2-NEXT: vpminuw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3a,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_pminuw:
; SKX: ## BB#0:
; SKX-NEXT: vpminuw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3a,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -287,13 +341,18 @@ declare <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16>, <8 x i16>) nounwind readnone
define <2 x i64> @test_x86_sse41_pmuldq(<4 x i32> %a0, <4 x i32> %a1) {
; SSE41-LABEL: test_x86_sse41_pmuldq:
; SSE41: ## BB#0:
; SSE41-NEXT: pmuldq %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: pmuldq %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x28,0xc1]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_pmuldq:
; KNL: ## BB#0:
; KNL-NEXT: vpmuldq %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; AVX2-LABEL: test_x86_sse41_pmuldq:
; AVX2: ## BB#0:
; AVX2-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x28,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse41_pmuldq:
; SKX: ## BB#0:
; SKX-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0xfd,0x08,0x28,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32> %a0, <4 x i32> %a1) ; <<2 x i64>> [#uses=1]
ret <2 x i64> %res
}
@ -303,17 +362,17 @@ declare <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32>, <4 x i32>) nounwind readnone
define i32 @test_x86_sse41_ptestc(<2 x i64> %a0, <2 x i64> %a1) {
; SSE41-LABEL: test_x86_sse41_ptestc:
; SSE41: ## BB#0:
; SSE41-NEXT: ptest %xmm1, %xmm0
; SSE41-NEXT: sbbl %eax, %eax
; SSE41-NEXT: andl $1, %eax
; SSE41-NEXT: retl
; SSE41-NEXT: ptest %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x17,0xc1]
; SSE41-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0]
; SSE41-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_ptestc:
; KNL: ## BB#0:
; KNL-NEXT: vptest %xmm1, %xmm0
; KNL-NEXT: sbbl %eax, %eax
; KNL-NEXT: andl $1, %eax
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_ptestc:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vptest %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x17,0xc1]
; VCHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0]
; VCHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -323,17 +382,17 @@ declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone
define i32 @test_x86_sse41_ptestnzc(<2 x i64> %a0, <2 x i64> %a1) {
; SSE41-LABEL: test_x86_sse41_ptestnzc:
; SSE41: ## BB#0:
; SSE41-NEXT: xorl %eax, %eax
; SSE41-NEXT: ptest %xmm1, %xmm0
; SSE41-NEXT: seta %al
; SSE41-NEXT: retl
; SSE41-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE41-NEXT: ptest %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x17,0xc1]
; SSE41-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_ptestnzc:
; KNL: ## BB#0:
; KNL-NEXT: xorl %eax, %eax
; KNL-NEXT: vptest %xmm1, %xmm0
; KNL-NEXT: seta %al
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_ptestnzc:
; VCHECK: ## BB#0:
; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; VCHECK-NEXT: vptest %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x17,0xc1]
; VCHECK-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -343,17 +402,17 @@ declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone
define i32 @test_x86_sse41_ptestz(<2 x i64> %a0, <2 x i64> %a1) {
; SSE41-LABEL: test_x86_sse41_ptestz:
; SSE41: ## BB#0:
; SSE41-NEXT: xorl %eax, %eax
; SSE41-NEXT: ptest %xmm1, %xmm0
; SSE41-NEXT: sete %al
; SSE41-NEXT: retl
; SSE41-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE41-NEXT: ptest %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x17,0xc1]
; SSE41-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_ptestz:
; KNL: ## BB#0:
; KNL-NEXT: xorl %eax, %eax
; KNL-NEXT: vptest %xmm1, %xmm0
; KNL-NEXT: sete %al
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_ptestz:
; VCHECK: ## BB#0:
; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; VCHECK-NEXT: vptest %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x17,0xc1]
; VCHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1]
ret i32 %res
}
@ -363,13 +422,13 @@ declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
define <2 x double> @test_x86_sse41_round_pd(<2 x double> %a0) {
; SSE41-LABEL: test_x86_sse41_round_pd:
; SSE41: ## BB#0:
; SSE41-NEXT: roundpd $7, %xmm0, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: roundpd $7, %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x09,0xc0,0x07]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_round_pd:
; KNL: ## BB#0:
; KNL-NEXT: vroundpd $7, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_round_pd:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vroundpd $7, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x09,0xc0,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %a0, i32 7) ; <<2 x double>> [#uses=1]
ret <2 x double> %res
}
@ -379,13 +438,13 @@ declare <2 x double> @llvm.x86.sse41.round.pd(<2 x double>, i32) nounwind readno
define <4 x float> @test_x86_sse41_round_ps(<4 x float> %a0) {
; SSE41-LABEL: test_x86_sse41_round_ps:
; SSE41: ## BB#0:
; SSE41-NEXT: roundps $7, %xmm0, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: roundps $7, %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x08,0xc0,0x07]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_round_ps:
; KNL: ## BB#0:
; KNL-NEXT: vroundps $7, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_round_ps:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vroundps $7, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x08,0xc0,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %a0, i32 7) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}
@ -395,13 +454,13 @@ declare <4 x float> @llvm.x86.sse41.round.ps(<4 x float>, i32) nounwind readnone
define <2 x double> @test_x86_sse41_round_sd(<2 x double> %a0, <2 x double> %a1) {
; SSE41-LABEL: test_x86_sse41_round_sd:
; SSE41: ## BB#0:
; SSE41-NEXT: roundsd $7, %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: roundsd $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x0b,0xc1,0x07]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_round_sd:
; KNL: ## BB#0:
; KNL-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_round_sd:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0b,0xc1,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7) ; <<2 x double>> [#uses=1]
ret <2 x double> %res
}
@ -411,13 +470,13 @@ declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) n
define <4 x float> @test_x86_sse41_round_ss(<4 x float> %a0, <4 x float> %a1) {
; SSE41-LABEL: test_x86_sse41_round_ss:
; SSE41: ## BB#0:
; SSE41-NEXT: roundss $7, %xmm1, %xmm0
; SSE41-NEXT: retl
; SSE41-NEXT: roundss $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x0a,0xc1,0x07]
; SSE41-NEXT: retl ## encoding: [0xc3]
;
; KNL-LABEL: test_x86_sse41_round_ss:
; KNL: ## BB#0:
; KNL-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0
; KNL-NEXT: retl
; VCHECK-LABEL: test_x86_sse41_round_ss:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0a,0xc1,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1]
ret <4 x float> %res
}

444
llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll
View File

@ -1,14 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse4.2 | FileCheck %s
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse4.2 -show-mc-encoding | FileCheck %s --check-prefix=SSE42
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX
define i32 @test_x86_sse42_pcmpestri128(<16 x i8> %a0, <16 x i8> %a2) {
; CHECK-LABEL: test_x86_sse42_pcmpestri128:
; CHECK: ## BB#0:
; CHECK-NEXT: movl $7, %eax
; CHECK-NEXT: movl $7, %edx
; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpestri128:
; SSE42: ## BB#0:
; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07]
; SSE42-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpestri128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07]
; VCHECK-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -16,16 +26,38 @@ declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nou
define i32 @test_x86_sse42_pcmpestri128_load(<16 x i8>* %a0, <16 x i8>* %a2) {
; CHECK-LABEL: test_x86_sse42_pcmpestri128_load:
; CHECK: ## BB#0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movdqa (%eax), %xmm0
; CHECK-NEXT: movl $7, %eax
; CHECK-NEXT: movl $7, %edx
; CHECK-NEXT: pcmpestri $7, (%ecx), %xmm0
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpestri128_load:
; SSE42: ## BB#0:
; SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; SSE42-NEXT: movdqa (%eax), %xmm0 ## encoding: [0x66,0x0f,0x6f,0x00]
; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; SSE42-NEXT: pcmpestri $7, (%ecx), %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0x01,0x07]
; SSE42-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; AVX2-LABEL: test_x86_sse42_pcmpestri128_load:
; AVX2: ## BB#0:
; AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; AVX2-NEXT: vmovdqa (%eax), %xmm0 ## encoding: [0xc5,0xf9,0x6f,0x00]
; AVX2-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; AVX2-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; AVX2-NEXT: vpcmpestri $7, (%ecx), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0x01,0x07]
; AVX2-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse42_pcmpestri128_load:
; SKX: ## BB#0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; SKX-NEXT: vmovdqu8 (%eax), %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x6f,0x00]
; SKX-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SKX-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; SKX-NEXT: vpcmpestri $7, (%ecx), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0x01,0x07]
; SKX-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8]
; SKX-NEXT: retl ## encoding: [0xc3]
%1 = load <16 x i8>, <16 x i8>* %a0
%2 = load <16 x i8>, <16 x i8>* %a2
%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %1, i32 7, <16 x i8> %2, i32 7, i8 7) ; <i32> [#uses=1]
@ -34,17 +66,29 @@ define i32 @test_x86_sse42_pcmpestri128_load(<16 x i8>* %a0, <16 x i8>* %a2) {
define i32 @test_x86_sse42_pcmpestria128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
; CHECK-LABEL: test_x86_sse42_pcmpestria128:
; CHECK: ## BB#0:
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: movl $7, %eax
; CHECK-NEXT: movl $7, %edx
; CHECK-NEXT: xorl %ebx, %ebx
; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
; CHECK-NEXT: seta %bl
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: popl %ebx
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpestria128:
; SSE42: ## BB#0:
; SSE42-NEXT: pushl %ebx ## encoding: [0x53]
; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; SSE42-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb]
; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07]
; SSE42-NEXT: seta %bl ## encoding: [0x0f,0x97,0xc3]
; SSE42-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8]
; SSE42-NEXT: popl %ebx ## encoding: [0x5b]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpestria128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: pushl %ebx ## encoding: [0x53]
; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb]
; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07]
; VCHECK-NEXT: seta %bl ## encoding: [0x0f,0x97,0xc3]
; VCHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8]
; VCHECK-NEXT: popl %ebx ## encoding: [0x5b]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -52,14 +96,23 @@ declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) no
define i32 @test_x86_sse42_pcmpestric128(<16 x i8> %a0, <16 x i8> %a2) {
; CHECK-LABEL: test_x86_sse42_pcmpestric128:
; CHECK: ## BB#0:
; CHECK-NEXT: movl $7, %eax
; CHECK-NEXT: movl $7, %edx
; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
; CHECK-NEXT: sbbl %eax, %eax
; CHECK-NEXT: andl $1, %eax
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpestric128:
; SSE42: ## BB#0:
; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07]
; SSE42-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0]
; SSE42-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpestric128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07]
; VCHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0]
; VCHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -67,17 +120,29 @@ declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) no
define i32 @test_x86_sse42_pcmpestrio128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
; CHECK-LABEL: test_x86_sse42_pcmpestrio128:
; CHECK: ## BB#0:
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: movl $7, %eax
; CHECK-NEXT: movl $7, %edx
; CHECK-NEXT: xorl %ebx, %ebx
; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
; CHECK-NEXT: seto %bl
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: popl %ebx
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpestrio128:
; SSE42: ## BB#0:
; SSE42-NEXT: pushl %ebx ## encoding: [0x53]
; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; SSE42-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb]
; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07]
; SSE42-NEXT: seto %bl ## encoding: [0x0f,0x90,0xc3]
; SSE42-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8]
; SSE42-NEXT: popl %ebx ## encoding: [0x5b]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpestrio128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: pushl %ebx ## encoding: [0x53]
; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb]
; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07]
; VCHECK-NEXT: seto %bl ## encoding: [0x0f,0x90,0xc3]
; VCHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8]
; VCHECK-NEXT: popl %ebx ## encoding: [0x5b]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -85,17 +150,29 @@ declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) no
define i32 @test_x86_sse42_pcmpestris128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
; CHECK-LABEL: test_x86_sse42_pcmpestris128:
; CHECK: ## BB#0:
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: movl $7, %eax
; CHECK-NEXT: movl $7, %edx
; CHECK-NEXT: xorl %ebx, %ebx
; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
; CHECK-NEXT: sets %bl
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: popl %ebx
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpestris128:
; SSE42: ## BB#0:
; SSE42-NEXT: pushl %ebx ## encoding: [0x53]
; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; SSE42-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb]
; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07]
; SSE42-NEXT: sets %bl ## encoding: [0x0f,0x98,0xc3]
; SSE42-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8]
; SSE42-NEXT: popl %ebx ## encoding: [0x5b]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpestris128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: pushl %ebx ## encoding: [0x53]
; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb]
; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07]
; VCHECK-NEXT: sets %bl ## encoding: [0x0f,0x98,0xc3]
; VCHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8]
; VCHECK-NEXT: popl %ebx ## encoding: [0x5b]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -103,17 +180,29 @@ declare i32 @llvm.x86.sse42.pcmpestris128(<16 x i8>, i32, <16 x i8>, i32, i8) no
define i32 @test_x86_sse42_pcmpestriz128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
; CHECK-LABEL: test_x86_sse42_pcmpestriz128:
; CHECK: ## BB#0:
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: movl $7, %eax
; CHECK-NEXT: movl $7, %edx
; CHECK-NEXT: xorl %ebx, %ebx
; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
; CHECK-NEXT: sete %bl
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: popl %ebx
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpestriz128:
; SSE42: ## BB#0:
; SSE42-NEXT: pushl %ebx ## encoding: [0x53]
; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; SSE42-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb]
; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07]
; SSE42-NEXT: sete %bl ## encoding: [0x0f,0x94,0xc3]
; SSE42-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8]
; SSE42-NEXT: popl %ebx ## encoding: [0x5b]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpestriz128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: pushl %ebx ## encoding: [0x53]
; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb]
; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07]
; VCHECK-NEXT: sete %bl ## encoding: [0x0f,0x94,0xc3]
; VCHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8]
; VCHECK-NEXT: popl %ebx ## encoding: [0x5b]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -121,12 +210,19 @@ declare i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8>, i32, <16 x i8>, i32, i8) no
define <16 x i8> @test_x86_sse42_pcmpestrm128(<16 x i8> %a0, <16 x i8> %a2) {
; CHECK-LABEL: test_x86_sse42_pcmpestrm128:
; CHECK: ## BB#0:
; CHECK-NEXT: movl $7, %eax
; CHECK-NEXT: movl $7, %edx
; CHECK-NEXT: pcmpestrm $7, %xmm1, %xmm0
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpestrm128:
; SSE42: ## BB#0:
; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; SSE42-NEXT: pcmpestrm $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x60,0xc1,0x07]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpestrm128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: vpcmpestrm $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x60,0xc1,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}
@ -134,13 +230,21 @@ declare <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8>, i32, <16 x i8>, i32, i
define <16 x i8> @test_x86_sse42_pcmpestrm128_load(<16 x i8> %a0, <16 x i8>* %a2) {
; CHECK-LABEL: test_x86_sse42_pcmpestrm128_load:
; CHECK: ## BB#0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl $7, %eax
; CHECK-NEXT: movl $7, %edx
; CHECK-NEXT: pcmpestrm $7, (%ecx), %xmm0
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpestrm128_load:
; SSE42: ## BB#0:
; SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; SSE42-NEXT: pcmpestrm $7, (%ecx), %xmm0 ## encoding: [0x66,0x0f,0x3a,0x60,0x01,0x07]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpestrm128_load:
; VCHECK: ## BB#0:
; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00]
; VCHECK-NEXT: vpcmpestrm $7, (%ecx), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x60,0x01,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%1 = load <16 x i8>, <16 x i8>* %a2
%res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %a0, i32 7, <16 x i8> %1, i32 7, i8 7) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
@ -148,11 +252,17 @@ define <16 x i8> @test_x86_sse42_pcmpestrm128_load(<16 x i8> %a0, <16 x i8>* %a2
define i32 @test_x86_sse42_pcmpistri128(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_x86_sse42_pcmpistri128:
; CHECK: ## BB#0:
; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpistri128:
; SSE42: ## BB#0:
; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07]
; SSE42-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpistri128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07]
; VCHECK-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -160,14 +270,32 @@ declare i32 @llvm.x86.sse42.pcmpistri128(<16 x i8>, <16 x i8>, i8) nounwind read
define i32 @test_x86_sse42_pcmpistri128_load(<16 x i8>* %a0, <16 x i8>* %a1) {
; CHECK-LABEL: test_x86_sse42_pcmpistri128_load:
; CHECK: ## BB#0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movdqa (%ecx), %xmm0
; CHECK-NEXT: pcmpistri $7, (%eax), %xmm0
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpistri128_load:
; SSE42: ## BB#0:
; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
; SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
; SSE42-NEXT: movdqa (%ecx), %xmm0 ## encoding: [0x66,0x0f,0x6f,0x01]
; SSE42-NEXT: pcmpistri $7, (%eax), %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0x00,0x07]
; SSE42-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; AVX2-LABEL: test_x86_sse42_pcmpistri128_load:
; AVX2: ## BB#0:
; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
; AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
; AVX2-NEXT: vmovdqa (%ecx), %xmm0 ## encoding: [0xc5,0xf9,0x6f,0x01]
; AVX2-NEXT: vpcmpistri $7, (%eax), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0x00,0x07]
; AVX2-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_sse42_pcmpistri128_load:
; SKX: ## BB#0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
; SKX-NEXT: vmovdqu8 (%ecx), %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x6f,0x01]
; SKX-NEXT: vpcmpistri $7, (%eax), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0x00,0x07]
; SKX-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8]
; SKX-NEXT: retl ## encoding: [0xc3]
%1 = load <16 x i8>, <16 x i8>* %a0
%2 = load <16 x i8>, <16 x i8>* %a1
%res = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %1, <16 x i8> %2, i8 7) ; <i32> [#uses=1]
@ -176,12 +304,19 @@ define i32 @test_x86_sse42_pcmpistri128_load(<16 x i8>* %a0, <16 x i8>* %a1) {
define i32 @test_x86_sse42_pcmpistria128(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_x86_sse42_pcmpistria128:
; CHECK: ## BB#0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0
; CHECK-NEXT: seta %al
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpistria128:
; SSE42: ## BB#0:
; SSE42-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07]
; SSE42-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpistria128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07]
; VCHECK-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpistria128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -189,12 +324,19 @@ declare i32 @llvm.x86.sse42.pcmpistria128(<16 x i8>, <16 x i8>, i8) nounwind rea
define i32 @test_x86_sse42_pcmpistric128(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_x86_sse42_pcmpistric128:
; CHECK: ## BB#0:
; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0
; CHECK-NEXT: sbbl %eax, %eax
; CHECK-NEXT: andl $1, %eax
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpistric128:
; SSE42: ## BB#0:
; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07]
; SSE42-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0]
; SSE42-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpistric128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07]
; VCHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0]
; VCHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpistric128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -202,12 +344,19 @@ declare i32 @llvm.x86.sse42.pcmpistric128(<16 x i8>, <16 x i8>, i8) nounwind rea
define i32 @test_x86_sse42_pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_x86_sse42_pcmpistrio128:
; CHECK: ## BB#0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0
; CHECK-NEXT: seto %al
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpistrio128:
; SSE42: ## BB#0:
; SSE42-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07]
; SSE42-NEXT: seto %al ## encoding: [0x0f,0x90,0xc0]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpistrio128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07]
; VCHECK-NEXT: seto %al ## encoding: [0x0f,0x90,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -215,12 +364,19 @@ declare i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8>, <16 x i8>, i8) nounwind rea
define i32 @test_x86_sse42_pcmpistris128(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_x86_sse42_pcmpistris128:
; CHECK: ## BB#0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0
; CHECK-NEXT: sets %al
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpistris128:
; SSE42: ## BB#0:
; SSE42-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07]
; SSE42-NEXT: sets %al ## encoding: [0x0f,0x98,0xc0]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpistris128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07]
; VCHECK-NEXT: sets %al ## encoding: [0x0f,0x98,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpistris128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -228,12 +384,19 @@ declare i32 @llvm.x86.sse42.pcmpistris128(<16 x i8>, <16 x i8>, i8) nounwind rea
define i32 @test_x86_sse42_pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_x86_sse42_pcmpistriz128:
; CHECK: ## BB#0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0
; CHECK-NEXT: sete %al
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpistriz128:
; SSE42: ## BB#0:
; SSE42-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07]
; SSE42-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpistriz128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07]
; VCHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1]
ret i32 %res
}
@ -241,10 +404,15 @@ declare i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8>, <16 x i8>, i8) nounwind rea
define <16 x i8> @test_x86_sse42_pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_x86_sse42_pcmpistrm128:
; CHECK: ## BB#0:
; CHECK-NEXT: pcmpistrm $7, %xmm1, %xmm0
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpistrm128:
; SSE42: ## BB#0:
; SSE42-NEXT: pcmpistrm $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x62,0xc1,0x07]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpistrm128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vpcmpistrm $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x62,0xc1,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}
@ -252,11 +420,17 @@ declare <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8>, <16 x i8>, i8) nounwin
define <16 x i8> @test_x86_sse42_pcmpistrm128_load(<16 x i8> %a0, <16 x i8>* %a1) {
; CHECK-LABEL: test_x86_sse42_pcmpistrm128_load:
; CHECK: ## BB#0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: pcmpistrm $7, (%eax), %xmm0
; CHECK-NEXT: retl
; SSE42-LABEL: test_x86_sse42_pcmpistrm128_load:
; SSE42: ## BB#0:
; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; SSE42-NEXT: pcmpistrm $7, (%eax), %xmm0 ## encoding: [0x66,0x0f,0x3a,0x62,0x00,0x07]
; SSE42-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_sse42_pcmpistrm128_load:
; VCHECK: ## BB#0:
; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
; VCHECK-NEXT: vpcmpistrm $7, (%eax), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x62,0x00,0x07]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%1 = load <16 x i8>, <16 x i8>* %a1
%res = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %a0, <16 x i8> %1, i8 7) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res

185
llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll
View File

@ -1,7 +1,23 @@
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+ssse3 | FileCheck %s
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+ssse3 -show-mc-encoding | FileCheck %s --check-prefix=SSE
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX
define <16 x i8> @test_x86_ssse3_pabs_b_128(<16 x i8> %a0) {
; CHECK: pabsb
; SSE-LABEL: test_x86_ssse3_pabs_b_128:
; SSE: ## BB#0:
; SSE-NEXT: pabsb %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x38,0x1c,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; AVX2-LABEL: test_x86_ssse3_pabs_b_128:
; AVX2: ## BB#0:
; AVX2-NEXT: vpabsb %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x1c,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_ssse3_pabs_b_128:
; SKX: ## BB#0:
; SKX-NEXT: vpabsb %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x1c,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}
@ -9,7 +25,20 @@ declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone
define <4 x i32> @test_x86_ssse3_pabs_d_128(<4 x i32> %a0) {
; CHECK: pabsd
; SSE-LABEL: test_x86_ssse3_pabs_d_128:
; SSE: ## BB#0:
; SSE-NEXT: pabsd %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x38,0x1e,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; AVX2-LABEL: test_x86_ssse3_pabs_d_128:
; AVX2: ## BB#0:
; AVX2-NEXT: vpabsd %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x1e,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_ssse3_pabs_d_128:
; SKX: ## BB#0:
; SKX-NEXT: vpabsd %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x1e,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1]
ret <4 x i32> %res
}
@ -17,7 +46,20 @@ declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone
define <8 x i16> @test_x86_ssse3_pabs_w_128(<8 x i16> %a0) {
; CHECK: pabsw
; SSE-LABEL: test_x86_ssse3_pabs_w_128:
; SSE: ## BB#0:
; SSE-NEXT: pabsw %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x38,0x1d,0xc0]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; AVX2-LABEL: test_x86_ssse3_pabs_w_128:
; AVX2: ## BB#0:
; AVX2-NEXT: vpabsw %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x1d,0xc0]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_ssse3_pabs_w_128:
; SKX: ## BB#0:
; SKX-NEXT: vpabsw %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x1d,0xc0]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16> %a0) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -25,7 +67,15 @@ declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone
define <4 x i32> @test_x86_ssse3_phadd_d_128(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK: phaddd
; SSE-LABEL: test_x86_ssse3_phadd_d_128:
; SSE: ## BB#0:
; SSE-NEXT: phaddd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x02,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_ssse3_phadd_d_128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vphaddd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x02,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
ret <4 x i32> %res
}
@ -33,7 +83,15 @@ declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind rea
define <8 x i16> @test_x86_ssse3_phadd_sw_128(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK: phaddsw
; SSE-LABEL: test_x86_ssse3_phadd_sw_128:
; SSE: ## BB#0:
; SSE-NEXT: phaddsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x03,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_ssse3_phadd_sw_128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x03,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -41,7 +99,15 @@ declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind re
define <8 x i16> @test_x86_ssse3_phadd_w_128(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK: phaddw
; SSE-LABEL: test_x86_ssse3_phadd_w_128:
; SSE: ## BB#0:
; SSE-NEXT: phaddw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x01,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_ssse3_phadd_w_128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vphaddw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x01,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -49,7 +115,15 @@ declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind rea
define <4 x i32> @test_x86_ssse3_phsub_d_128(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK: phsubd
; SSE-LABEL: test_x86_ssse3_phsub_d_128:
; SSE: ## BB#0:
; SSE-NEXT: phsubd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x06,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_ssse3_phsub_d_128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vphsubd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x06,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
ret <4 x i32> %res
}
@ -57,7 +131,15 @@ declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind rea
define <8 x i16> @test_x86_ssse3_phsub_sw_128(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK: phsubsw
; SSE-LABEL: test_x86_ssse3_phsub_sw_128:
; SSE: ## BB#0:
; SSE-NEXT: phsubsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x07,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_ssse3_phsub_sw_128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x07,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -65,7 +147,15 @@ declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind re
define <8 x i16> @test_x86_ssse3_phsub_w_128(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK: phsubw
; SSE-LABEL: test_x86_ssse3_phsub_w_128:
; SSE: ## BB#0:
; SSE-NEXT: phsubw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x05,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_ssse3_phsub_w_128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vphsubw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x05,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -73,7 +163,20 @@ declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind rea
define <8 x i16> @test_x86_ssse3_pmadd_ub_sw_128(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK: pmaddubsw
; SSE-LABEL: test_x86_ssse3_pmadd_ub_sw_128:
; SSE: ## BB#0:
; SSE-NEXT: pmaddubsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x04,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; AVX2-LABEL: test_x86_ssse3_pmadd_ub_sw_128:
; AVX2: ## BB#0:
; AVX2-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x04,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_ssse3_pmadd_ub_sw_128:
; SKX: ## BB#0:
; SKX-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x04,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8> %a0, <16 x i8> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -81,7 +184,20 @@ declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind
define <8 x i16> @test_x86_ssse3_pmul_hr_sw_128(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK: pmulhrsw
; SSE-LABEL: test_x86_ssse3_pmul_hr_sw_128:
; SSE: ## BB#0:
; SSE-NEXT: pmulhrsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x0b,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; AVX2-LABEL: test_x86_ssse3_pmul_hr_sw_128:
; AVX2: ## BB#0:
; AVX2-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0b,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_ssse3_pmul_hr_sw_128:
; SKX: ## BB#0:
; SKX-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x0b,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@ -89,7 +205,20 @@ declare <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16>, <8 x i16>) nounwind
define <16 x i8> @test_x86_ssse3_pshuf_b_128(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK: pshufb
; SSE-LABEL: test_x86_ssse3_pshuf_b_128:
; SSE: ## BB#0:
; SSE-NEXT: pshufb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x00,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; AVX2-LABEL: test_x86_ssse3_pshuf_b_128:
; AVX2: ## BB#0:
; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x00,0xc1]
; AVX2-NEXT: retl ## encoding: [0xc3]
;
; SKX-LABEL: test_x86_ssse3_pshuf_b_128:
; SKX: ## BB#0:
; SKX-NEXT: vpshufb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x00,0xc1]
; SKX-NEXT: retl ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}
@ -97,7 +226,15 @@ declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind rea
define <16 x i8> @test_x86_ssse3_psign_b_128(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK: psignb
; SSE-LABEL: test_x86_ssse3_psign_b_128:
; SSE: ## BB#0:
; SSE-NEXT: psignb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x08,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_ssse3_psign_b_128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vpsignb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x08,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}
@ -105,7 +242,15 @@ declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind rea
define <4 x i32> @test_x86_ssse3_psign_d_128(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK: psignd
; SSE-LABEL: test_x86_ssse3_psign_d_128:
; SSE: ## BB#0:
; SSE-NEXT: psignd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x0a,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_ssse3_psign_d_128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vpsignd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0a,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
ret <4 x i32> %res
}
@ -113,7 +258,15 @@ declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind rea
define <8 x i16> @test_x86_ssse3_psign_w_128(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK: psignw
; SSE-LABEL: test_x86_ssse3_psign_w_128:
; SSE: ## BB#0:
; SSE-NEXT: psignw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x09,0xc1]
; SSE-NEXT: retl ## encoding: [0xc3]
;
; VCHECK-LABEL: test_x86_ssse3_psign_w_128:
; VCHECK: ## BB#0:
; VCHECK-NEXT: vpsignw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x09,0xc1]
; VCHECK-NEXT: retl ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.ssse3.psign.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}