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Cosmetic change, better reflects actual values 

llvm-svn: 24562
This commit is contained in:
Nate Begeman 2005-12-01 04:48:26 +00:00
parent bd099102f0
commit aa5f8f2a26
1 changed files with 5 additions and 6 deletions
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11
llvm/lib/Target/PowerPC/PPCRegisterInfo.td
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@ -28,8 +28,8 @@ class GP8<GPR Alias> : PPCReg<Alias.Name> {
} }
// SPR - One of the 32-bit special-purpose registers // SPR - One of the 32-bit special-purpose registers
class SPR<bits<5> num, string n> : PPCReg<n> { class SPR<bits<10> num, string n> : PPCReg<n> {
field bits<5> Num = num; field bits<10> Num = num;
} }
// FPR - One of the 32 64-bit floating-point registers // FPR - One of the 32 64-bit floating-point registers
@ -126,12 +126,11 @@ def CR4 : CR<4, "cr4">; def CR5 : CR<5, "cr5">;
def CR6 : CR<6, "cr6">; def CR7 : CR<7, "cr7">; def CR6 : CR<6, "cr6">; def CR7 : CR<7, "cr7">;
// Link register // Link register
// FIXME: encode actual spr numbers here def LR : SPR<8, "lr">;
def LR : SPR<2, "lr">;
// Count register // Count register
def CTR : SPR<3, "ctr">; def CTR : SPR<9, "ctr">;
// VRsave register // VRsave register
def VRSAVE: SPR<4, "VRsave">; def VRSAVE: SPR<256, "VRsave">;
/// Register classes /// Register classes
// Allocate volatiles first // Allocate volatiles first