Doxygen comments for prfchwintrin.h
Added doxygen comments to prfchwintrin.h's intrinsics. Note: The doxygen comments are automatically generated based on Sony's intrinsic s document. I got an OK from Eric Christopher to commit doxygen comments without prior code review upstream. llvm-svn: 293745
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#define __PRFCHWINTRIN_H
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#define __PRFCHWINTRIN_H
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#if defined(__PRFCHW__) || defined(__3dNOW__)
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#if defined(__PRFCHW__) || defined(__3dNOW__)
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/// \brief Loads a memory sequence containing the specified memory address into
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/// all data cache levels. The cache-coherency state is set to exclusive.
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/// Data can be read from and written to the cache line without additional
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/// delay.
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the \c PREFETCHT0 instruction.
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///
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/// \param __P
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/// A pointer specifying the memory address to be prefetched.
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static __inline__ void __attribute__((__always_inline__, __nodebug__))
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static __inline__ void __attribute__((__always_inline__, __nodebug__))
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_m_prefetch(void *__P)
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_m_prefetch(void *__P)
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{
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{
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__builtin_prefetch (__P, 0, 3 /* _MM_HINT_T0 */);
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__builtin_prefetch (__P, 0, 3 /* _MM_HINT_T0 */);
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}
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}
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/// \brief Loads a memory sequence containing the specified memory address into
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/// the L1 data cache and sets the cache-coherency to modified. This
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/// provides a hint to the processor that the cache line will be modified.
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/// It is intended for use when the cache line will be written to shortly
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/// after the prefetch is performed. Note that the effect of this intrinsic
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/// is dependent on the processor implementation.
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the \c PREFETCHW instruction.
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///
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/// \param __P
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/// A pointer specifying the memory address to be prefetched.
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static __inline__ void __attribute__((__always_inline__, __nodebug__))
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static __inline__ void __attribute__((__always_inline__, __nodebug__))
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_m_prefetchw(void *__P)
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_m_prefetchw(void *__P)
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{
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{
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