OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity

[lldb] Improve qemu interop for aarch64 

qemu calls the "fp" and "lr" registers via their generic names
(x29/x30). This mismatch manifested itself as not being able to unwind
or display values of some local variables.
This commit is contained in:
Pavel Labath 2020-09-15 13:20:09 +02:00
parent 0a2213c6eb
commit af3789a188
4 changed files with 105 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
View File

@ -33,6 +33,12 @@ ABIAArch64::GetEHAndDWARFNums(llvm::StringRef name) {
return MCBasedABI::GetEHAndDWARFNums(name);
}
std::string ABIAArch64::GetMCName(std::string reg) {
MapRegisterName(reg, "v", "q");
MapRegisterName(reg, "x29", "fp");
MapRegisterName(reg, "x30", "lr");
return reg;
}
uint32_t ABIAArch64::GetGenericNum(llvm::StringRef name) {
return llvm::StringSwitch<uint32_t>(name)
.Case("pc", LLDB_REGNUM_GENERIC_PC)

5
lldb/source/Plugins/ABI/AArch64/ABIAArch64.h
View File

@ -20,10 +20,7 @@ protected:
std::pair<uint32_t, uint32_t>
GetEHAndDWARFNums(llvm::StringRef name) override;
std::string GetMCName(std::string reg) override {
MapRegisterName(reg, "v", "q");
return reg;
}
std::string GetMCName(std::string reg) override;
uint32_t GetGenericNum(llvm::StringRef name) override;

73
lldb/test/API/functionalities/gdb_remote_client/TestQemuAArch64TargetXml.py Normal file
View File

@ -0,0 +1,73 @@
from lldbsuite.test.lldbtest import *
from lldbsuite.test.decorators import *
from gdbclientutils import *
from textwrap import dedent
class MyResponder(MockGDBServerResponder):
def qXferRead(self, obj, annex, offset, length):
if annex == "target.xml":
return dedent("""\
<?xml version="1.0"?>
<target version="1.0">
<architecture>aarch64</architecture>
<feature name="org.gnu.gdb.aarch64.core">
<reg name="x0" bitsize="64"/>
<reg name="x1" bitsize="64"/>
<reg name="x2" bitsize="64"/>
<reg name="x3" bitsize="64"/>
<reg name="x4" bitsize="64"/>
<reg name="x5" bitsize="64"/>
<reg name="x6" bitsize="64"/>
<reg name="x7" bitsize="64"/>
<reg name="x8" bitsize="64"/>
<reg name="x9" bitsize="64"/>
<reg name="x10" bitsize="64"/>
<reg name="x11" bitsize="64"/>
<reg name="x12" bitsize="64"/>
<reg name="x13" bitsize="64"/>
<reg name="x14" bitsize="64"/>
<reg name="x15" bitsize="64"/>
<reg name="x16" bitsize="64"/>
<reg name="x17" bitsize="64"/>
<reg name="x18" bitsize="64"/>
<reg name="x19" bitsize="64"/>
<reg name="x20" bitsize="64"/>
<reg name="x21" bitsize="64"/>
<reg name="x22" bitsize="64"/>
<reg name="x23" bitsize="64"/>
<reg name="x24" bitsize="64"/>
<reg name="x25" bitsize="64"/>
<reg name="x26" bitsize="64"/>
<reg name="x27" bitsize="64"/>
<reg name="x28" bitsize="64"/>
<reg name="x29" bitsize="64"/>
<reg name="x30" bitsize="64"/>
<reg name="sp" bitsize="64"/>
<reg name="pc" bitsize="64"/>
</feature>
</target>
"""), False
else:
return None, False
class TestQemuAarch64TargetXml(GDBRemoteTestBase):
@skipIfXmlSupportMissing
@skipIfRemote
@skipIfLLVMTargetMissing("AArch64")
def test_register_augmentation(self):
"""
Test that we correctly associate the register info with the eh_frame
register numbers.
"""
target = self.createTarget("basic_eh_frame-aarch64.yaml")
self.server.responder = MyResponder()
process = self.connect(target)
lldbutil.expect_state_changes(self, self.dbg.GetListener(), process,
[lldb.eStateStopped])
self.filecheck("image show-unwind -n foo", __file__,
"--check-prefix=UNWIND")
# UNWIND: eh_frame UnwindPlan:
# UNWIND: row[0]: 0: CFA=x29+16 => x30=[CFA-8]

25
lldb/test/API/functionalities/gdb_remote_client/basic_eh_frame-aarch64.yaml Normal file
View File

@ -0,0 +1,25 @@
--- !ELF
FileHeader:
Class: ELFCLASS64
Data: ELFDATA2LSB
Type: ET_EXEC
Machine: EM_AARCH64
Sections:
- Name: .text
Type: SHT_PROGBITS
Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
Address: 0x0000000000401000
AddressAlign: 0x0000000000000001
Content: DEADBEEF
- Name: .eh_frame
Type: SHT_PROGBITS
Flags: [ SHF_ALLOC ]
Address: 0x0000000000402000
AddressAlign: 0x0000000000000008
Content: 0c000000000000000100017C1E0000001c0000001400000000104000000000000100000000000000000C1d109e820000
Symbols:
- Name: foo
Section: .text
Binding: STB_GLOBAL
Value: 0x0000000000401000
...