[lldb] Improve qemu interop for aarch64
qemu calls the "fp" and "lr" registers via their generic names (x29/x30). This mismatch manifested itself as not being able to unwind or display values of some local variables.
This commit is contained in:
Pavel Labath
parent
0a2213c6eb
commit
af3789a188
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@ -33,6 +33,12 @@ ABIAArch64::GetEHAndDWARFNums(llvm::StringRef name) {
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return MCBasedABI::GetEHAndDWARFNums(name);
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return MCBasedABI::GetEHAndDWARFNums(name);
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}
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}
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std::string ABIAArch64::GetMCName(std::string reg) {
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MapRegisterName(reg, "v", "q");
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MapRegisterName(reg, "x29", "fp");
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MapRegisterName(reg, "x30", "lr");
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return reg;
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}
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uint32_t ABIAArch64::GetGenericNum(llvm::StringRef name) {
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uint32_t ABIAArch64::GetGenericNum(llvm::StringRef name) {
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return llvm::StringSwitch<uint32_t>(name)
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return llvm::StringSwitch<uint32_t>(name)
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.Case("pc", LLDB_REGNUM_GENERIC_PC)
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.Case("pc", LLDB_REGNUM_GENERIC_PC)
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@ -20,10 +20,7 @@ protected:
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std::pair<uint32_t, uint32_t>
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std::pair<uint32_t, uint32_t>
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GetEHAndDWARFNums(llvm::StringRef name) override;
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GetEHAndDWARFNums(llvm::StringRef name) override;
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std::string GetMCName(std::string reg) override {
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std::string GetMCName(std::string reg) override;
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MapRegisterName(reg, "v", "q");
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return reg;
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}
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uint32_t GetGenericNum(llvm::StringRef name) override;
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uint32_t GetGenericNum(llvm::StringRef name) override;
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@ -0,0 +1,73 @@
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from lldbsuite.test.lldbtest import *
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from lldbsuite.test.decorators import *
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from gdbclientutils import *
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from textwrap import dedent
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class MyResponder(MockGDBServerResponder):
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def qXferRead(self, obj, annex, offset, length):
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if annex == "target.xml":
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return dedent("""\
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<?xml version="1.0"?>
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<target version="1.0">
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<architecture>aarch64</architecture>
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<feature name="org.gnu.gdb.aarch64.core">
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<reg name="x0" bitsize="64"/>
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<reg name="x1" bitsize="64"/>
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<reg name="x2" bitsize="64"/>
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<reg name="x3" bitsize="64"/>
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<reg name="x4" bitsize="64"/>
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<reg name="x5" bitsize="64"/>
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<reg name="x6" bitsize="64"/>
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<reg name="x7" bitsize="64"/>
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<reg name="x8" bitsize="64"/>
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<reg name="x9" bitsize="64"/>
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<reg name="x10" bitsize="64"/>
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<reg name="x11" bitsize="64"/>
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<reg name="x12" bitsize="64"/>
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<reg name="x13" bitsize="64"/>
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<reg name="x14" bitsize="64"/>
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<reg name="x15" bitsize="64"/>
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<reg name="x16" bitsize="64"/>
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<reg name="x17" bitsize="64"/>
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<reg name="x18" bitsize="64"/>
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<reg name="x19" bitsize="64"/>
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<reg name="x20" bitsize="64"/>
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<reg name="x21" bitsize="64"/>
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<reg name="x22" bitsize="64"/>
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<reg name="x23" bitsize="64"/>
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<reg name="x24" bitsize="64"/>
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<reg name="x25" bitsize="64"/>
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<reg name="x26" bitsize="64"/>
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<reg name="x27" bitsize="64"/>
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<reg name="x28" bitsize="64"/>
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<reg name="x29" bitsize="64"/>
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<reg name="x30" bitsize="64"/>
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<reg name="sp" bitsize="64"/>
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<reg name="pc" bitsize="64"/>
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</feature>
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</target>
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"""), False
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else:
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return None, False
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class TestQemuAarch64TargetXml(GDBRemoteTestBase):
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@skipIfXmlSupportMissing
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@skipIfRemote
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@skipIfLLVMTargetMissing("AArch64")
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def test_register_augmentation(self):
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"""
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Test that we correctly associate the register info with the eh_frame
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register numbers.
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"""
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target = self.createTarget("basic_eh_frame-aarch64.yaml")
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self.server.responder = MyResponder()
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process = self.connect(target)
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lldbutil.expect_state_changes(self, self.dbg.GetListener(), process,
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[lldb.eStateStopped])
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self.filecheck("image show-unwind -n foo", __file__,
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"--check-prefix=UNWIND")
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# UNWIND: eh_frame UnwindPlan:
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# UNWIND: row[0]: 0: CFA=x29+16 => x30=[CFA-8]
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@ -0,0 +1,25 @@
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--- !ELF
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FileHeader:
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Class: ELFCLASS64
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Data: ELFDATA2LSB
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Type: ET_EXEC
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Machine: EM_AARCH64
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Sections:
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- Name: .text
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Type: SHT_PROGBITS
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Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
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Address: 0x0000000000401000
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AddressAlign: 0x0000000000000001
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Content: DEADBEEF
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- Name: .eh_frame
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Type: SHT_PROGBITS
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Flags: [ SHF_ALLOC ]
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Address: 0x0000000000402000
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AddressAlign: 0x0000000000000008
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Content: 0c000000000000000100017C1E0000001c0000001400000000104000000000000100000000000000000C1d109e820000
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Symbols:
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- Name: foo
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Section: .text
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Binding: STB_GLOBAL
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Value: 0x0000000000401000
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...
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