Implement the Sparc JIT interfaces, including relocation support.
llvm-svn: 18120
This commit is contained in:
Chris Lattner
parent
f251eec757
commit
b098ce7c8e
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//===-- SparcJITInfo.cpp - Implement the JIT interfaces for SparcV9 -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the JIT interfaces for the SparcV9 target.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "jit"
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#include "SparcV9JITInfo.h"
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#include "SparcV9Relocations.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/Config/alloca.h"
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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/// JITCompilerFunction - This contains the address of the JIT function used to
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/// compile a function lazily.
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static TargetJITInfo::JITCompilerFn JITCompilerFunction;
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/// BUILD_SETHI/BUILD_ORI/BUILD_BA/BUILD_CALL - These macros build sparc machine
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/// instructions using lots of magic defined by the Sparc ISA.
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#define BUILD_SETHI(RD, C) (((RD) << 25) | (4 << 22) | (C & ((1 << 22)-1)))
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#define BUILD_ORI(RS, C, RD) ((2 << 30) | (RD << 25) | (2 << 19) | (RS << 14) |\
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(1 << 13) | (C & ((1 << 12)-1)))
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#define BUILD_BA(DISP) ((8 << 25) | (2 << 22) | (DISP & ((1 << 22)-1)))
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#define BUILD_CALL(OFFSET) ((1 << 30) | (OFFSET & (1 << 30)-1))
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static void InsertJumpAtAddr(int64_t JumpTarget, unsigned *Addr) {
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// If the target function is close enough to fit into the 19bit disp of
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// BA, we should use this version, as it's much cheaper to generate.
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int64_t BranchTarget = (JumpTarget-(intptr_t)Addr) >> 2;
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if (BranchTarget < (1 << 19) && BranchTarget > -(1 << 19)) {
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// ba <target>
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Addr[0] = BUILD_BA(BranchTarget);
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// nop
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Addr[1] = 0x01000000;
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} else {
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enum { G0 = 0, G1 = 1, G5 = 5 };
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// Get address to branch into %g1, using %g5 as a temporary
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//
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// sethi %uhi(Target), %g5 ;; get upper 22 bits of Target into %g5
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Addr[0] = BUILD_SETHI(G5, JumpTarget >> 42);
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// or %g5, %ulo(Target), %g5 ;; get 10 lower bits of upper word into %1
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Addr[1] = BUILD_ORI(G5, JumpTarget >> 32, G5);
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// sllx %g5, 32, %g5 ;; shift those 10 bits to the upper word
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Addr[2] = 0x8B297020;
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// sethi %hi(Target), %g1 ;; extract bits 10-31 into the dest reg
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Addr[3] = BUILD_SETHI(G1, JumpTarget >> 10);
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// or %g5, %g1, %g1 ;; get upper word (in %g5) into %g1
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Addr[4] = 0x82114001;
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// or %g1, %lo(Target), %g1 ;; get lowest 10 bits of Target into %g1
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Addr[5] = BUILD_ORI(G1, JumpTarget, G1);
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// jmpl %g1, %g0, %g0 ;; indirect branch on %g1
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Addr[6] = 0x81C00001;
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// nop ;; delay slot
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Addr[7] = 0x01000000;
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}
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}
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void SparcV9JITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
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InsertJumpAtAddr((intptr_t)New, (unsigned*)Old);
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}
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static void SaveRegisters(uint64_t DoubleFP[], uint64_t CC[],
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uint64_t Globals[]) {
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#if defined(__sparcv9)
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__asm__ __volatile__ (// Save condition-code registers
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"stx %%fsr, %0;\n\t"
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"rd %%fprs, %1;\n\t"
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"rd %%ccr, %2;\n\t"
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: "=m"(CC[0]), "=r"(CC[1]), "=r"(CC[2]));
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__asm__ __volatile__ (// Save globals g1 and g5
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"stx %%g1, %0;\n\t"
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"stx %%g5, %0;\n\t"
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: "=m"(Globals[0]), "=m"(Globals[1]));
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// GCC says: `asm' only allows up to thirty parameters!
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__asm__ __volatile__ (// Save Single/Double FP registers, part 1
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"std %%f0, %0;\n\t" "std %%f2, %1;\n\t"
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"std %%f4, %2;\n\t" "std %%f6, %3;\n\t"
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"std %%f8, %4;\n\t" "std %%f10, %5;\n\t"
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"std %%f12, %6;\n\t" "std %%f14, %7;\n\t"
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"std %%f16, %8;\n\t" "std %%f18, %9;\n\t"
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"std %%f20, %10;\n\t" "std %%f22, %11;\n\t"
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"std %%f24, %12;\n\t" "std %%f26, %13;\n\t"
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"std %%f28, %14;\n\t" "std %%f30, %15;\n\t"
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: "=m"(DoubleFP[ 0]), "=m"(DoubleFP[ 1]),
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"=m"(DoubleFP[ 2]), "=m"(DoubleFP[ 3]),
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"=m"(DoubleFP[ 4]), "=m"(DoubleFP[ 5]),
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"=m"(DoubleFP[ 6]), "=m"(DoubleFP[ 7]),
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"=m"(DoubleFP[ 8]), "=m"(DoubleFP[ 9]),
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"=m"(DoubleFP[10]), "=m"(DoubleFP[11]),
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"=m"(DoubleFP[12]), "=m"(DoubleFP[13]),
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"=m"(DoubleFP[14]), "=m"(DoubleFP[15]));
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__asm__ __volatile__ (// Save Double FP registers, part 2
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"std %%f32, %0;\n\t" "std %%f34, %1;\n\t"
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"std %%f36, %2;\n\t" "std %%f38, %3;\n\t"
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"std %%f40, %4;\n\t" "std %%f42, %5;\n\t"
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"std %%f44, %6;\n\t" "std %%f46, %7;\n\t"
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"std %%f48, %8;\n\t" "std %%f50, %9;\n\t"
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"std %%f52, %10;\n\t" "std %%f54, %11;\n\t"
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"std %%f56, %12;\n\t" "std %%f58, %13;\n\t"
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"std %%f60, %14;\n\t" "std %%f62, %15;\n\t"
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: "=m"(DoubleFP[16]), "=m"(DoubleFP[17]),
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"=m"(DoubleFP[18]), "=m"(DoubleFP[19]),
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"=m"(DoubleFP[20]), "=m"(DoubleFP[21]),
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"=m"(DoubleFP[22]), "=m"(DoubleFP[23]),
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"=m"(DoubleFP[24]), "=m"(DoubleFP[25]),
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"=m"(DoubleFP[26]), "=m"(DoubleFP[27]),
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"=m"(DoubleFP[28]), "=m"(DoubleFP[29]),
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"=m"(DoubleFP[30]), "=m"(DoubleFP[31]));
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#else
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std::cerr << "ERROR: RUNNING CODE THAT ONLY WORKS ON A SPARCV9 HOST!\n";
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abort();
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#endif
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}
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static void RestoreRegisters(uint64_t DoubleFP[], uint64_t CC[],
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uint64_t Globals[]) {
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#if defined(__sparcv9)
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__asm__ __volatile__ (// Restore condition-code registers
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"ldx %0, %%fsr;\n\t"
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"wr %1, 0, %%fprs;\n\t"
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"wr %2, 0, %%ccr;\n\t"
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:: "m"(CC[0]), "r"(CC[1]), "r"(CC[2]));
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__asm__ __volatile__ (// Restore globals g1 and g5
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"ldx %0, %%g1;\n\t"
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"ldx %0, %%g5;\n\t"
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:: "m"(Globals[0]), "m"(Globals[1]));
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// GCC says: `asm' only allows up to thirty parameters!
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__asm__ __volatile__ (// Restore Single/Double FP registers, part 1
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"ldd %0, %%f0;\n\t" "ldd %1, %%f2;\n\t"
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"ldd %2, %%f4;\n\t" "ldd %3, %%f6;\n\t"
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"ldd %4, %%f8;\n\t" "ldd %5, %%f10;\n\t"
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"ldd %6, %%f12;\n\t" "ldd %7, %%f14;\n\t"
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"ldd %8, %%f16;\n\t" "ldd %9, %%f18;\n\t"
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"ldd %10, %%f20;\n\t" "ldd %11, %%f22;\n\t"
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"ldd %12, %%f24;\n\t" "ldd %13, %%f26;\n\t"
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"ldd %14, %%f28;\n\t" "ldd %15, %%f30;\n\t"
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:: "m"(DoubleFP[0]), "m"(DoubleFP[1]),
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"m"(DoubleFP[2]), "m"(DoubleFP[3]),
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"m"(DoubleFP[4]), "m"(DoubleFP[5]),
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"m"(DoubleFP[6]), "m"(DoubleFP[7]),
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"m"(DoubleFP[8]), "m"(DoubleFP[9]),
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"m"(DoubleFP[10]), "m"(DoubleFP[11]),
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"m"(DoubleFP[12]), "m"(DoubleFP[13]),
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"m"(DoubleFP[14]), "m"(DoubleFP[15]));
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__asm__ __volatile__ (// Restore Double FP registers, part 2
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"ldd %0, %%f32;\n\t" "ldd %1, %%f34;\n\t"
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"ldd %2, %%f36;\n\t" "ldd %3, %%f38;\n\t"
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"ldd %4, %%f40;\n\t" "ldd %5, %%f42;\n\t"
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"ldd %6, %%f44;\n\t" "ldd %7, %%f46;\n\t"
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"ldd %8, %%f48;\n\t" "ldd %9, %%f50;\n\t"
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"ldd %10, %%f52;\n\t" "ldd %11, %%f54;\n\t"
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"ldd %12, %%f56;\n\t" "ldd %13, %%f58;\n\t"
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"ldd %14, %%f60;\n\t" "ldd %15, %%f62;\n\t"
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:: "m"(DoubleFP[16]), "m"(DoubleFP[17]),
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"m"(DoubleFP[18]), "m"(DoubleFP[19]),
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"m"(DoubleFP[20]), "m"(DoubleFP[21]),
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"m"(DoubleFP[22]), "m"(DoubleFP[23]),
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"m"(DoubleFP[24]), "m"(DoubleFP[25]),
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"m"(DoubleFP[26]), "m"(DoubleFP[27]),
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"m"(DoubleFP[28]), "m"(DoubleFP[29]),
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"m"(DoubleFP[30]), "m"(DoubleFP[31]));
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#else
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std::cerr << "ERROR: RUNNING CODE THAT ONLY WORKS ON A SPARCV9 HOST!\n";
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abort();
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#endif
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}
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static void CompilationCallback() {
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// Local space to save the registers
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uint64_t DoubleFP[32];
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uint64_t CC[3];
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uint64_t Globals[2];
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SaveRegisters(DoubleFP, CC, Globals);
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unsigned *CameFrom = (unsigned*)__builtin_return_address(0);
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unsigned *CameFrom1 = (unsigned*)__builtin_return_address(1);
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int64_t Target = (intptr_t)JITCompilerFunction(CameFrom);
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DEBUG(std::cerr << "In callback! Addr=" << (void*)CameFrom << "\n");
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// If we can rewrite the ORIGINAL caller, we eliminate the whole need for a
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// trampoline function stub!!
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unsigned OrigCallInst = *CameFrom1;
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int64_t OrigTarget = (Target-(intptr_t)CameFrom1) >> 2;
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if ((OrigCallInst >> 30) == 1 &&
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(OrigTarget <= (1 << 30) && OrigTarget >= -(1 << 30))) {
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// The original call instruction was CALL <immed>, which means we can
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// overwrite it directly, since the offset will fit into 30 bits
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*CameFrom1 = BUILD_CALL(OrigTarget);
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//++OverwrittenCalls;
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} else {
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//++UnmodifiedCalls;
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}
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// Rewrite the call target so that we don't fault every time we execute it.
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//
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unsigned OrigStubCallInst = *CameFrom;
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// Subtract enough to overwrite up to the 'save' instruction
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// This depends on whether we made a short call (1 instruction) or the
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// farCall (7 instructions)
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int Offset = ((OrigStubCallInst >> 30) == 1) ? 1 : 7;
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unsigned *CodeBegin = CameFrom - Offset;
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// FIXME: __builtin_frame_address doesn't work if frame pointer elimination
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// has been performed. Having a variable sized alloca disables frame pointer
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// elimination currently, even if it's dead. This is a gross hack.
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alloca(42+Offset);
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// Make sure that what we're about to overwrite is indeed "save".
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if (*CodeBegin != 0x9DE3BF40) {
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std::cerr << "About to overwrite smthg not a save instr!";
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abort();
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}
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// Overwrite it
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InsertJumpAtAddr(Target, CodeBegin);
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// Flush the I-Cache: FLUSH clears out a doubleword at a given address
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// Self-modifying code MUST clear out the I-Cache to be portable
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#if defined(__sparcv9)
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for (int i = -Offset*4, e = 32-((int64_t)Offset*4); i < e; i += 8)
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__asm__ __volatile__ ("flush %%i7 + %0" : : "r" (i));
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#endif
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// Change the return address to re-execute the restore, then the jump.
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DEBUG(std::cerr << "Callback returning to: 0x"
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<< std::hex << (CameFrom-Offset*4-12) << "\n");
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#if defined(__sparcv9)
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__asm__ __volatile__ ("sub %%i7, %0, %%i7" : : "r" (Offset*4+12));
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#endif
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RestoreRegisters(DoubleFP, CC, Globals);
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}
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/// emitStubForFunction - This method is used by the JIT when it needs to emit
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/// the address of a function for a function whose code has not yet been
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/// generated. In order to do this, it generates a stub which jumps to the lazy
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/// function compiler, which will eventually get fixed to call the function
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/// directly.
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///
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void *SparcV9JITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
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if (Fn != CompilationCallback) {
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// If this is just a call to an external function,
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MCE.startFunctionStub(4*8);
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unsigned *Stub = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
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for (unsigned i = 0; i != 8; ++i)
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MCE.emitWord(0);
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InsertJumpAtAddr((intptr_t)Fn, Stub);
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return MCE.finishFunctionStub(0); // 1 instr past the restore
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}
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MCE.startFunctionStub(44);
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MCE.emitWord(0x81e82000); // restore %g0, 0, %g0
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MCE.emitWord(0x9DE3BF40); // save %sp, -192, %sp
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int64_t CurrPC = MCE.getCurrentPCValue();
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int64_t Addr = (intptr_t)Fn;
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int64_t CallTarget = (Addr-CurrPC) >> 2;
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if (CallTarget < (1 << 29) && CallTarget > -(1 << 29)) {
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// call CallTarget
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MCE.emitWord((0x01 << 30) | CallTarget);
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} else {
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enum {G5 = 5, G1 = 1 };
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// Otherwise, we need to emit a sequence of instructions to call a distant
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// function. We use %g5 as a temporary, and compute the value into %g1
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// sethi %uhi(Target), %g5 ;; get upper 22 bits of Target into %g5
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MCE.emitWord(BUILD_SETHI(G5, Addr >> 42));
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// or %g5, %ulo(Target), %g5 ;; get 10 lower bits of upper word into %1
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MCE.emitWord(BUILD_ORI(G5, Addr >> 32, G5));
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// sllx %g5, 32, %g5 ;; shift those 10 bits to the upper word
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MCE.emitWord(0x8B297020);
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// sethi %hi(Target), %g1 ;; extract bits 10-31 into the dest reg
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MCE.emitWord(BUILD_SETHI(G1, Addr >> 10));
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// or %g5, %g1, %g1 ;; get upper word (in %g5) into %g1
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MCE.emitWord(0x82114001);
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// or %g1, %lo(Target), %g1 ;; get lowest 10 bits of Target into %g1
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MCE.emitWord(BUILD_ORI(G1, Addr, G1));
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||||||
|
// call %g1 ;; indirect call on %g1
|
||||||
|
MCE.emitWord(0x9FC04000);
|
||||||
|
}
|
||||||
|
|
||||||
|
// nop ;; call delay slot
|
||||||
|
MCE.emitWord(0x1000000);
|
||||||
|
|
||||||
|
// FIXME: Should have a restore and return!
|
||||||
|
|
||||||
|
MCE.emitWord(0xDEADBEEF); // marker so that we know it's really a stub
|
||||||
|
return (char*)MCE.finishFunctionStub(0)+4; // 1 instr past the restore
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
TargetJITInfo::LazyResolverFn
|
||||||
|
SparcV9JITInfo::getLazyResolverFunction(JITCompilerFn F) {
|
||||||
|
JITCompilerFunction = F;
|
||||||
|
return CompilationCallback;
|
||||||
|
}
|
||||||
|
|
||||||
|
void SparcV9JITInfo::relocate(void *Function, MachineRelocation *MR,
|
||||||
|
unsigned NumRelocs) {
|
||||||
|
for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
|
||||||
|
unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
|
||||||
|
intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
|
||||||
|
switch ((V9::RelocationType)MR->getRelocationType()) {
|
||||||
|
default: assert(0 && "Unknown relocation type!");
|
||||||
|
case V9::reloc_pcrel_call:
|
||||||
|
ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2; // PC relative.
|
||||||
|
assert((ResultPtr < (1 << 29) && ResultPtr > -(1 << 29)) &&
|
||||||
|
"reloc_pcrel_call is out of range!");
|
||||||
|
// The high two bits of the call are always set to 01.
|
||||||
|
*RelocPos = (1 << 30) | (ResultPtr & ((1 << 30)-1)) ;
|
||||||
|
break;
|
||||||
|
case V9::reloc_sethi_hh:
|
||||||
|
case V9::reloc_sethi_lm:
|
||||||
|
ResultPtr >>= (MR->getRelocationType() == V9::reloc_sethi_hh ? 32 : 0);
|
||||||
|
ResultPtr >>= 10;
|
||||||
|
ResultPtr &= (1 << 22)-1;
|
||||||
|
*RelocPos |= (unsigned)ResultPtr;
|
||||||
|
break;
|
||||||
|
case V9::reloc_or_hm:
|
||||||
|
case V9::reloc_or_lo:
|
||||||
|
ResultPtr >>= (MR->getRelocationType() == V9::reloc_or_hm ? 32 : 0);
|
||||||
|
ResultPtr &= (1 << 12)-1;
|
||||||
|
*RelocPos |= (unsigned)ResultPtr;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
Loading…
Reference in New Issue